Commit 00e62e86 authored by Shukun Tan's avatar Shukun Tan Committed by Herbert Xu

crypto: hisilicon - Fix duplicate print when qm occur multiple errors

If all possible errors occurs at the same time, the error_status will be
all 1s. The doorbell timeout error and FIFO overflow error will be print
in each cycle, which should be print just once.
Signed-off-by: default avatarShukun Tan <tanshukun1@huawei.com>
Reviewed-by: default avatarZhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent f826e6ef
...@@ -1019,42 +1019,39 @@ static void qm_hw_error_uninit_v2(struct hisi_qm *qm) ...@@ -1019,42 +1019,39 @@ static void qm_hw_error_uninit_v2(struct hisi_qm *qm)
static void qm_log_hw_error(struct hisi_qm *qm, u32 error_status) static void qm_log_hw_error(struct hisi_qm *qm, u32 error_status)
{ {
const struct hisi_qm_hw_error *err = qm_hw_error; const struct hisi_qm_hw_error *err;
struct device *dev = &qm->pdev->dev; struct device *dev = &qm->pdev->dev;
u32 reg_val, type, vf_num; u32 reg_val, type, vf_num;
int i;
for (i = 0; i < ARRAY_SIZE(qm_hw_error); i++) {
err = &qm_hw_error[i];
if (!(err->int_msk & error_status))
continue;
while (err->msg) {
if (err->int_msk & error_status) {
dev_err(dev, "%s [error status=0x%x] found\n", dev_err(dev, "%s [error status=0x%x] found\n",
err->msg, err->int_msk); err->msg, err->int_msk);
if (error_status & QM_DB_TIMEOUT) { if (err->int_msk & QM_DB_TIMEOUT) {
reg_val = readl(qm->io_base + reg_val = readl(qm->io_base + QM_ABNORMAL_INF01);
QM_ABNORMAL_INF01);
type = (reg_val & QM_DB_TIMEOUT_TYPE) >> type = (reg_val & QM_DB_TIMEOUT_TYPE) >>
QM_DB_TIMEOUT_TYPE_SHIFT; QM_DB_TIMEOUT_TYPE_SHIFT;
vf_num = reg_val & QM_DB_TIMEOUT_VF; vf_num = reg_val & QM_DB_TIMEOUT_VF;
dev_err(dev, "qm %s doorbell timeout in function %u\n", dev_err(dev, "qm %s doorbell timeout in function %u\n",
qm_db_timeout[type], vf_num); qm_db_timeout[type], vf_num);
} } else if (err->int_msk & QM_OF_FIFO_OF) {
reg_val = readl(qm->io_base + QM_ABNORMAL_INF00);
if (error_status & QM_OF_FIFO_OF) {
reg_val = readl(qm->io_base +
QM_ABNORMAL_INF00);
type = (reg_val & QM_FIFO_OVERFLOW_TYPE) >> type = (reg_val & QM_FIFO_OVERFLOW_TYPE) >>
QM_FIFO_OVERFLOW_TYPE_SHIFT; QM_FIFO_OVERFLOW_TYPE_SHIFT;
vf_num = reg_val & QM_FIFO_OVERFLOW_VF; vf_num = reg_val & QM_FIFO_OVERFLOW_VF;
if (type < ARRAY_SIZE(qm_fifo_overflow)) if (type < ARRAY_SIZE(qm_fifo_overflow))
dev_err(dev, "qm %s fifo overflow in function %u\n", dev_err(dev, "qm %s fifo overflow in function %u\n",
qm_fifo_overflow[type], qm_fifo_overflow[type], vf_num);
vf_num);
else else
dev_err(dev, "unknown error type\n"); dev_err(dev, "unknown error type\n");
} }
} }
err++;
}
} }
static pci_ers_result_t qm_hw_error_handle_v2(struct hisi_qm *qm) static pci_ers_result_t qm_hw_error_handle_v2(struct hisi_qm *qm)
......
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