Commit 00fc6f6f authored by Ben Skeggs's avatar Ben Skeggs

drm/nouveau: use dedicated channel for async moves on GT/GF chipsets.

The moves themselves were generally async to graphics previously, with
the exception that if the "main" channel is used to synchronise a
page flip at the same time, it can end up blocked for a noticable amount
of time for large buffer moves.

Not really critical, and there's better ways of handling this, but they
are all rather invasive, so this is fine for now.

Based on a patch by Maarten Lankhorst addressing the same issue.
Reported-by: default avatarMaarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
Acked-by: default avatarMaarten Lankhorst <maarten.lankhorst@canonical.com>
parent 06b237ef
...@@ -581,7 +581,7 @@ nve0_bo_move_init(struct nouveau_channel *chan, u32 handle) ...@@ -581,7 +581,7 @@ nve0_bo_move_init(struct nouveau_channel *chan, u32 handle)
int ret = RING_SPACE(chan, 2); int ret = RING_SPACE(chan, 2);
if (ret == 0) { if (ret == 0) {
BEGIN_NVC0(chan, NvSubCopy, 0x0000, 1); BEGIN_NVC0(chan, NvSubCopy, 0x0000, 1);
OUT_RING (chan, handle); OUT_RING (chan, handle & 0x0000ffff);
FIRE_RING (chan); FIRE_RING (chan);
} }
return ret; return ret;
...@@ -1017,7 +1017,7 @@ nouveau_bo_move_init(struct nouveau_drm *drm) ...@@ -1017,7 +1017,7 @@ nouveau_bo_move_init(struct nouveau_drm *drm)
struct ttm_mem_reg *, struct ttm_mem_reg *); struct ttm_mem_reg *, struct ttm_mem_reg *);
int (*init)(struct nouveau_channel *, u32 handle); int (*init)(struct nouveau_channel *, u32 handle);
} _methods[] = { } _methods[] = {
{ "COPY", 0, 0xa0b5, nve0_bo_move_copy, nve0_bo_move_init }, { "COPY", 4, 0xa0b5, nve0_bo_move_copy, nve0_bo_move_init },
{ "GRCE", 0, 0xa0b5, nve0_bo_move_copy, nvc0_bo_move_init }, { "GRCE", 0, 0xa0b5, nve0_bo_move_copy, nvc0_bo_move_init },
{ "COPY1", 5, 0x90b8, nvc0_bo_move_copy, nvc0_bo_move_init }, { "COPY1", 5, 0x90b8, nvc0_bo_move_copy, nvc0_bo_move_init },
{ "COPY0", 4, 0x90b5, nvc0_bo_move_copy, nvc0_bo_move_init }, { "COPY0", 4, 0x90b5, nvc0_bo_move_copy, nvc0_bo_move_init },
...@@ -1037,7 +1037,7 @@ nouveau_bo_move_init(struct nouveau_drm *drm) ...@@ -1037,7 +1037,7 @@ nouveau_bo_move_init(struct nouveau_drm *drm)
struct nouveau_channel *chan; struct nouveau_channel *chan;
u32 handle = (mthd->engine << 16) | mthd->oclass; u32 handle = (mthd->engine << 16) | mthd->oclass;
if (mthd->init == nve0_bo_move_init) if (mthd->engine)
chan = drm->cechan; chan = drm->cechan;
else else
chan = drm->channel; chan = drm->channel;
......
...@@ -192,6 +192,18 @@ nouveau_accel_init(struct nouveau_drm *drm) ...@@ -192,6 +192,18 @@ nouveau_accel_init(struct nouveau_drm *drm)
arg0 = NVE0_CHANNEL_IND_ENGINE_GR; arg0 = NVE0_CHANNEL_IND_ENGINE_GR;
arg1 = 1; arg1 = 1;
} else
if (device->chipset >= 0xa3 &&
device->chipset != 0xaa &&
device->chipset != 0xac) {
ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE,
NVDRM_CHAN + 1, NvDmaFB, NvDmaTT,
&drm->cechan);
if (ret)
NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
arg0 = NvDmaFB;
arg1 = NvDmaTT;
} else { } else {
arg0 = NvDmaFB; arg0 = NvDmaFB;
arg1 = NvDmaTT; arg1 = NvDmaTT;
......
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