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Commit 01407153 authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'hisi-arm64-dt-for-5.9' of git://github.com/hisilicon/linux-hisi into arm/dt 

ARM64: DT: Hisilicon SoCs DT updates for 5.9

- Refactor hi6220-hikey dts to use phandles for overriding nodes
- Align UART node name to fix dtschema validator warnings for hi6220
- Add basic usb gadget support on hikey960
- Update adv7533 nodes to meet with the binding for hikey and hikey960

* tag 'hisi-arm64-dt-for-5.9' of git://github.com/hisilicon/linux-hisi:
  arm64: dts: hisilicon: hikey: fixes to comply with adi, adv7533 DT binding
  dts: hi3660: Add support for basic usb gadget on Hikey960
  arm64: dts: hisilicon: Align UART nodename with dtschema
  arm64: dts: hisilicon: Use phandles for overriding nodes in hi6220

Link: https://lore.kernel.org/r/5F165E8E.3030503@hisilicon.comSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 6ce448ee bbe28fc3
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arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
View file @ 01407153
......@@ -13,6 +13,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/usb/pd.h>
/ {
model = "HiKey960";
......@@ -526,10 +527,63 @@ &i2c0 {
&i2c1 {
status = "okay";
rt1711h: rt1711h@4e {
compatible = "richtek,rt1711h";
reg = <0x4e>;
status = "ok";
interrupt-parent = <&gpio27>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&usb_cfg_func>;
usb_con: connector {
compatible = "usb-c-connector";
label = "USB-C";
data-role = "dual";
power-role = "dual";
try-power-role = "sink";
source-pdos = <PDO_FIXED(5000, 500, PDO_FIXED_USB_COMM)>;
sink-pdos = <PDO_FIXED(5000, 500, PDO_FIXED_USB_COMM)
PDO_VAR(5000, 5000, 1000)>;
op-sink-microwatt = <10000000>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
usb_con_ss: endpoint {
remote-endpoint = <&dwc3_ss>;
};
};
};
};
port {
#address-cells = <1>;
#size-cells = <0>;
rt1711h_ep: endpoint@0 {
reg = <0>;
remote-endpoint = <&dwc3_role_switch>;
};
};
};
adv7533: adv7533@39 {
status = "ok";
compatible = "adi,adv7533";
reg = <0x39>;
adi,dsi-lanes = <4>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
};
port@1 {
reg = <1>;
};
};
};
};
......@@ -612,3 +666,32 @@ wlcore: wlcore@2 {
interrupts = <3 IRQ_TYPE_EDGE_RISING>;
};
};
&dwc3 { /* USB */
dr_mode = "otg";
maximum-speed = "super-speed";
phy_type = "utmi";
snps,dis-del-phy-power-chg-quirk;
snps,lfps_filter_quirk;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
snps,tx_de_emphasis_quirk;
snps,tx_de_emphasis = <1>;
snps,dis_enblslpm_quirk;
snps,gctl-reset-quirk;
usb-role-switch;
role-switch-default-mode = "host";
port {
#address-cells = <1>;
#size-cells = <0>;
dwc3_role_switch: endpoint@0 {
reg = <0>;
remote-endpoint = <&rt1711h_ep>;
};
dwc3_ss: endpoint@1 {
reg = <1>;
remote-endpoint = <&usb_con_ss>;
};
};
};
arch/arm64/boot/dts/hisilicon/hi3660.dtsi
View file @ 01407153
......@@ -1152,6 +1152,40 @@ map1 {
};
};
};
usb3_otg_bc: usb3_otg_bc@ff200000 {
compatible = "syscon", "simple-mfd";
reg = <0x0 0xff200000 0x0 0x1000>;
usb_phy: usb-phy {
compatible = "hisilicon,hi3660-usb-phy";
#phy-cells = <0>;
hisilicon,pericrg-syscon = <&crg_ctrl>;
hisilicon,pctrl-syscon = <&pctrl>;
hisilicon,eye-diagram-param = <0x22466e4>;
};
};
dwc3: dwc3@ff100000 {
compatible = "snps,dwc3";
reg = <0x0 0xff100000 0x0 0x100000>;
clocks = <&crg_ctrl HI3660_CLK_ABB_USB>,
<&crg_ctrl HI3660_ACLK_GATE_USB3OTG>;
clock-names = "ref", "bus_early";
assigned-clocks = <&crg_ctrl HI3660_ACLK_GATE_USB3OTG>;
assigned-clock-rates = <229000000>;
resets = <&crg_rst 0x90 8>,
<&crg_rst 0x90 7>,
<&crg_rst 0x90 6>,
<&crg_rst 0x90 5>;
interrupts = <0 159 4>, <0 161 4>;
phys = <&usb_phy>;
phy-names = "usb3-phy";
};
};
};
......
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
View file @ 01407153
......@@ -122,222 +122,6 @@ wl1835_pwrseq: wl1835-pwrseq {
power-off-delay-us = <10>;
};
soc {
spi0: spi@f7106000 {
status = "ok";
};
i2c0: i2c@f7100000 {
status = "ok";
};
i2c1: i2c@f7101000 {
status = "ok";
};
uart1: uart@f7111000 {
assigned-clocks = <&sys_ctrl HI6220_UART1_SRC>;
assigned-clock-rates = <150000000>;
status = "ok";
bluetooth {
compatible = "ti,wl1835-st";
enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
clocks = <&pmic>;
clock-names = "ext_clock";
};
};
uart2: uart@f7112000 {
status = "ok";
};
uart3: uart@f7113000 {
status = "ok";
};
/*
* Legend: proper name = the GPIO line is used as GPIO
* NC = not connected (not routed from the SoC)
* "[PER]" = pin is muxed for peripheral (not GPIO)
* "" = no idea, schematic doesn't say, could be
* unrouted (not connected to any external pin)
* LSEC = Low Speed External Connector
* HSEC = High Speed External Connector
*
* Pin assignments taken from LeMaker and CircuitCo Schematics
* Rev A1.
*
* For the lines routed to the external connectors the
* lines are named after the 96Boards CE Specification 1.0,
* Appendix "Expansion Connector Signal Description".
*
* When the 96Board naming of a line and the schematic name of
* the same line are in conflict, the 96Board specification
* takes precedence, which means that the external UART on the
* LSEC is named UART0 while the schematic and SoC names this
* UART2. This is only for the informational lines i.e. "[FOO]",
* the GPIO named lines "GPIO-A" thru "GPIO-L" are the only
* ones actually used for GPIO.
*/
gpio0: gpio@f8011000 {
gpio-line-names = "PWR_HOLD", "DSI_SEL",
"USB_HUB_RESET_N", "USB_SEL", "HDMI_PD", "WL_REG_ON",
"PWRON_DET", "5V_HUB_EN";
};
gpio1: gpio@f8012000 {
gpio-line-names = "SD_DET", "HDMI_INT", "PMU_IRQ_N",
"WL_HOST_WAKE", "NC", "NC", "NC", "BT_REG_ON";
};
gpio2: gpio@f8013000 {
gpio-line-names =
"GPIO-A", /* LSEC Pin 23: GPIO2_0 */
"GPIO-B", /* LSEC Pin 24: GPIO2_1 */
"GPIO-C", /* LSEC Pin 25: GPIO2_2 */
"GPIO-D", /* LSEC Pin 26: GPIO2_3 */
"GPIO-E", /* LSEC Pin 27: GPIO2_4 */
"USB_ID_DET", "USB_VBUS_DET",
"GPIO-H"; /* LSEC Pin 30: GPIO2_7 */
};
gpio3: gpio@f8014000 {
gpio-line-names = "GPIO3_0", "NC", "NC", "", "NC", "",
"WLAN_ACTIVE", "NC", "NC";
};
gpio4: gpio@f7020000 {
gpio-line-names = "USER_LED1", "USER_LED2", "USER_LED3",
"USER_LED4", "SD_SEL", "NC", "NC", "BT_ACTIVE";
};
gpio5: gpio@f7021000 {
gpio-line-names = "NC", "NC",
"[UART1_RxD]", /* LSEC Pin 11: UART3_RX */
"[UART1_TxD]", /* LSEC Pin 13: UART3_TX */
"[AUX_SSI1]", "NC",
"[PCM_CLK]", /* LSEC Pin 18: MODEM_PCM_XCLK */
"[PCM_FS]"; /* LSEC Pin 16: MODEM_PCM_XFS */
};
gpio6: gpio@f7022000 {
gpio-line-names =
"[SPI0_DIN]", /* Pin 10: SPI0_DI */
"[SPI0_DOUT]", /* Pin 14: SPI0_DO */
"[SPI0_CS]", /* Pin 12: SPI0_CS_N */
"[SPI0_SCLK]", /* Pin 8: SPI0_SCLK */
"NC", "NC", "NC",
"GPIO-G"; /* Pin 29: GPIO6_7_DSI_TE0 */
};
gpio7: gpio@f7023000 {
gpio-line-names = "NC", "NC", "NC", "NC",
"[PCM_DI]", /* Pin 22: MODEM_PCM_DI */
"[PCM_DO]", /* Pin 20: MODEM_PCM_DO */
"NC", "NC";
};
gpio8: gpio@f7024000 {
gpio-line-names = "NC", "[CEC_CLK_19_2MHZ]", "NC",
"", "", "", "", "", "";
};
gpio9: gpio@f7025000 {
gpio-line-names = "",
"GPIO-J", /* LSEC Pin 32: ISP_PWDN0_GPIO9_1 */
"GPIO-L", /* LSEC Pin 34: ISP_PWDN1_GPIO9_2 */
"NC", "NC", "NC", "NC", "[ISP_CCLK0]";
};
gpio10: gpio@f7026000 {
gpio-line-names = "BOOT_SEL",
"[ISP_CCLK1]",
"GPIO-I", /* LSEC Pin 31: ISP_RSTB0_GPIO10_2 */
"GPIO-K", /* LSEC Pin 33: ISP_RSTB1_GPIO10_3 */
"NC", "NC",
"[I2C2_SDA]", /* HSEC Pin 34: ISP0_SDA */
"[I2C2_SCL]"; /* HSEC Pin 32: ISP0_SCL */
};
gpio11: gpio@f7027000 {
gpio-line-names =
"[I2C3_SDA]", /* HSEC Pin 38: ISP1_SDA */
"[I2C3_SCL]", /* HSEC Pin 36: ISP1_SCL */
"", "NC", "NC", "NC", "", "";
};
gpio12: gpio@f7028000 {
gpio-line-names = "[BT_PCM_XFS]", "[BT_PCM_DI]",
"[BT_PCM_DO]",
"NC", "NC", "NC", "NC",
"GPIO-F"; /* LSEC Pin 28: BL_PWM_GPIO12_7 */
};
gpio13: gpio@f7029000 {
gpio-line-names = "[UART0_RX]", "[UART0_TX]",
"[BT_UART1_CTS]", "[BT_UART1_RTS]",
"[BT_UART1_RX]", "[BT_UART1_TX]",
"[UART0_CTS]", /* LSEC Pin 3: UART2_CTS_N */
"[UART0_RTS]"; /* LSEC Pin 9: UART2_RTS_N */
};
gpio14: gpio@f702a000 {
gpio-line-names =
"[UART0_RxD]", /* LSEC Pin 7: UART2_RX */
"[UART0_TxD]", /* LSEC Pin 5: UART2_TX */
"[I2C0_SCL]", /* LSEC Pin 15: I2C0_SCL */
"[I2C0_SDA]", /* LSEC Pin 17: I2C0_SDA */
"[I2C1_SCL]", /* LSEC Pin 19: I2C1_SCL */
"[I2C1_SDA]", /* LSEC Pin 21: I2C1_SDA */
"[I2C2_SCL]", "[I2C2_SDA]";
};
gpio15: gpio@f702b000 {
gpio-line-names = "", "", "", "", "", "", "NC", "";
};
/* GPIO blocks 16 thru 19 do not appear to be routed to pins */
dwmmc_0: dwmmc0@f723d000 {
cap-mmc-highspeed;
non-removable;
bus-width = <0x8>;
vmmc-supply = <&ldo19>;
};
dwmmc_1: dwmmc1@f723e000 {
card-detect-delay = <200>;
cap-sd-highspeed;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
vqmmc-supply = <&ldo7>;
vmmc-supply = <&ldo10>;
bus-width = <0x4>;
disable-wp;
cd-gpios = <&gpio1 0 1>;
};
dwmmc_2: dwmmc2@f723f000 {
bus-width = <0x4>;
non-removable;
cap-power-off-card;
vmmc-supply = <&reg_vdd_3v3>;
mmc-pwrseq = <&wl1835_pwrseq>;
#address-cells = <0x1>;
#size-cells = <0x0>;
wlcore: wlcore@2 {
compatible = "ti,wl1835";
reg = <2>; /* sdio func num */
/* WL_IRQ, WL_HOST_WAKE_GPIO1_3 */
interrupt-parent = <&gpio1>;
interrupts = <3 IRQ_TYPE_EDGE_RISING>;
};
};
};
leds {
compatible = "gpio-leds";
......@@ -480,10 +264,26 @@ sound_card {
};
};
&uart1 {
assigned-clocks = <&sys_ctrl HI6220_UART1_SRC>;
assigned-clock-rates = <150000000>;
status = "ok";
bluetooth {
compatible = "ti,wl1835-st";
enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
clocks = <&pmic>;
clock-names = "ext_clock";
};
};
&uart2 {
status = "ok";
label = "LS-UART0";
};
&uart3 {
status = "ok";
label = "LS-UART1";
};
......@@ -506,6 +306,196 @@ dsi_out0: endpoint@0 {
};
};
&dwmmc_0 {
cap-mmc-highspeed;
non-removable;
bus-width = <0x8>;
vmmc-supply = <&ldo19>;
};
&dwmmc_1 {
card-detect-delay = <200>;
cap-sd-highspeed;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
vqmmc-supply = <&ldo7>;
vmmc-supply = <&ldo10>;
bus-width = <0x4>;
disable-wp;
cd-gpios = <&gpio1 0 1>;
};
&dwmmc_2 {
bus-width = <0x4>;
non-removable;
cap-power-off-card;
vmmc-supply = <&reg_vdd_3v3>;
mmc-pwrseq = <&wl1835_pwrseq>;
#address-cells = <0x1>;
#size-cells = <0x0>;
wlcore: wlcore@2 {
compatible = "ti,wl1835";
reg = <2>; /* sdio func num */
/* WL_IRQ, WL_HOST_WAKE_GPIO1_3 */
interrupt-parent = <&gpio1>;
interrupts = <3 IRQ_TYPE_EDGE_RISING>;
};
};
/*
* Legend: proper name = the GPIO line is used as GPIO
* NC = not connected (not routed from the SoC)
* "[PER]" = pin is muxed for peripheral (not GPIO)
* "" = no idea, schematic doesn't say, could be
* unrouted (not connected to any external pin)
* LSEC = Low Speed External Connector
* HSEC = High Speed External Connector
*
* Pin assignments taken from LeMaker and CircuitCo Schematics
* Rev A1.
*
* For the lines routed to the external connectors the
* lines are named after the 96Boards CE Specification 1.0,
* Appendix "Expansion Connector Signal Description".
*
* When the 96Board naming of a line and the schematic name of
* the same line are in conflict, the 96Board specification
* takes precedence, which means that the external UART on the
* LSEC is named UART0 while the schematic and SoC names this
* UART2. This is only for the informational lines i.e. "[FOO]",
* the GPIO named lines "GPIO-A" thru "GPIO-L" are the only
* ones actually used for GPIO.
*/
&gpio0 {
gpio-line-names = "PWR_HOLD", "DSI_SEL",
"USB_HUB_RESET_N", "USB_SEL", "HDMI_PD", "WL_REG_ON",
"PWRON_DET", "5V_HUB_EN";
};
&gpio1 {
gpio-line-names = "SD_DET", "HDMI_INT", "PMU_IRQ_N",
"WL_HOST_WAKE", "NC", "NC", "NC", "BT_REG_ON";
};
&gpio2 {
gpio-line-names =
"GPIO-A", /* LSEC Pin 23: GPIO2_0 */
"GPIO-B", /* LSEC Pin 24: GPIO2_1 */
"GPIO-C", /* LSEC Pin 25: GPIO2_2 */
"GPIO-D", /* LSEC Pin 26: GPIO2_3 */
"GPIO-E", /* LSEC Pin 27: GPIO2_4 */
"USB_ID_DET", "USB_VBUS_DET",
"GPIO-H"; /* LSEC Pin 30: GPIO2_7 */
};
&gpio3 {
gpio-line-names = "GPIO3_0", "NC", "NC", "", "NC", "",
"WLAN_ACTIVE", "NC", "NC";
};
&gpio4 {
gpio-line-names = "USER_LED1", "USER_LED2", "USER_LED3",
"USER_LED4", "SD_SEL", "NC", "NC", "BT_ACTIVE";
};
&gpio5 {
gpio-line-names = "NC", "NC",
"[UART1_RxD]", /* LSEC Pin 11: UART3_RX */
"[UART1_TxD]", /* LSEC Pin 13: UART3_TX */
"[AUX_SSI1]", "NC",
"[PCM_CLK]", /* LSEC Pin 18: MODEM_PCM_XCLK */
"[PCM_FS]"; /* LSEC Pin 16: MODEM_PCM_XFS */
};
&gpio6 {
gpio-line-names =
"[SPI0_DIN]", /* Pin 10: SPI0_DI */
"[SPI0_DOUT]", /* Pin 14: SPI0_DO */
"[SPI0_CS]", /* Pin 12: SPI0_CS_N */
"[SPI0_SCLK]", /* Pin 8: SPI0_SCLK */
"NC", "NC", "NC",
"GPIO-G"; /* Pin 29: GPIO6_7_DSI_TE0 */
};
&gpio7 {
gpio-line-names = "NC", "NC", "NC", "NC",
"[PCM_DI]", /* Pin 22: MODEM_PCM_DI */
"[PCM_DO]", /* Pin 20: MODEM_PCM_DO */
"NC", "NC";
};
&gpio8 {
gpio-line-names = "NC", "[CEC_CLK_19_2MHZ]", "NC",
"", "", "", "", "", "";
};
&gpio9 {
gpio-line-names = "",
"GPIO-J", /* LSEC Pin 32: ISP_PWDN0_GPIO9_1 */
"GPIO-L", /* LSEC Pin 34: ISP_PWDN1_GPIO9_2 */
"NC", "NC", "NC", "NC", "[ISP_CCLK0]";
};
&gpio10 {
gpio-line-names = "BOOT_SEL",
"[ISP_CCLK1]",
"GPIO-I", /* LSEC Pin 31: ISP_RSTB0_GPIO10_2 */
"GPIO-K", /* LSEC Pin 33: ISP_RSTB1_GPIO10_3 */
"NC", "NC",
"[I2C2_SDA]", /* HSEC Pin 34: ISP0_SDA */
"[I2C2_SCL]"; /* HSEC Pin 32: ISP0_SCL */
};
&gpio11 {
gpio-line-names =
"[I2C3_SDA]", /* HSEC Pin 38: ISP1_SDA */
"[I2C3_SCL]", /* HSEC Pin 36: ISP1_SCL */
"", "NC", "NC", "NC", "", "";
};
&gpio12 {
gpio-line-names = "[BT_PCM_XFS]", "[BT_PCM_DI]",
"[BT_PCM_DO]",
"NC", "NC", "NC", "NC",
"GPIO-F"; /* LSEC Pin 28: BL_PWM_GPIO12_7 */
};
&gpio13 {
gpio-line-names = "[UART0_RX]", "[UART0_TX]",
"[BT_UART1_CTS]", "[BT_UART1_RTS]",
"[BT_UART1_RX]", "[BT_UART1_TX]",
"[UART0_CTS]", /* LSEC Pin 3: UART2_CTS_N */
"[UART0_RTS]"; /* LSEC Pin 9: UART2_RTS_N */
};
&gpio14 {
gpio-line-names =
"[UART0_RxD]", /* LSEC Pin 7: UART2_RX */
"[UART0_TxD]", /* LSEC Pin 5: UART2_TX */
"[I2C0_SCL]", /* LSEC Pin 15: I2C0_SCL */
"[I2C0_SDA]", /* LSEC Pin 17: I2C0_SDA */
"[I2C1_SCL]", /* LSEC Pin 19: I2C1_SCL */
"[I2C1_SDA]", /* LSEC Pin 21: I2C1_SDA */
"[I2C2_SCL]", "[I2C2_SDA]";
};
&gpio15 {
gpio-line-names = "", "", "", "", "", "", "NC", "";
};
/* GPIO blocks 16 thru 19 do not appear to be routed to pins */
&i2c0 {
status = "ok";
};
&i2c1 {
status = "ok";
};
&i2c2 {
#address-cells = <1>;
#size-cells = <0>;
......@@ -516,7 +506,7 @@ adv7533: adv7533@39 {
reg = <0x39>;
interrupt-parent = <&gpio1>;
interrupts = <1 2>;
pd-gpio = <&gpio0 4 0>;
pd-gpios = <&gpio0 4 0>;
adi,dsi-lanes = <4>;
#sound-dai-cells = <0>;
......@@ -549,3 +539,7 @@ i2s0_cpu_endpoint: endpoint {
};
};
};
&spi0 {
status = "ok";
};
arch/arm64/boot/dts/hisilicon/hi6220.dtsi
View file @ 01407153
......@@ -302,7 +302,7 @@ stub_clock: stub_clock {
mboxes = <&mailbox 1 0 11>;
};
uart0: uart@f8015000 { /* console */
uart0: serial@f8015000 { /* console */
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0xf8015000 0x0 0x1000>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
......@@ -311,7 +311,7 @@ uart0: uart@f8015000 { /* console */
clock-names = "uartclk", "apb_pclk";
};
uart1: uart@f7111000 {
uart1: serial@f7111000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0xf7111000 0x0 0x1000>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
......@@ -325,7 +325,7 @@ uart1: uart@f7111000 {
status = "disabled";
};
uart2: uart@f7112000 {
uart2: serial@f7112000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0xf7112000 0x0 0x1000>;
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
......@@ -337,7 +337,7 @@ uart2: uart@f7112000 {
status = "disabled";
};
uart3: uart@f7113000 {
uart3: serial@f7113000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0xf7113000 0x0 0x1000>;
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
......@@ -349,7 +349,7 @@ uart3: uart@f7113000 {
status = "disabled";
};
uart4: uart@f7114000 {
uart4: serial@f7114000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0xf7114000 0x0 0x1000>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
......
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