Commit 01a507a3 authored by Mark Rutland's avatar Mark Rutland Committed by Catalin Marinas

arm64: dts: juno: describe PMUs separately

The A57 and A53 PMUs in Juno support different events, so describe them
separately in both the Juno and Juno R1 DTs.
Signed-off-by: default avatarMark Rutland <mark.rutland@arm.com>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Acked-by: default avatarWill Deacon <will.deacon@arm.com>
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 62a4dda9
...@@ -91,17 +91,21 @@ A53_L2: l2-cache1 { ...@@ -91,17 +91,21 @@ A53_L2: l2-cache1 {
}; };
}; };
pmu { pmu_a57 {
compatible = "arm,armv8-pmuv3"; compatible = "arm,cortex-a57-pmu";
interrupts = <GIC_SPI 02 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 02 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 06 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 06 IRQ_TYPE_LEVEL_HIGH>;
<GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, interrupt-affinity = <&A57_0>,
<&A57_1>;
};
pmu_a53 {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&A57_0>, interrupt-affinity = <&A53_0>,
<&A57_1>,
<&A53_0>,
<&A53_1>, <&A53_1>,
<&A53_2>, <&A53_2>,
<&A53_3>; <&A53_3>;
......
...@@ -91,17 +91,21 @@ A53_L2: l2-cache1 { ...@@ -91,17 +91,21 @@ A53_L2: l2-cache1 {
}; };
}; };
pmu { pmu_a57 {
compatible = "arm,armv8-pmuv3"; compatible = "arm,cortex-a57-pmu";
interrupts = <GIC_SPI 02 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 02 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 06 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 06 IRQ_TYPE_LEVEL_HIGH>;
<GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, interrupt-affinity = <&A57_0>,
<&A57_1>;
};
pmu_a53 {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&A57_0>, interrupt-affinity = <&A53_0>,
<&A57_1>,
<&A53_0>,
<&A53_1>, <&A53_1>,
<&A53_2>, <&A53_2>,
<&A53_3>; <&A53_3>;
......
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