Commit 01a8dcec authored by Huang Rui's avatar Huang Rui Committed by Alex Deucher

drm/amdgpu: add function to check tmz capability (v4)

Add a function to check tmz capability with kernel parameter and ASIC type.

v2: use a per device tmz variable instead of global amdgpu_tmz.
v3: refine the comments for the function. (Luben)
v4: add amdgpu_tmz.c/h for future use.
Signed-off-by: default avatarHuang Rui <ray.huang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ae60305a
...@@ -55,7 +55,7 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ ...@@ -55,7 +55,7 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \
amdgpu_vf_error.o amdgpu_sched.o amdgpu_debugfs.o amdgpu_ids.o \ amdgpu_vf_error.o amdgpu_sched.o amdgpu_debugfs.o amdgpu_ids.o \
amdgpu_gmc.o amdgpu_mmhub.o amdgpu_xgmi.o amdgpu_csa.o amdgpu_ras.o amdgpu_vm_cpu.o \ amdgpu_gmc.o amdgpu_mmhub.o amdgpu_xgmi.o amdgpu_csa.o amdgpu_ras.o amdgpu_vm_cpu.o \
amdgpu_vm_sdma.o amdgpu_discovery.o amdgpu_ras_eeprom.o amdgpu_nbio.o \ amdgpu_vm_sdma.o amdgpu_discovery.o amdgpu_ras_eeprom.o amdgpu_nbio.o \
amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_tmz.o
amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o
......
...@@ -65,6 +65,7 @@ ...@@ -65,6 +65,7 @@
#include "amdgpu_ras.h" #include "amdgpu_ras.h"
#include "amdgpu_pmu.h" #include "amdgpu_pmu.h"
#include "amdgpu_fru_eeprom.h" #include "amdgpu_fru_eeprom.h"
#include "amdgpu_tmz.h"
#include <linux/suspend.h> #include <linux/suspend.h>
#include <drm/task_barrier.h> #include <drm/task_barrier.h>
...@@ -1140,6 +1141,8 @@ static int amdgpu_device_check_arguments(struct amdgpu_device *adev) ...@@ -1140,6 +1141,8 @@ static int amdgpu_device_check_arguments(struct amdgpu_device *adev)
adev->firmware.load_type = amdgpu_ucode_get_load_type(adev, amdgpu_fw_load_type); adev->firmware.load_type = amdgpu_ucode_get_load_type(adev, amdgpu_fw_load_type);
adev->tmz.enabled = amdgpu_is_tmz(adev);
return 0; return 0;
} }
......
/*
* Copyright 2019 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include <drm/drmP.h>
#include "amdgpu.h"
#include "amdgpu_tmz.h"
/**
* amdgpu_is_tmz - validate trust memory zone
*
* @adev: amdgpu_device pointer
*
* Return true if @dev supports trusted memory zones (TMZ), and return false if
* @dev does not support TMZ.
*/
bool amdgpu_is_tmz(struct amdgpu_device *adev)
{
if (!amdgpu_tmz)
return false;
if (adev->asic_type < CHIP_RAVEN || adev->asic_type == CHIP_ARCTURUS) {
dev_warn(adev->dev, "doesn't support trusted memory zones (TMZ)\n");
return false;
}
dev_info(adev->dev, "TMZ feature is enabled\n");
return true;
}
...@@ -33,4 +33,7 @@ struct amdgpu_tmz { ...@@ -33,4 +33,7 @@ struct amdgpu_tmz {
bool enabled; bool enabled;
}; };
extern bool amdgpu_is_tmz(struct amdgpu_device *adev);
#endif #endif
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