Commit 052008ed authored by Kuninori Morimoto's avatar Kuninori Morimoto Committed by Paul Mundt

ARM: mach-shmobile: sh73a0: add MMC data pin pull-up

This patch adds MMC data pin pull-up option for pfc-sh73a0.c,
and select it on ag5evm board.
The MMC read/write will be error without this patch.

Cc: Takashi YOSHII <takashi.yoshii.zj@renesas.com>
Tested-by: default avatarSimon Horman <horms@verge.net.au>
Signed-off-by: default avatarKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent 5e442a49
...@@ -515,14 +515,14 @@ static void __init ag5evm_init(void) ...@@ -515,14 +515,14 @@ static void __init ag5evm_init(void)
/* enable MMCIF */ /* enable MMCIF */
gpio_request(GPIO_FN_MMCCLK0, NULL); gpio_request(GPIO_FN_MMCCLK0, NULL);
gpio_request(GPIO_FN_MMCCMD0_PU, NULL); gpio_request(GPIO_FN_MMCCMD0_PU, NULL);
gpio_request(GPIO_FN_MMCD0_0, NULL); gpio_request(GPIO_FN_MMCD0_0_PU, NULL);
gpio_request(GPIO_FN_MMCD0_1, NULL); gpio_request(GPIO_FN_MMCD0_1_PU, NULL);
gpio_request(GPIO_FN_MMCD0_2, NULL); gpio_request(GPIO_FN_MMCD0_2_PU, NULL);
gpio_request(GPIO_FN_MMCD0_3, NULL); gpio_request(GPIO_FN_MMCD0_3_PU, NULL);
gpio_request(GPIO_FN_MMCD0_4, NULL); gpio_request(GPIO_FN_MMCD0_4_PU, NULL);
gpio_request(GPIO_FN_MMCD0_5, NULL); gpio_request(GPIO_FN_MMCD0_5_PU, NULL);
gpio_request(GPIO_FN_MMCD0_6, NULL); gpio_request(GPIO_FN_MMCD0_6_PU, NULL);
gpio_request(GPIO_FN_MMCD0_7, NULL); gpio_request(GPIO_FN_MMCD0_7_PU, NULL);
gpio_request(GPIO_PORT208, NULL); /* Reset */ gpio_request(GPIO_PORT208, NULL); /* Reset */
gpio_direction_output(GPIO_PORT208, 1); gpio_direction_output(GPIO_PORT208, 1);
......
...@@ -470,6 +470,14 @@ enum { ...@@ -470,6 +470,14 @@ enum {
GPIO_FN_SDHICMD2_PU, GPIO_FN_SDHICMD2_PU,
GPIO_FN_MMCCMD0_PU, GPIO_FN_MMCCMD0_PU,
GPIO_FN_MMCCMD1_PU, GPIO_FN_MMCCMD1_PU,
GPIO_FN_MMCD0_0_PU,
GPIO_FN_MMCD0_1_PU,
GPIO_FN_MMCD0_2_PU,
GPIO_FN_MMCD0_3_PU,
GPIO_FN_MMCD0_4_PU,
GPIO_FN_MMCD0_5_PU,
GPIO_FN_MMCD0_6_PU,
GPIO_FN_MMCD0_7_PU,
GPIO_FN_FSIACK_PU, GPIO_FN_FSIACK_PU,
GPIO_FN_FSIAILR_PU, GPIO_FN_FSIAILR_PU,
GPIO_FN_FSIAIBT_PU, GPIO_FN_FSIAIBT_PU,
......
...@@ -508,6 +508,14 @@ enum { ...@@ -508,6 +508,14 @@ enum {
SDHICMD2_PU_MARK, SDHICMD2_PU_MARK,
MMCCMD0_PU_MARK, MMCCMD0_PU_MARK,
MMCCMD1_PU_MARK, MMCCMD1_PU_MARK,
MMCD0_0_PU_MARK,
MMCD0_1_PU_MARK,
MMCD0_2_PU_MARK,
MMCD0_3_PU_MARK,
MMCD0_4_PU_MARK,
MMCD0_5_PU_MARK,
MMCD0_6_PU_MARK,
MMCD0_7_PU_MARK,
FSIBISLD_PU_MARK, FSIBISLD_PU_MARK,
FSIACK_PU_MARK, FSIACK_PU_MARK,
FSIAILR_PU_MARK, FSIAILR_PU_MARK,
...@@ -1561,6 +1569,24 @@ static pinmux_enum_t pinmux_data[] = { ...@@ -1561,6 +1569,24 @@ static pinmux_enum_t pinmux_data[] = {
MSEL4CR_MSEL15_0), MSEL4CR_MSEL15_0),
PINMUX_DATA(MMCCMD1_PU_MARK, PORT297_FN2, PORT297_IN_PU, PINMUX_DATA(MMCCMD1_PU_MARK, PORT297_FN2, PORT297_IN_PU,
MSEL4CR_MSEL15_1), MSEL4CR_MSEL15_1),
PINMUX_DATA(MMCD0_0_PU_MARK,
PORT271_FN1, PORT271_IN_PU, MSEL4CR_MSEL15_0),
PINMUX_DATA(MMCD0_1_PU_MARK,
PORT272_FN1, PORT272_IN_PU, MSEL4CR_MSEL15_0),
PINMUX_DATA(MMCD0_2_PU_MARK,
PORT273_FN1, PORT273_IN_PU, MSEL4CR_MSEL15_0),
PINMUX_DATA(MMCD0_3_PU_MARK,
PORT274_FN1, PORT274_IN_PU, MSEL4CR_MSEL15_0),
PINMUX_DATA(MMCD0_4_PU_MARK,
PORT275_FN1, PORT275_IN_PU, MSEL4CR_MSEL15_0),
PINMUX_DATA(MMCD0_5_PU_MARK,
PORT276_FN1, PORT276_IN_PU, MSEL4CR_MSEL15_0),
PINMUX_DATA(MMCD0_6_PU_MARK,
PORT277_FN1, PORT277_IN_PU, MSEL4CR_MSEL15_0),
PINMUX_DATA(MMCD0_7_PU_MARK,
PORT278_FN1, PORT278_IN_PU, MSEL4CR_MSEL15_0),
PINMUX_DATA(FSIBISLD_PU_MARK, PORT39_FN1, PORT39_IN_PU), PINMUX_DATA(FSIBISLD_PU_MARK, PORT39_FN1, PORT39_IN_PU),
PINMUX_DATA(FSIACK_PU_MARK, PORT49_FN1, PORT49_IN_PU), PINMUX_DATA(FSIACK_PU_MARK, PORT49_FN1, PORT49_IN_PU),
PINMUX_DATA(FSIAILR_PU_MARK, PORT50_FN5, PORT50_IN_PU), PINMUX_DATA(FSIAILR_PU_MARK, PORT50_FN5, PORT50_IN_PU),
...@@ -2236,6 +2262,14 @@ static struct pinmux_gpio pinmux_gpios[] = { ...@@ -2236,6 +2262,14 @@ static struct pinmux_gpio pinmux_gpios[] = {
GPIO_FN(SDHICMD2_PU), GPIO_FN(SDHICMD2_PU),
GPIO_FN(MMCCMD0_PU), GPIO_FN(MMCCMD0_PU),
GPIO_FN(MMCCMD1_PU), GPIO_FN(MMCCMD1_PU),
GPIO_FN(MMCD0_0_PU),
GPIO_FN(MMCD0_1_PU),
GPIO_FN(MMCD0_2_PU),
GPIO_FN(MMCD0_3_PU),
GPIO_FN(MMCD0_4_PU),
GPIO_FN(MMCD0_5_PU),
GPIO_FN(MMCD0_6_PU),
GPIO_FN(MMCD0_7_PU),
GPIO_FN(FSIACK_PU), GPIO_FN(FSIACK_PU),
GPIO_FN(FSIAILR_PU), GPIO_FN(FSIAILR_PU),
GPIO_FN(FSIAIBT_PU), GPIO_FN(FSIAIBT_PU),
......
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