Commit 06792c4d authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'for-linux-3.3-merge-window' of git://linux-c6x.org/git/projects/linux-c6x-upstreaming

* tag 'for-linux-3.3-merge-window' of git://linux-c6x.org/git/projects/linux-c6x-upstreaming: (29 commits)
  C6X: replace tick_nohz_stop/restart_sched_tick calls
  C6X: add register_cpu call
  C6X: deal with memblock API changes
  C6X: fix timer64 initialization
  C6X: fix layout of EMIFA registers
  C6X: MAINTAINERS
  C6X: DSCR - Device State Configuration Registers
  C6X: EMIF - External Memory Interface
  C6X: general SoC support
  C6X: library code
  C6X: headers
  C6X: ptrace support
  C6X: loadable module support
  C6X: cache control
  C6X: clocks
  C6X: build infrastructure
  C6X: syscalls
  C6X: interrupt handling
  C6X: time management
  C6X: signal management
  ...
parents 4690dfa8 166c0eae
C6X PLL Clock Controllers
-------------------------
This is a first-cut support for the SoC clock controllers. This is still
under development and will probably change as the common device tree
clock support is added to the kernel.
Required properties:
- compatible: "ti,c64x+pll"
May also have SoC-specific value to support SoC-specific initialization
in the driver. One of:
"ti,c6455-pll"
"ti,c6457-pll"
"ti,c6472-pll"
"ti,c6474-pll"
- reg: base address and size of register area
- clock-frequency: input clock frequency in hz
Optional properties:
- ti,c64x+pll-bypass-delay: CPU cycles to delay when entering bypass mode
- ti,c64x+pll-reset-delay: CPU cycles to delay after PLL reset
- ti,c64x+pll-lock-delay: CPU cycles to delay after PLL frequency change
Example:
clock-controller@29a0000 {
compatible = "ti,c6472-pll", "ti,c64x+pll";
reg = <0x029a0000 0x200>;
clock-frequency = <25000000>;
ti,c64x+pll-bypass-delay = <200>;
ti,c64x+pll-reset-delay = <12000>;
ti,c64x+pll-lock-delay = <80000>;
};
Device State Configuration Registers
------------------------------------
TI C6X SoCs contain a region of miscellaneous registers which provide various
function for SoC control or status. Details vary considerably among from SoC
to SoC with no two being alike.
In general, the Device State Configuraion Registers (DSCR) will provide one or
more configuration registers often protected by a lock register where one or
more key values must be written to a lock register in order to unlock the
configuration register for writes. These configuration register may be used to
enable (and disable in some cases) SoC pin drivers, select peripheral clock
sources (internal or pin), etc. In some cases, a configuration register is
write once or the individual bits are write once. In addition to device config,
the DSCR block may provide registers which which are used to reset peripherals,
provide device ID information, provide ethernet MAC addresses, as well as other
miscellaneous functions.
For device state control (enable/disable), each device control is assigned an
id which is used by individual device drivers to control the state as needed.
Required properties:
- compatible: must be "ti,c64x+dscr"
- reg: register area base and size
Optional properties:
NOTE: These are optional in that not all SoCs will have all properties. For
SoCs which do support a given property, leaving the property out of the
device tree will result in reduced functionality or possibly driver
failure.
- ti,dscr-devstat
offset of the devstat register
- ti,dscr-silicon-rev
offset, start bit, and bitsize of silicon revision field
- ti,dscr-rmii-resets
offset and bitmask of RMII reset field. May have multiple tuples if more
than one ethernet port is available.
- ti,dscr-locked-regs
possibly multiple tuples describing registers which are write protected by
a lock register. Each tuple consists of the register offset, lock register
offsset, and the key value used to unlock the register.
- ti,dscr-kick-regs
offset and key values of two "kick" registers used to write protect other
registers in DSCR. On SoCs using kick registers, the first key must be
written to the first kick register and the second key must be written to
the second register before other registers in the area are write-enabled.
- ti,dscr-mac-fuse-regs
MAC addresses are contained in two registers. Each element of a MAC address
is contained in a single byte. This property has two tuples. Each tuple has
a register offset and four cells representing bytes in the register from
most significant to least. The value of these four cells is the MAC byte
index (1-6) of the byte within the register. A value of 0 means the byte
is unused in the MAC address.
- ti,dscr-devstate-ctl-regs
This property describes the bitfields used to control the state of devices.
Each tuple describes a range of identical bitfields used to control one or
more devices (one bitfield per device). The layout of each tuple is:
start_id num_ids reg enable disable start_bit nbits
Where:
start_id is device id for the first device control in the range
num_ids is the number of device controls in the range
reg is the offset of the register holding the control bits
enable is the value to enable a device
disable is the value to disable a device (0xffffffff if cannot disable)
start_bit is the bit number of the first bit in the range
nbits is the number of bits per device control
- ti,dscr-devstate-stat-regs
This property describes the bitfields used to provide device state status
for device states controlled by the DSCR. Each tuple describes a range of
identical bitfields used to provide status for one or more devices (one
bitfield per device). The layout of each tuple is:
start_id num_ids reg enable disable start_bit nbits
Where:
start_id is device id for the first device status in the range
num_ids is the number of devices covered by the range
reg is the offset of the register holding the status bits
enable is the value indicating device is enabled
disable is the value indicating device is disabled
start_bit is the bit number of the first bit in the range
nbits is the number of bits per device status
- ti,dscr-privperm
Offset and default value for register used to set access privilege for
some SoC devices.
Example:
device-state-config-regs@2a80000 {
compatible = "ti,c64x+dscr";
reg = <0x02a80000 0x41000>;
ti,dscr-devstat = <0>;
ti,dscr-silicon-rev = <8 28 0xf>;
ti,dscr-rmii-resets = <0x40020 0x00040000>;
ti,dscr-locked-regs = <0x40008 0x40004 0x0f0a0b00>;
ti,dscr-devstate-ctl-regs =
<0 12 0x40008 1 0 0 2
12 1 0x40008 3 0 30 2
13 2 0x4002c 1 0xffffffff 0 1>;
ti,dscr-devstate-stat-regs =
<0 10 0x40014 1 0 0 3
10 2 0x40018 1 0 0 3>;
ti,dscr-mac-fuse-regs = <0x700 1 2 3 4
0x704 5 6 0 0>;
ti,dscr-privperm = <0x41c 0xaaaaaaaa>;
ti,dscr-kick-regs = <0x38 0x83E70B13
0x3c 0x95A4F1E0>;
};
External Memory Interface
-------------------------
The emifa node describes a simple external bus controller found on some C6X
SoCs. This interface provides external busses with a number of chip selects.
Required properties:
- compatible: must be "ti,c64x+emifa", "simple-bus"
- reg: register area base and size
- #address-cells: must be 2 (chip-select + offset)
- #size-cells: must be 1
- ranges: mapping from EMIFA space to parent space
Optional properties:
- ti,dscr-dev-enable: Device ID if EMIF is enabled/disabled from DSCR
- ti,emifa-burst-priority:
Number of memory transfers after which the EMIF will elevate the priority
of the oldest command in the command FIFO. Setting this field to 255
disables this feature, thereby allowing old commands to stay in the FIFO
indefinitely.
- ti,emifa-ce-config:
Configuration values for each of the supported chip selects.
Example:
emifa@70000000 {
compatible = "ti,c64x+emifa", "simple-bus";
#address-cells = <2>;
#size-cells = <1>;
reg = <0x70000000 0x100>;
ranges = <0x2 0x0 0xa0000000 0x00000008
0x3 0x0 0xb0000000 0x00400000
0x4 0x0 0xc0000000 0x10000000
0x5 0x0 0xD0000000 0x10000000>;
ti,dscr-dev-enable = <13>;
ti,emifa-burst-priority = <255>;
ti,emifa-ce-config = <0x00240120
0x00240120
0x00240122
0x00240122>;
flash@3,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0x3 0x0 0x400000>;
bank-width = <1>;
device-width = <1>;
partition@0 {
reg = <0x0 0x400000>;
label = "NOR";
};
};
};
This shows a flash chip attached to chip select 3.
C6X Interrupt Chips
-------------------
* C64X+ Core Interrupt Controller
The core interrupt controller provides 16 prioritized interrupts to the
C64X+ core. Priority 0 and 1 are used for reset and NMI respectively.
Priority 2 and 3 are reserved. Priority 4-15 are used for interrupt
sources coming from outside the core.
Required properties:
--------------------
- compatible: Should be "ti,c64x+core-pic";
- #interrupt-cells: <1>
Interrupt Specifier Definition
------------------------------
Single cell specifying the core interrupt priority level (4-15) where
4 is highest priority and 15 is lowest priority.
Example
-------
core_pic: interrupt-controller@0 {
interrupt-controller;
#interrupt-cells = <1>;
compatible = "ti,c64x+core-pic";
};
* C64x+ Megamodule Interrupt Controller
The megamodule PIC consists of four interrupt mupliplexers each of which
combine up to 32 interrupt inputs into a single interrupt output which
may be cascaded into the core interrupt controller. The megamodule PIC
has a total of 12 outputs cascading into the core interrupt controller.
One for each core interrupt priority level. In addition to the combined
interrupt sources, individual megamodule interrupts may be cascaded to
the core interrupt controller. When an individual interrupt is cascaded,
it is no longer handled through a megamodule interrupt combiner and is
considered to have the core interrupt controller as the parent.
Required properties:
--------------------
- compatible: "ti,c64x+megamod-pic"
- interrupt-controller
- #interrupt-cells: <1>
- reg: base address and size of register area
- interrupt-parent: must be core interrupt controller
- interrupts: This should have four cells; one for each interrupt combiner.
The cells contain the core priority interrupt to which the
corresponding combiner output is wired.
Optional properties:
--------------------
- ti,c64x+megamod-pic-mux: Array of 12 cells correspnding to the 12 core
priority interrupts. The first cell corresponds to
core priority 4 and the last cell corresponds to
core priority 15. The value of each cell is the
megamodule interrupt source which is MUXed to
the core interrupt corresponding to the cell
position. Allowed values are 4 - 127. Mapping for
interrupts 0 - 3 (combined interrupt sources) are
ignored.
Interrupt Specifier Definition
------------------------------
Single cell specifying the megamodule interrupt source (4-127). Note that
interrupts mapped directly to the core with "ti,c64x+megamod-pic-mux" will
use the core interrupt controller as their parent and the specifier will
be the core priority level, not the megamodule interrupt number.
Examples
--------
megamod_pic: interrupt-controller@1800000 {
compatible = "ti,c64x+megamod-pic";
interrupt-controller;
#interrupt-cells = <1>;
reg = <0x1800000 0x1000>;
interrupt-parent = <&core_pic>;
interrupts = < 12 13 14 15 >;
};
This is a minimal example where all individual interrupts go through a
combiner. Combiner-0 is mapped to core interrupt 12, combiner-1 is mapped
to interrupt 13, etc.
megamod_pic: interrupt-controller@1800000 {
compatible = "ti,c64x+megamod-pic";
interrupt-controller;
#interrupt-cells = <1>;
reg = <0x1800000 0x1000>;
interrupt-parent = <&core_pic>;
interrupts = < 12 13 14 15 >;
ti,c64x+megamod-pic-mux = < 0 0 0 0
32 0 0 0
0 0 0 0 >;
};
This the same as the first example except that megamodule interrupt 32 is
mapped directly to core priority interrupt 8. The node using this interrupt
must set the core controller as its interrupt parent and use 8 in the
interrupt specifier value.
C6X System-on-Chip
------------------
Required properties:
- compatible: "simple-bus"
- #address-cells: must be 1
- #size-cells: must be 1
- ranges
Optional properties:
- model: specific SoC model
- nodes for IP blocks within SoC
Example:
soc {
compatible = "simple-bus";
model = "tms320c6455";
#address-cells = <1>;
#size-cells = <1>;
ranges;
...
};
Timer64
-------
The timer64 node describes C6X event timers.
Required properties:
- compatible: must be "ti,c64x+timer64"
- reg: base address and size of register region
- interrupt-parent: interrupt controller
- interrupts: interrupt id
Optional properties:
- ti,dscr-dev-enable: Device ID used to enable timer IP through DSCR interface.
- ti,core-mask: on multi-core SoCs, bitmask of cores allowed to use this timer.
Example:
timer0: timer@25e0000 {
compatible = "ti,c64x+timer64";
ti,core-mask = < 0x01 >;
reg = <0x25e0000 0x40>;
interrupt-parent = <&megamod_pic>;
interrupts = < 16 >;
};
...@@ -1645,6 +1645,14 @@ T: git git://git.alsa-project.org/alsa-kernel.git ...@@ -1645,6 +1645,14 @@ T: git git://git.alsa-project.org/alsa-kernel.git
S: Maintained S: Maintained
F: sound/pci/oxygen/ F: sound/pci/oxygen/
C6X ARCHITECTURE
M: Mark Salter <msalter@redhat.com>
M: Aurelien Jacquiot <a-jacquiot@ti.com>
L: linux-c6x-dev@linux-c6x.org
W: http://www.linux-c6x.org/wiki/index.php/Main_Page
S: Maintained
F: arch/c6x/
CACHEFILES: FS-CACHE BACKEND FOR CACHING ON MOUNTED FILESYSTEMS CACHEFILES: FS-CACHE BACKEND FOR CACHING ON MOUNTED FILESYSTEMS
M: David Howells <dhowells@redhat.com> M: David Howells <dhowells@redhat.com>
L: linux-cachefs@redhat.com L: linux-cachefs@redhat.com
......
#
# For a description of the syntax of this configuration file,
# see Documentation/kbuild/kconfig-language.txt.
#
config TMS320C6X
def_bool y
select CLKDEV_LOOKUP
select GENERIC_IRQ_SHOW
select HAVE_ARCH_TRACEHOOK
select HAVE_DMA_API_DEBUG
select HAVE_GENERIC_HARDIRQS
select HAVE_MEMBLOCK
select HAVE_SPARSE_IRQ
select OF
select OF_EARLY_FLATTREE
config MMU
def_bool n
config ZONE_DMA
def_bool y
config FPU
def_bool n
config HIGHMEM
def_bool n
config NUMA
def_bool n
config RWSEM_GENERIC_SPINLOCK
def_bool y
config RWSEM_XCHGADD_ALGORITHM
def_bool n
config GENERIC_CALIBRATE_DELAY
def_bool y
config GENERIC_HWEIGHT
def_bool y
config GENERIC_CLOCKEVENTS
def_bool y
config GENERIC_CLOCKEVENTS_BROADCAST
bool
config GENERIC_BUG
def_bool y
config COMMON_CLKDEV
def_bool y
config C6X_BIG_KERNEL
bool "Build a big kernel"
help
The C6X function call instruction has a limited range of +/- 2MiB.
This is sufficient for most kernels, but some kernel configurations
with lots of compiled-in functionality may require a larger range
for function calls. Use this option to have the compiler generate
function calls with 32-bit range. This will make the kernel both
larger and slower.
If unsure, say N.
source "init/Kconfig"
# Use the generic interrupt handling code in kernel/irq/
source "kernel/Kconfig.freezer"
config CMDLINE_BOOL
bool "Default bootloader kernel arguments"
config CMDLINE
string "Kernel command line"
depends on CMDLINE_BOOL
default "console=ttyS0,57600"
help
On some architectures there is currently no way for the boot loader
to pass arguments to the kernel. For these architectures, you should
supply some command-line options at build time by entering them
here.
config CMDLINE_FORCE
bool "Force default kernel command string"
depends on CMDLINE_BOOL
default n
help
Set this to have arguments from the default kernel command string
override those passed by the boot loader.
config CPU_BIG_ENDIAN
bool "Build big-endian kernel"
default n
help
Say Y if you plan on running a kernel in big-endian mode.
Note that your board must be properly built and your board
port must properly enable any big-endian related features
of your chipset/board/processor.
config FORCE_MAX_ZONEORDER
int "Maximum zone order"
default "13"
help
The kernel memory allocator divides physically contiguous memory
blocks into "zones", where each zone is a power of two number of
pages. This option selects the largest power of two that the kernel
keeps in the memory allocator. If you need to allocate very large
blocks of physically contiguous memory, then you may need to
increase this value.
This config option is actually maximum order plus one. For example,
a value of 11 means that the largest free memory block is 2^10 pages.
menu "Processor type and features"
source "arch/c6x/platforms/Kconfig"
config TMS320C6X_CACHES_ON
bool "L2 cache support"
default y
config KERNEL_RAM_BASE_ADDRESS
hex "Virtual address of memory base"
default 0xe0000000 if SOC_TMS320C6455
default 0xe0000000 if SOC_TMS320C6457
default 0xe0000000 if SOC_TMS320C6472
default 0x80000000
source "mm/Kconfig"
source "kernel/Kconfig.preempt"
source "kernel/Kconfig.hz"
source "kernel/time/Kconfig"
endmenu
menu "Executable file formats"
source "fs/Kconfig.binfmt"
endmenu
source "net/Kconfig"
source "drivers/Kconfig"
source "fs/Kconfig"
source "security/Kconfig"
source "crypto/Kconfig"
source "lib/Kconfig"
menu "Kernel hacking"
source "lib/Kconfig.debug"
config ACCESS_CHECK
bool "Check the user pointer address"
default y
help
Usually the pointer transfer from user space is checked to see if its
address is in the kernel space.
Say N here to disable that check to improve the performance.
endmenu
#
# linux/arch/c6x/Makefile
#
# This file is subject to the terms and conditions of the GNU General Public
# License. See the file "COPYING" in the main directory of this archive
# for more details.
#
cflags-y += -mno-dsbt -msdata=none
cflags-$(CONFIG_C6X_BIG_KERNEL) += -mlong-calls
CFLAGS_MODULE += -mlong-calls -mno-dsbt -msdata=none
CHECKFLAGS +=
KBUILD_CFLAGS += $(cflags-y)
KBUILD_AFLAGS += $(cflags-y)
ifdef CONFIG_CPU_BIG_ENDIAN
KBUILD_CFLAGS += -mbig-endian
KBUILD_AFLAGS += -mbig-endian
LINKFLAGS += -mbig-endian
KBUILD_LDFLAGS += -mbig-endian
LDFLAGS += -EB
endif
head-y := arch/c6x/kernel/head.o
core-y += arch/c6x/kernel/ arch/c6x/mm/ arch/c6x/platforms/
libs-y += arch/c6x/lib/
# Default to vmlinux.bin, override when needed
all: vmlinux.bin
boot := arch/$(ARCH)/boot
# Are we making a dtbImage.<boardname> target? If so, crack out the boardname
DTB:=$(subst dtbImage.,,$(filter dtbImage.%, $(MAKECMDGOALS)))
export DTB
ifneq ($(DTB),)
core-y += $(boot)/
endif
# With make 3.82 we cannot mix normal and wildcard targets
vmlinux.bin: vmlinux
$(Q)$(MAKE) $(build)=$(boot) $(patsubst %,$(boot)/%,$@)
dtbImage.%: vmlinux
$(Q)$(MAKE) $(build)=$(boot) $(patsubst %,$(boot)/%,$@)
archclean:
$(Q)$(MAKE) $(clean)=$(boot)
define archhelp
@echo ' vmlinux.bin - Binary kernel image (arch/$(ARCH)/boot/vmlinux.bin)'
@echo ' dtbImage.<dt> - ELF image with $(arch)/boot/dts/<dt>.dts linked in'
@echo ' - stripped elf with fdt blob'
endef
#
# Makefile for bootable kernel images
#
OBJCOPYFLAGS_vmlinux.bin := -O binary
$(obj)/vmlinux.bin: vmlinux FORCE
$(call if_changed,objcopy)
DTC_FLAGS ?= -p 1024
ifneq ($(DTB),)
obj-y += linked_dtb.o
endif
$(obj)/%.dtb: $(src)/dts/%.dts FORCE
$(call cmd,dtc)
quiet_cmd_cp = CP $< $@$2
cmd_cp = cat $< >$@$2 || (rm -f $@ && echo false)
# Generate builtin.dtb from $(DTB).dtb
$(obj)/builtin.dtb: $(obj)/$(DTB).dtb
$(call if_changed,cp)
$(obj)/linked_dtb.o: $(obj)/builtin.dtb
$(obj)/dtbImage.%: vmlinux
$(call if_changed,objcopy)
clean-files := $(obj)/*.dtb
/*
* arch/c6x/boot/dts/dsk6455.dts
*
* DSK6455 Evaluation Platform For TMS320C6455
* Copyright (C) 2011 Texas Instruments Incorporated
*
* Author: Mark Salter <msalter@redhat.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
*/
/dts-v1/;
/include/ "tms320c6455.dtsi"
/ {
model = "Spectrum Digital DSK6455";
compatible = "spectrum-digital,dsk6455";
chosen {
bootargs = "root=/dev/nfs ip=dhcp rw";
};
memory {
device_type = "memory";
reg = <0xE0000000 0x08000000>;
};
soc {
megamod_pic: interrupt-controller@1800000 {
interrupts = < 12 13 14 15 >;
};
emifa@70000000 {
flash@3,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0x3 0x0 0x400000>;
bank-width = <1>;
device-width = <1>;
partition@0 {
reg = <0x0 0x400000>;
label = "NOR";
};
};
};
timer1: timer@2980000 {
interrupt-parent = <&megamod_pic>;
interrupts = < 69 >;
};
clock-controller@029a0000 {
clock-frequency = <50000000>;
};
};
};
/*
* arch/c6x/boot/dts/evmc6457.dts
*
* EVMC6457 Evaluation Platform For TMS320C6457
*
* Copyright (C) 2011 Texas Instruments Incorporated
*
* Author: Mark Salter <msalter@redhat.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
*/
/dts-v1/;
/include/ "tms320c6457.dtsi"
/ {
model = "eInfochips EVMC6457";
compatible = "einfochips,evmc6457";
chosen {
bootargs = "console=hvc root=/dev/nfs ip=dhcp rw";
};
memory {
device_type = "memory";
reg = <0xE0000000 0x10000000>;
};
soc {
megamod_pic: interrupt-controller@1800000 {
interrupts = < 12 13 14 15 >;
};
timer0: timer@2940000 {
interrupt-parent = <&megamod_pic>;
interrupts = < 67 >;
};
clock-controller@29a0000 {
clock-frequency = <60000000>;
};
};
};
/*
* arch/c6x/boot/dts/evmc6472.dts
*
* EVMC6472 Evaluation Platform For TMS320C6472
*
* Copyright (C) 2011 Texas Instruments Incorporated
*
* Author: Mark Salter <msalter@redhat.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
*/
/dts-v1/;
/include/ "tms320c6472.dtsi"
/ {
model = "eInfochips EVMC6472";
compatible = "einfochips,evmc6472";
chosen {
bootargs = "console=hvc root=/dev/nfs ip=dhcp rw";
};
memory {
device_type = "memory";
reg = <0xE0000000 0x10000000>;
};
soc {
megamod_pic: interrupt-controller@1800000 {
interrupts = < 12 13 14 15 >;
};
timer0: timer@25e0000 {
interrupt-parent = <&megamod_pic>;
interrupts = < 16 >;
};
timer1: timer@25f0000 {
interrupt-parent = <&megamod_pic>;
interrupts = < 16 >;
};
timer2: timer@2600000 {
interrupt-parent = <&megamod_pic>;
interrupts = < 16 >;
};
timer3: timer@2610000 {
interrupt-parent = <&megamod_pic>;
interrupts = < 16 >;
};
timer4: timer@2620000 {
interrupt-parent = <&megamod_pic>;
interrupts = < 16 >;
};
timer5: timer@2630000 {
interrupt-parent = <&megamod_pic>;
interrupts = < 16 >;
};
clock-controller@29a0000 {
clock-frequency = <25000000>;
};
};
};
/*
* arch/c6x/boot/dts/evmc6474.dts
*
* EVMC6474 Evaluation Platform For TMS320C6474
*
* Copyright (C) 2011 Texas Instruments Incorporated
*
* Author: Mark Salter <msalter@redhat.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
*/
/dts-v1/;
/include/ "tms320c6474.dtsi"
/ {
model = "Spectrum Digital EVMC6474";
compatible = "spectrum-digital,evmc6474";
chosen {
bootargs = "console=hvc root=/dev/nfs ip=dhcp rw";
};
memory {
device_type = "memory";
reg = <0x80000000 0x08000000>;
};
soc {
megamod_pic: interrupt-controller@1800000 {
interrupts = < 12 13 14 15 >;
};
timer3: timer@2940000 {
interrupt-parent = <&megamod_pic>;
interrupts = < 39 >;
};
timer4: timer@2950000 {
interrupt-parent = <&megamod_pic>;
interrupts = < 41 >;
};
timer5: timer@2960000 {
interrupt-parent = <&megamod_pic>;
interrupts = < 43 >;
};
clock-controller@29a0000 {
clock-frequency = <50000000>;
};
};
};
/ {
#address-cells = <1>;
#size-cells = <1>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
model = "ti,c64x+";
reg = <0>;
};
};
soc {
compatible = "simple-bus";
model = "tms320c6455";
#address-cells = <1>;
#size-cells = <1>;
ranges;
core_pic: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
compatible = "ti,c64x+core-pic";
};
/*
* Megamodule interrupt controller
*/
megamod_pic: interrupt-controller@1800000 {
compatible = "ti,c64x+megamod-pic";
interrupt-controller;
#interrupt-cells = <1>;
reg = <0x1800000 0x1000>;
interrupt-parent = <&core_pic>;
};
cache-controller@1840000 {
compatible = "ti,c64x+cache";
reg = <0x01840000 0x8400>;
};
emifa@70000000 {
compatible = "ti,c64x+emifa", "simple-bus";
#address-cells = <2>;
#size-cells = <1>;
reg = <0x70000000 0x100>;
ranges = <0x2 0x0 0xa0000000 0x00000008
0x3 0x0 0xb0000000 0x00400000
0x4 0x0 0xc0000000 0x10000000
0x5 0x0 0xD0000000 0x10000000>;
ti,dscr-dev-enable = <13>;
ti,emifa-burst-priority = <255>;
ti,emifa-ce-config = <0x00240120
0x00240120
0x00240122
0x00240122>;
};
timer1: timer@2980000 {
compatible = "ti,c64x+timer64";
reg = <0x2980000 0x40>;
ti,dscr-dev-enable = <4>;
};
clock-controller@029a0000 {
compatible = "ti,c6455-pll", "ti,c64x+pll";
reg = <0x029a0000 0x200>;
ti,c64x+pll-bypass-delay = <1440>;
ti,c64x+pll-reset-delay = <15360>;
ti,c64x+pll-lock-delay = <24000>;
};
device-state-config-regs@2a80000 {
compatible = "ti,c64x+dscr";
reg = <0x02a80000 0x41000>;
ti,dscr-devstat = <0>;
ti,dscr-silicon-rev = <8 28 0xf>;
ti,dscr-rmii-resets = <0 0x40020 0x00040000>;
ti,dscr-locked-regs = <0x40008 0x40004 0x0f0a0b00>;
ti,dscr-devstate-ctl-regs =
<0 12 0x40008 1 0 0 2
12 1 0x40008 3 0 30 2
13 2 0x4002c 1 0xffffffff 0 1>;
ti,dscr-devstate-stat-regs =
<0 10 0x40014 1 0 0 3
10 2 0x40018 1 0 0 3>;
};
};
};
/ {
#address-cells = <1>;
#size-cells = <1>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
model = "ti,c64x+";
reg = <0>;
};
};
soc {
compatible = "simple-bus";
model = "tms320c6457";
#address-cells = <1>;
#size-cells = <1>;
ranges;
core_pic: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
compatible = "ti,c64x+core-pic";
};
megamod_pic: interrupt-controller@1800000 {
compatible = "ti,c64x+megamod-pic";
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&core_pic>;
reg = <0x1800000 0x1000>;
};
cache-controller@1840000 {
compatible = "ti,c64x+cache";
reg = <0x01840000 0x8400>;
};
device-state-controller@2880800 {
compatible = "ti,c64x+dscr";
reg = <0x02880800 0x400>;
ti,dscr-devstat = <0x20>;
ti,dscr-silicon-rev = <0x18 28 0xf>;
ti,dscr-mac-fuse-regs = <0x114 3 4 5 6
0x118 0 0 1 2>;
ti,dscr-kick-regs = <0x38 0x83E70B13
0x3c 0x95A4F1E0>;
};
timer0: timer@2940000 {
compatible = "ti,c64x+timer64";
reg = <0x2940000 0x40>;
};
clock-controller@29a0000 {
compatible = "ti,c6457-pll", "ti,c64x+pll";
reg = <0x029a0000 0x200>;
ti,c64x+pll-bypass-delay = <300>;
ti,c64x+pll-reset-delay = <24000>;
ti,c64x+pll-lock-delay = <50000>;
};
};
};
/ {
#address-cells = <1>;
#size-cells = <1>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
reg = <0>;
model = "ti,c64x+";
};
cpu@1 {
device_type = "cpu";
reg = <1>;
model = "ti,c64x+";
};
cpu@2 {
device_type = "cpu";
reg = <2>;
model = "ti,c64x+";
};
cpu@3 {
device_type = "cpu";
reg = <3>;
model = "ti,c64x+";
};
cpu@4 {
device_type = "cpu";
reg = <4>;
model = "ti,c64x+";
};
cpu@5 {
device_type = "cpu";
reg = <5>;
model = "ti,c64x+";
};
};
soc {
compatible = "simple-bus";
model = "tms320c6472";
#address-cells = <1>;
#size-cells = <1>;
ranges;
core_pic: interrupt-controller {
compatible = "ti,c64x+core-pic";
interrupt-controller;
#interrupt-cells = <1>;
};
megamod_pic: interrupt-controller@1800000 {
compatible = "ti,c64x+megamod-pic";
interrupt-controller;
#interrupt-cells = <1>;
reg = <0x1800000 0x1000>;
interrupt-parent = <&core_pic>;
};
cache-controller@1840000 {
compatible = "ti,c64x+cache";
reg = <0x01840000 0x8400>;
};
timer0: timer@25e0000 {
compatible = "ti,c64x+timer64";
ti,core-mask = < 0x01 >;
reg = <0x25e0000 0x40>;
};
timer1: timer@25f0000 {
compatible = "ti,c64x+timer64";
ti,core-mask = < 0x02 >;
reg = <0x25f0000 0x40>;
};
timer2: timer@2600000 {
compatible = "ti,c64x+timer64";
ti,core-mask = < 0x04 >;
reg = <0x2600000 0x40>;
};
timer3: timer@2610000 {
compatible = "ti,c64x+timer64";
ti,core-mask = < 0x08 >;
reg = <0x2610000 0x40>;
};
timer4: timer@2620000 {
compatible = "ti,c64x+timer64";
ti,core-mask = < 0x10 >;
reg = <0x2620000 0x40>;
};
timer5: timer@2630000 {
compatible = "ti,c64x+timer64";
ti,core-mask = < 0x20 >;
reg = <0x2630000 0x40>;
};
clock-controller@29a0000 {
compatible = "ti,c6472-pll", "ti,c64x+pll";
reg = <0x029a0000 0x200>;
ti,c64x+pll-bypass-delay = <200>;
ti,c64x+pll-reset-delay = <12000>;
ti,c64x+pll-lock-delay = <80000>;
};
device-state-controller@2a80000 {
compatible = "ti,c64x+dscr";
reg = <0x02a80000 0x1000>;
ti,dscr-devstat = <0>;
ti,dscr-silicon-rev = <0x70c 16 0xff>;
ti,dscr-mac-fuse-regs = <0x700 1 2 3 4
0x704 5 6 0 0>;
ti,dscr-rmii-resets = <0x208 1
0x20c 1>;
ti,dscr-locked-regs = <0x200 0x204 0x0a1e183a
0x40c 0x420 0xbea7
0x41c 0x420 0xbea7>;
ti,dscr-privperm = <0x41c 0xaaaaaaaa>;
ti,dscr-devstate-ctl-regs = <0 13 0x200 1 0 0 1>;
};
};
};
/ {
#address-cells = <1>;
#size-cells = <1>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
reg = <0>;
model = "ti,c64x+";
};
cpu@1 {
device_type = "cpu";
reg = <1>;
model = "ti,c64x+";
};
cpu@2 {
device_type = "cpu";
reg = <2>;
model = "ti,c64x+";
};
};
soc {
compatible = "simple-bus";
model = "tms320c6474";
#address-cells = <1>;
#size-cells = <1>;
ranges;
core_pic: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
compatible = "ti,c64x+core-pic";
};
megamod_pic: interrupt-controller@1800000 {
compatible = "ti,c64x+megamod-pic";
interrupt-controller;
#interrupt-cells = <1>;
reg = <0x1800000 0x1000>;
interrupt-parent = <&core_pic>;
};
cache-controller@1840000 {
compatible = "ti,c64x+cache";
reg = <0x01840000 0x8400>;
};
timer3: timer@2940000 {
compatible = "ti,c64x+timer64";
ti,core-mask = < 0x04 >;
reg = <0x2940000 0x40>;
};
timer4: timer@2950000 {
compatible = "ti,c64x+timer64";
ti,core-mask = < 0x02 >;
reg = <0x2950000 0x40>;
};
timer5: timer@2960000 {
compatible = "ti,c64x+timer64";
ti,core-mask = < 0x01 >;
reg = <0x2960000 0x40>;
};
device-state-controller@2880800 {
compatible = "ti,c64x+dscr";
reg = <0x02880800 0x400>;
ti,dscr-devstat = <0x004>;
ti,dscr-silicon-rev = <0x014 28 0xf>;
ti,dscr-mac-fuse-regs = <0x34 3 4 5 6
0x38 0 0 1 2>;
};
clock-controller@29a0000 {
compatible = "ti,c6474-pll", "ti,c64x+pll";
reg = <0x029a0000 0x200>;
ti,c64x+pll-bypass-delay = <120>;
ti,c64x+pll-reset-delay = <30000>;
ti,c64x+pll-lock-delay = <60000>;
};
};
};
.section __fdt_blob,"a"
.incbin "arch/c6x/boot/builtin.dtb"
CONFIG_SOC_TMS320C6455=y
CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_SYSVIPC=y
CONFIG_SPARSE_IRQ=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_NAMESPACES=y
# CONFIG_UTS_NS is not set
# CONFIG_USER_NS is not set
# CONFIG_PID_NS is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_EXPERT=y
# CONFIG_FUTEX is not set
# CONFIG_SLUB_DEBUG is not set
CONFIG_MODULES=y
CONFIG_MODULE_FORCE_LOAD=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE=""
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=2
CONFIG_BLK_DEV_RAM_SIZE=17000
CONFIG_MISC_DEVICES=y
# CONFIG_INPUT is not set
# CONFIG_SERIO is not set
# CONFIG_VT is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_HWMON is not set
# CONFIG_USB_SUPPORT is not set
# CONFIG_IOMMU_SUPPORT is not set
# CONFIG_MISC_FILESYSTEMS is not set
CONFIG_CRC16=y
# CONFIG_ENABLE_MUST_CHECK is not set
# CONFIG_SCHED_DEBUG is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
CONFIG_MTD=y
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_PHYSMAP_OF=y
CONFIG_SOC_TMS320C6457=y
CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_SYSVIPC=y
CONFIG_SPARSE_IRQ=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_NAMESPACES=y
# CONFIG_UTS_NS is not set
# CONFIG_USER_NS is not set
# CONFIG_PID_NS is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_EXPERT=y
# CONFIG_FUTEX is not set
# CONFIG_SLUB_DEBUG is not set
CONFIG_MODULES=y
CONFIG_MODULE_FORCE_LOAD=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE=""
CONFIG_BOARD_EVM6457=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=2
CONFIG_BLK_DEV_RAM_SIZE=17000
CONFIG_MISC_DEVICES=y
# CONFIG_INPUT is not set
# CONFIG_SERIO is not set
# CONFIG_VT is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_HWMON is not set
# CONFIG_USB_SUPPORT is not set
# CONFIG_IOMMU_SUPPORT is not set
# CONFIG_MISC_FILESYSTEMS is not set
CONFIG_CRC16=y
# CONFIG_ENABLE_MUST_CHECK is not set
# CONFIG_SCHED_DEBUG is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
CONFIG_SOC_TMS320C6472=y
CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_SYSVIPC=y
CONFIG_SPARSE_IRQ=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_NAMESPACES=y
# CONFIG_UTS_NS is not set
# CONFIG_USER_NS is not set
# CONFIG_PID_NS is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_EXPERT=y
# CONFIG_FUTEX is not set
# CONFIG_SLUB_DEBUG is not set
CONFIG_MODULES=y
CONFIG_MODULE_FORCE_LOAD=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE=""
# CONFIG_CMDLINE_FORCE is not set
CONFIG_BOARD_EVM6472=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=2
CONFIG_BLK_DEV_RAM_SIZE=17000
CONFIG_MISC_DEVICES=y
# CONFIG_INPUT is not set
# CONFIG_SERIO is not set
# CONFIG_VT is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_HWMON is not set
# CONFIG_USB_SUPPORT is not set
# CONFIG_IOMMU_SUPPORT is not set
# CONFIG_MISC_FILESYSTEMS is not set
CONFIG_CRC16=y
# CONFIG_ENABLE_MUST_CHECK is not set
# CONFIG_SCHED_DEBUG is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
CONFIG_SOC_TMS320C6474=y
CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_SYSVIPC=y
CONFIG_SPARSE_IRQ=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_NAMESPACES=y
# CONFIG_UTS_NS is not set
# CONFIG_USER_NS is not set
# CONFIG_PID_NS is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_EXPERT=y
# CONFIG_FUTEX is not set
# CONFIG_SLUB_DEBUG is not set
CONFIG_MODULES=y
CONFIG_MODULE_FORCE_LOAD=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE=""
# CONFIG_CMDLINE_FORCE is not set
CONFIG_BOARD_EVM6474=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=2
CONFIG_BLK_DEV_RAM_SIZE=17000
CONFIG_MISC_DEVICES=y
# CONFIG_INPUT is not set
# CONFIG_SERIO is not set
# CONFIG_VT is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_HWMON is not set
# CONFIG_USB_SUPPORT is not set
# CONFIG_IOMMU_SUPPORT is not set
# CONFIG_MISC_FILESYSTEMS is not set
CONFIG_CRC16=y
# CONFIG_ENABLE_MUST_CHECK is not set
# CONFIG_SCHED_DEBUG is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
include include/asm-generic/Kbuild.asm
generic-y += atomic.h
generic-y += auxvec.h
generic-y += bitsperlong.h
generic-y += bug.h
generic-y += bugs.h
generic-y += cputime.h
generic-y += current.h
generic-y += device.h
generic-y += div64.h
generic-y += dma.h
generic-y += emergency-restart.h
generic-y += errno.h
generic-y += fb.h
generic-y += fcntl.h
generic-y += futex.h
generic-y += hw_irq.h
generic-y += io.h
generic-y += ioctl.h
generic-y += ioctls.h
generic-y += ipcbuf.h
generic-y += irq_regs.h
generic-y += kdebug.h
generic-y += kmap_types.h
generic-y += local.h
generic-y += mman.h
generic-y += mmu_context.h
generic-y += msgbuf.h
generic-y += param.h
generic-y += pci.h
generic-y += percpu.h
generic-y += pgalloc.h
generic-y += poll.h
generic-y += posix_types.h
generic-y += resource.h
generic-y += scatterlist.h
generic-y += segment.h
generic-y += sembuf.h
generic-y += shmbuf.h
generic-y += shmparam.h
generic-y += siginfo.h
generic-y += socket.h
generic-y += sockios.h
generic-y += stat.h
generic-y += statfs.h
generic-y += termbits.h
generic-y += termios.h
generic-y += tlbflush.h
generic-y += topology.h
generic-y += types.h
generic-y += ucontext.h
generic-y += user.h
generic-y += vga.h
#include <generated/asm-offsets.h>
/*
* Port on Texas Instruments TMS320C6x architecture
*
* Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated
* Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _ASM_C6X_BITOPS_H
#define _ASM_C6X_BITOPS_H
#ifdef __KERNEL__
#include <linux/bitops.h>
#include <asm/system.h>
#include <asm/byteorder.h>
/*
* clear_bit() doesn't provide any barrier for the compiler.
*/
#define smp_mb__before_clear_bit() barrier()
#define smp_mb__after_clear_bit() barrier()
/*
* We are lucky, DSP is perfect for bitops: do it in 3 cycles
*/
/**
* __ffs - find first bit in word.
* @word: The word to search
*
* Undefined if no bit exists, so code should check against 0 first.
* Note __ffs(0) = undef, __ffs(1) = 0, __ffs(0x80000000) = 31.
*
*/
static inline unsigned long __ffs(unsigned long x)
{
asm (" bitr .M1 %0,%0\n"
" nop\n"
" lmbd .L1 1,%0,%0\n"
: "+a"(x));
return x;
}
/*
* ffz - find first zero in word.
* @word: The word to search
*
* Undefined if no zero exists, so code should check against ~0UL first.
*/
#define ffz(x) __ffs(~(x))
/**
* fls - find last (most-significant) bit set
* @x: the word to search
*
* This is defined the same way as ffs.
* Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
*/
static inline int fls(int x)
{
if (!x)
return 0;
asm (" lmbd .L1 1,%0,%0\n" : "+a"(x));
return 32 - x;
}
/**
* ffs - find first bit set
* @x: the word to search
*
* This is defined the same way as
* the libc and compiler builtin ffs routines, therefore
* differs in spirit from the above ffz (man ffs).
* Note ffs(0) = 0, ffs(1) = 1, ffs(0x80000000) = 32.
*/
static inline int ffs(int x)
{
if (!x)
return 0;
return __ffs(x) + 1;
}
#include <asm-generic/bitops/__fls.h>
#include <asm-generic/bitops/fls64.h>
#include <asm-generic/bitops/find.h>
#include <asm-generic/bitops/sched.h>
#include <asm-generic/bitops/hweight.h>
#include <asm-generic/bitops/lock.h>
#include <asm-generic/bitops/atomic.h>
#include <asm-generic/bitops/non-atomic.h>
#include <asm-generic/bitops/le.h>
#include <asm-generic/bitops/ext2-atomic.h>
#endif /* __KERNEL__ */
#endif /* _ASM_C6X_BITOPS_H */
#ifndef _ASM_C6X_BYTEORDER_H
#define _ASM_C6X_BYTEORDER_H
#include <asm/types.h>
#ifdef _BIG_ENDIAN
#include <linux/byteorder/big_endian.h>
#else /* _BIG_ENDIAN */
#include <linux/byteorder/little_endian.h>
#endif /* _BIG_ENDIAN */
#endif /* _ASM_BYTEORDER_H */
/*
* Port on Texas Instruments TMS320C6x architecture
*
* Copyright (C) 2005, 2006, 2009, 2010 Texas Instruments Incorporated
* Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _ASM_C6X_CACHE_H
#define _ASM_C6X_CACHE_H
#include <linux/irqflags.h>
/*
* Cache line size
*/
#define L1D_CACHE_BYTES 64
#define L1P_CACHE_BYTES 32
#define L2_CACHE_BYTES 128
/*
* L2 used as cache
*/
#define L2MODE_SIZE L2MODE_256K_CACHE
/*
* For practical reasons the L1_CACHE_BYTES defines should not be smaller than
* the L2 line size
*/
#define L1_CACHE_BYTES L2_CACHE_BYTES
#define L2_CACHE_ALIGN_LOW(x) \
(((x) & ~(L2_CACHE_BYTES - 1)))
#define L2_CACHE_ALIGN_UP(x) \
(((x) + (L2_CACHE_BYTES - 1)) & ~(L2_CACHE_BYTES - 1))
#define L2_CACHE_ALIGN_CNT(x) \
(((x) + (sizeof(int) - 1)) & ~(sizeof(int) - 1))
#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
#define ARCH_SLAB_MINALIGN L1_CACHE_BYTES
/*
* This is the granularity of hardware cacheability control.
*/
#define CACHEABILITY_ALIGN 0x01000000
/*
* Align a physical address to MAR regions
*/
#define CACHE_REGION_START(v) \
(((u32) (v)) & ~(CACHEABILITY_ALIGN - 1))
#define CACHE_REGION_END(v) \
(((u32) (v) + (CACHEABILITY_ALIGN - 1)) & ~(CACHEABILITY_ALIGN - 1))
extern void __init c6x_cache_init(void);
extern void enable_caching(unsigned long start, unsigned long end);
extern void disable_caching(unsigned long start, unsigned long end);
extern void L1_cache_off(void);
extern void L1_cache_on(void);
extern void L1P_cache_global_invalidate(void);
extern void L1D_cache_global_invalidate(void);
extern void L1D_cache_global_writeback(void);
extern void L1D_cache_global_writeback_invalidate(void);
extern void L2_cache_set_mode(unsigned int mode);
extern void L2_cache_global_writeback_invalidate(void);
extern void L2_cache_global_writeback(void);
extern void L1P_cache_block_invalidate(unsigned int start, unsigned int end);
extern void L1D_cache_block_invalidate(unsigned int start, unsigned int end);
extern void L1D_cache_block_writeback_invalidate(unsigned int start,
unsigned int end);
extern void L1D_cache_block_writeback(unsigned int start, unsigned int end);
extern void L2_cache_block_invalidate(unsigned int start, unsigned int end);
extern void L2_cache_block_writeback(unsigned int start, unsigned int end);
extern void L2_cache_block_writeback_invalidate(unsigned int start,
unsigned int end);
extern void L2_cache_block_invalidate_nowait(unsigned int start,
unsigned int end);
extern void L2_cache_block_writeback_nowait(unsigned int start,
unsigned int end);
extern void L2_cache_block_writeback_invalidate_nowait(unsigned int start,
unsigned int end);
#endif /* _ASM_C6X_CACHE_H */
/*
* Port on Texas Instruments TMS320C6x architecture
*
* Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated
* Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _ASM_C6X_CACHEFLUSH_H
#define _ASM_C6X_CACHEFLUSH_H
#include <linux/spinlock.h>
#include <asm/setup.h>
#include <asm/cache.h>
#include <asm/mman.h>
#include <asm/page.h>
#include <asm/string.h>
/*
* virtually-indexed cache management (our cache is physically indexed)
*/
#define flush_cache_all() do {} while (0)
#define flush_cache_mm(mm) do {} while (0)
#define flush_cache_dup_mm(mm) do {} while (0)
#define flush_cache_range(mm, start, end) do {} while (0)
#define flush_cache_page(vma, vmaddr, pfn) do {} while (0)
#define flush_cache_vmap(start, end) do {} while (0)
#define flush_cache_vunmap(start, end) do {} while (0)
#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
#define flush_dcache_page(page) do {} while (0)
#define flush_dcache_mmap_lock(mapping) do {} while (0)
#define flush_dcache_mmap_unlock(mapping) do {} while (0)
/*
* physically-indexed cache management
*/
#define flush_icache_range(s, e) \
do { \
L1D_cache_block_writeback((s), (e)); \
L1P_cache_block_invalidate((s), (e)); \
} while (0)
#define flush_icache_page(vma, page) \
do { \
if ((vma)->vm_flags & PROT_EXEC) \
L1D_cache_block_writeback_invalidate(page_address(page), \
(unsigned long) page_address(page) + PAGE_SIZE)); \
L1P_cache_block_invalidate(page_address(page), \
(unsigned long) page_address(page) + PAGE_SIZE)); \
} while (0)
#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
do { \
memcpy(dst, src, len); \
flush_icache_range((unsigned) (dst), (unsigned) (dst) + (len)); \
} while (0)
#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
memcpy(dst, src, len)
#endif /* _ASM_C6X_CACHEFLUSH_H */
/*
* Copyright (C) 2011 Texas Instruments Incorporated
* Author: Mark Salter <msalter@redhat.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _ASM_C6X_CHECKSUM_H
#define _ASM_C6X_CHECKSUM_H
static inline __wsum
csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
unsigned short proto, __wsum sum)
{
unsigned long long tmp;
asm ("add .d1 %1,%5,%1\n"
"|| addu .l1 %3,%4,%0\n"
"addu .l1 %2,%0,%0\n"
#ifndef CONFIG_CPU_BIG_ENDIAN
"|| shl .s1 %1,8,%1\n"
#endif
"addu .l1 %1,%0,%0\n"
"add .l1 %P0,%p0,%2\n"
: "=&a"(tmp), "+a"(len), "+a"(sum)
: "a" (saddr), "a" (daddr), "a" (proto));
return sum;
}
#define csum_tcpudp_nofold csum_tcpudp_nofold
#include <asm-generic/checksum.h>
#endif /* _ASM_C6X_CHECKSUM_H */
#ifndef _ASM_CLKDEV_H
#define _ASM_CLKDEV_H
#include <linux/slab.h>
struct clk;
static inline int __clk_get(struct clk *clk)
{
return 1;
}
static inline void __clk_put(struct clk *clk)
{
}
static inline struct clk_lookup_alloc *__clkdev_alloc(size_t size)
{
return kzalloc(size, GFP_KERNEL);
}
#endif /* _ASM_CLKDEV_H */
/*
* TI C64X clock definitions
*
* Copyright (C) 2010, 2011 Texas Instruments.
* Contributed by: Mark Salter <msalter@redhat.com>
*
* Copied heavily from arm/mach-davinci/clock.h, so:
*
* Copyright (C) 2006-2007 Texas Instruments.
* Copyright (C) 2008-2009 Deep Root Systems, LLC
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _ASM_C6X_CLOCK_H
#define _ASM_C6X_CLOCK_H
#ifndef __ASSEMBLER__
#include <linux/list.h>
/* PLL/Reset register offsets */
#define PLLCTL 0x100
#define PLLM 0x110
#define PLLPRE 0x114
#define PLLDIV1 0x118
#define PLLDIV2 0x11c
#define PLLDIV3 0x120
#define PLLPOST 0x128
#define PLLCMD 0x138
#define PLLSTAT 0x13c
#define PLLALNCTL 0x140
#define PLLDCHANGE 0x144
#define PLLCKEN 0x148
#define PLLCKSTAT 0x14c
#define PLLSYSTAT 0x150
#define PLLDIV4 0x160
#define PLLDIV5 0x164
#define PLLDIV6 0x168
#define PLLDIV7 0x16c
#define PLLDIV8 0x170
#define PLLDIV9 0x174
#define PLLDIV10 0x178
#define PLLDIV11 0x17c
#define PLLDIV12 0x180
#define PLLDIV13 0x184
#define PLLDIV14 0x188
#define PLLDIV15 0x18c
#define PLLDIV16 0x190
/* PLLM register bits */
#define PLLM_PLLM_MASK 0xff
#define PLLM_VAL(x) ((x) - 1)
/* PREDIV register bits */
#define PLLPREDIV_EN BIT(15)
#define PLLPREDIV_VAL(x) ((x) - 1)
/* PLLCTL register bits */
#define PLLCTL_PLLEN BIT(0)
#define PLLCTL_PLLPWRDN BIT(1)
#define PLLCTL_PLLRST BIT(3)
#define PLLCTL_PLLDIS BIT(4)
#define PLLCTL_PLLENSRC BIT(5)
#define PLLCTL_CLKMODE BIT(8)
/* PLLCMD register bits */
#define PLLCMD_GOSTAT BIT(0)
/* PLLSTAT register bits */
#define PLLSTAT_GOSTAT BIT(0)
/* PLLDIV register bits */
#define PLLDIV_EN BIT(15)
#define PLLDIV_RATIO_MASK 0x1f
#define PLLDIV_RATIO(x) ((x) - 1)
struct pll_data;
struct clk {
struct list_head node;
struct module *owner;
const char *name;
unsigned long rate;
int usecount;
u32 flags;
struct clk *parent;
struct list_head children; /* list of children */
struct list_head childnode; /* parent's child list node */
struct pll_data *pll_data;
u32 div;
unsigned long (*recalc) (struct clk *);
int (*set_rate) (struct clk *clk, unsigned long rate);
int (*round_rate) (struct clk *clk, unsigned long rate);
};
/* Clock flags: SoC-specific flags start at BIT(16) */
#define ALWAYS_ENABLED BIT(1)
#define CLK_PLL BIT(2) /* PLL-derived clock */
#define PRE_PLL BIT(3) /* source is before PLL mult/div */
#define FIXED_DIV_PLL BIT(4) /* fixed divisor from PLL */
#define FIXED_RATE_PLL BIT(5) /* fixed ouput rate PLL */
#define MAX_PLL_SYSCLKS 16
struct pll_data {
void __iomem *base;
u32 num;
u32 flags;
u32 input_rate;
u32 bypass_delay; /* in loops */
u32 reset_delay; /* in loops */
u32 lock_delay; /* in loops */
struct clk sysclks[MAX_PLL_SYSCLKS + 1];
};
/* pll_data flag bit */
#define PLL_HAS_PRE BIT(0)
#define PLL_HAS_MUL BIT(1)
#define PLL_HAS_POST BIT(2)
#define CLK(dev, con, ck) \
{ \
.dev_id = dev, \
.con_id = con, \
.clk = ck, \
} \
extern void c6x_clks_init(struct clk_lookup *clocks);
extern int clk_register(struct clk *clk);
extern void clk_unregister(struct clk *clk);
extern void c64x_setup_clocks(void);
extern struct pll_data c6x_soc_pll1;
extern struct clk clkin1;
extern struct clk c6x_core_clk;
extern struct clk c6x_i2c_clk;
extern struct clk c6x_watchdog_clk;
extern struct clk c6x_mcbsp1_clk;
extern struct clk c6x_mcbsp2_clk;
extern struct clk c6x_mdio_clk;
#endif
#endif /* _ASM_C6X_CLOCK_H */
/*
* Port on Texas Instruments TMS320C6x architecture
*
* Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
* Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _ASM_C6X_DELAY_H
#define _ASM_C6X_DELAY_H
#include <linux/kernel.h>
extern unsigned int ticks_per_ns_scaled;
static inline void __delay(unsigned long loops)
{
uint32_t tmp;
/* 6 cycles per loop */
asm volatile (" mv .s1 %0,%1\n"
"0: [%1] b .s1 0b\n"
" add .l1 -6,%0,%0\n"
" cmplt .l1 1,%0,%1\n"
" nop 3\n"
: "+a"(loops), "=A"(tmp));
}
static inline void _c6x_tickdelay(unsigned int x)
{
uint32_t cnt, endcnt;
asm volatile (" mvc .s2 TSCL,%0\n"
" add .s2x %0,%1,%2\n"
" || mvk .l2 1,B0\n"
"0: [B0] b .s2 0b\n"
" mvc .s2 TSCL,%0\n"
" sub .s2 %0,%2,%0\n"
" cmpgt .l2 0,%0,B0\n"
" nop 2\n"
: "=b"(cnt), "+a"(x), "=b"(endcnt) : : "B0");
}
/* use scaled math to avoid slow division */
#define C6X_NDELAY_SCALE 10
static inline void _ndelay(unsigned int n)
{
_c6x_tickdelay((ticks_per_ns_scaled * n) >> C6X_NDELAY_SCALE);
}
static inline void _udelay(unsigned int n)
{
while (n >= 10) {
_ndelay(10000);
n -= 10;
}
while (n-- > 0)
_ndelay(1000);
}
#define udelay(x) _udelay((unsigned int)(x))
#define ndelay(x) _ndelay((unsigned int)(x))
#endif /* _ASM_C6X_DELAY_H */
/*
* Port on Texas Instruments TMS320C6x architecture
*
* Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
* Author: Aurelien Jacquiot <aurelien.jacquiot@ti.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#ifndef _ASM_C6X_DMA_MAPPING_H
#define _ASM_C6X_DMA_MAPPING_H
#include <linux/dma-debug.h>
#include <asm-generic/dma-coherent.h>
#define dma_supported(d, m) 1
static inline int dma_set_mask(struct device *dev, u64 dma_mask)
{
if (!dev->dma_mask || !dma_supported(dev, dma_mask))
return -EIO;
*dev->dma_mask = dma_mask;
return 0;
}
/*
* DMA errors are defined by all-bits-set in the DMA address.
*/
static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
{
return dma_addr == ~0;
}
extern dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
size_t size, enum dma_data_direction dir);
extern void dma_unmap_single(struct device *dev, dma_addr_t handle,
size_t size, enum dma_data_direction dir);
extern int dma_map_sg(struct device *dev, struct scatterlist *sglist,
int nents, enum dma_data_direction direction);
extern void dma_unmap_sg(struct device *dev, struct scatterlist *sglist,
int nents, enum dma_data_direction direction);
static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
unsigned long offset, size_t size,
enum dma_data_direction dir)
{
dma_addr_t handle;
handle = dma_map_single(dev, page_address(page) + offset, size, dir);
debug_dma_map_page(dev, page, offset, size, dir, handle, false);
return handle;
}
static inline void dma_unmap_page(struct device *dev, dma_addr_t handle,
size_t size, enum dma_data_direction dir)
{
dma_unmap_single(dev, handle, size, dir);
debug_dma_unmap_page(dev, handle, size, dir, false);
}
extern void dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle,
size_t size, enum dma_data_direction dir);
extern void dma_sync_single_for_device(struct device *dev, dma_addr_t handle,
size_t size,
enum dma_data_direction dir);
extern void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
int nents, enum dma_data_direction dir);
extern void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
int nents, enum dma_data_direction dir);
extern void coherent_mem_init(u32 start, u32 size);
extern void *dma_alloc_coherent(struct device *, size_t, dma_addr_t *, gfp_t);
extern void dma_free_coherent(struct device *, size_t, void *, dma_addr_t);
#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent((d), (s), (h), (f))
#define dma_free_noncoherent(d, s, v, h) dma_free_coherent((d), (s), (v), (h))
#endif /* _ASM_C6X_DMA_MAPPING_H */
/*
* Copyright (C) 2011 Texas Instruments Incorporated
* Author: Mark Salter <msalter@redhat.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#ifndef _ASM_C6X_DSCR_H
#define _ASM_C6X_DSCR_H
enum dscr_devstate_t {
DSCR_DEVSTATE_ENABLED,
DSCR_DEVSTATE_DISABLED,
};
/*
* Set the device state of the device with the given ID.
*
* Individual drivers should use this to enable or disable the
* hardware device. The devid used to identify the device being
* controlled should be a property in the device's tree node.
*/
extern void dscr_set_devstate(int devid, enum dscr_devstate_t state);
/*
* Assert or de-assert an RMII reset.
*/
extern void dscr_rmii_reset(int id, int assert);
extern void dscr_probe(void);
#endif /* _ASM_C6X_DSCR_H */
/*
* Port on Texas Instruments TMS320C6x architecture
*
* Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated
* Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _ASM_C6X_ELF_H
#define _ASM_C6X_ELF_H
/*
* ELF register definitions..
*/
#include <asm/ptrace.h>
typedef unsigned long elf_greg_t;
typedef unsigned long elf_fpreg_t;
#define ELF_NGREG 58
#define ELF_NFPREG 1
typedef elf_greg_t elf_gregset_t[ELF_NGREG];
typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
/*
* This is used to ensure we don't load something for the wrong architecture.
*/
#define elf_check_arch(x) ((x)->e_machine == EM_TI_C6000)
#define elf_check_const_displacement(x) (1)
/*
* These are used to set parameters in the core dumps.
*/
#ifdef __LITTLE_ENDIAN__
#define ELF_DATA ELFDATA2LSB
#else
#define ELF_DATA ELFDATA2MSB
#endif
#define ELF_CLASS ELFCLASS32
#define ELF_ARCH EM_TI_C6000
/* Nothing for now. Need to setup DP... */
#define ELF_PLAT_INIT(_r)
#define USE_ELF_CORE_DUMP
#define ELF_EXEC_PAGESIZE 4096
#define ELF_CORE_COPY_REGS(_dest, _regs) \
memcpy((char *) &_dest, (char *) _regs, \
sizeof(struct pt_regs));
/* This yields a mask that user programs can use to figure out what
instruction set this cpu supports. */
#define ELF_HWCAP (0)
/* This yields a string that ld.so will use to load implementation
specific libraries for optimization. This is more specific in
intent than poking at uname or /proc/cpuinfo. */
#define ELF_PLATFORM (NULL)
#define SET_PERSONALITY(ex) set_personality(PER_LINUX)
/* C6X specific section types */
#define SHT_C6000_UNWIND 0x70000001
#define SHT_C6000_PREEMPTMAP 0x70000002
#define SHT_C6000_ATTRIBUTES 0x70000003
/* C6X specific DT_ tags */
#define DT_C6000_DSBT_BASE 0x70000000
#define DT_C6000_DSBT_SIZE 0x70000001
#define DT_C6000_PREEMPTMAP 0x70000002
#define DT_C6000_DSBT_INDEX 0x70000003
/* C6X specific relocs */
#define R_C6000_NONE 0
#define R_C6000_ABS32 1
#define R_C6000_ABS16 2
#define R_C6000_ABS8 3
#define R_C6000_PCR_S21 4
#define R_C6000_PCR_S12 5
#define R_C6000_PCR_S10 6
#define R_C6000_PCR_S7 7
#define R_C6000_ABS_S16 8
#define R_C6000_ABS_L16 9
#define R_C6000_ABS_H16 10
#define R_C6000_SBR_U15_B 11
#define R_C6000_SBR_U15_H 12
#define R_C6000_SBR_U15_W 13
#define R_C6000_SBR_S16 14
#define R_C6000_SBR_L16_B 15
#define R_C6000_SBR_L16_H 16
#define R_C6000_SBR_L16_W 17
#define R_C6000_SBR_H16_B 18
#define R_C6000_SBR_H16_H 19
#define R_C6000_SBR_H16_W 20
#define R_C6000_SBR_GOT_U15_W 21
#define R_C6000_SBR_GOT_L16_W 22
#define R_C6000_SBR_GOT_H16_W 23
#define R_C6000_DSBT_INDEX 24
#define R_C6000_PREL31 25
#define R_C6000_COPY 26
#define R_C6000_ALIGN 253
#define R_C6000_FPHEAD 254
#define R_C6000_NOCMP 255
#endif /*_ASM_C6X_ELF_H */
#ifndef _ASM_C6X_FTRACE_H
#define _ASM_C6X_FTRACE_H
/* empty */
#endif /* _ASM_C6X_FTRACE_H */
/*
* Port on Texas Instruments TMS320C6x architecture
*
* Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated
* Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _ASM_C6X_HARDIRQ_H
#define _ASM_C6X_HARDIRQ_H
extern void ack_bad_irq(int irq);
#define ack_bad_irq ack_bad_irq
#include <asm-generic/hardirq.h>
#endif /* _ASM_C6X_HARDIRQ_H */
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/*
* C6X IRQ flag handling
*
* Copyright (C) 2010 Texas Instruments Incorporated
* Written by Mark Salter (msalter@redhat.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public Licence
* as published by the Free Software Foundation; either version
* 2 of the Licence, or (at your option) any later version.
*/
#ifndef _ASM_IRQFLAGS_H
#define _ASM_IRQFLAGS_H
#ifndef __ASSEMBLY__
/* read interrupt enabled status */
static inline unsigned long arch_local_save_flags(void)
{
unsigned long flags;
asm volatile (" mvc .s2 CSR,%0\n" : "=b"(flags));
return flags;
}
/* set interrupt enabled status */
static inline void arch_local_irq_restore(unsigned long flags)
{
asm volatile (" mvc .s2 %0,CSR\n" : : "b"(flags));
}
/* unconditionally enable interrupts */
static inline void arch_local_irq_enable(void)
{
unsigned long flags = arch_local_save_flags();
flags |= 1;
arch_local_irq_restore(flags);
}
/* unconditionally disable interrupts */
static inline void arch_local_irq_disable(void)
{
unsigned long flags = arch_local_save_flags();
flags &= ~1;
arch_local_irq_restore(flags);
}
/* get status and disable interrupts */
static inline unsigned long arch_local_irq_save(void)
{
unsigned long flags;
flags = arch_local_save_flags();
arch_local_irq_restore(flags & ~1);
return flags;
}
/* test flags */
static inline int arch_irqs_disabled_flags(unsigned long flags)
{
return (flags & 1) == 0;
}
/* test hardware interrupt enable bit */
static inline int arch_irqs_disabled(void)
{
return arch_irqs_disabled_flags(arch_local_save_flags());
}
#endif /* __ASSEMBLY__ */
#endif /* __ASM_IRQFLAGS_H */
#ifndef _ASM_C6X_LINKAGE_H
#define _ASM_C6X_LINKAGE_H
#ifdef __ASSEMBLER__
#define __ALIGN .align 2
#define __ALIGN_STR ".align 2"
#ifndef __DSBT__
#define ENTRY(name) \
.global name @ \
__ALIGN @ \
name:
#else
#define ENTRY(name) \
.global name @ \
.hidden name @ \
__ALIGN @ \
name:
#endif
#define ENDPROC(name) \
.type name, @function @ \
.size name, . - name
#endif
#include <asm-generic/linkage.h>
#endif /* _ASM_C6X_LINKAGE_H */
#ifndef _C6X_MEGAMOD_PIC_H
#define _C6X_MEGAMOD_PIC_H
#ifdef __KERNEL__
extern void __init megamod_pic_init(void);
#endif /* __KERNEL__ */
#endif /* _C6X_MEGAMOD_PIC_H */
/*
* Port on Texas Instruments TMS320C6x architecture
*
* Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated
* Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _ASM_C6X_MMU_H
#define _ASM_C6X_MMU_H
typedef struct {
unsigned long end_brk;
} mm_context_t;
#endif /* _ASM_C6X_MMU_H */
/*
* Port on Texas Instruments TMS320C6x architecture
*
* Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated
* Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
*
* Updated for 2.6.34 by: Mark Salter (msalter@redhat.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _ASM_C6X_MODULE_H
#define _ASM_C6X_MODULE_H
#define Elf_Shdr Elf32_Shdr
#define Elf_Sym Elf32_Sym
#define Elf_Ehdr Elf32_Ehdr
#define Elf_Addr Elf32_Addr
#define Elf_Word Elf32_Word
/*
* This file contains the C6x architecture specific module code.
*/
struct mod_arch_specific {
};
struct loaded_sections {
unsigned int new_vaddr;
unsigned int loaded;
};
#endif /* _ASM_C6X_MODULE_H */
#ifndef _ASM_C6X_MUTEX_H
#define _ASM_C6X_MUTEX_H
#include <asm-generic/mutex-null.h>
#endif /* _ASM_C6X_MUTEX_H */
#ifndef _ASM_C6X_PAGE_H
#define _ASM_C6X_PAGE_H
#define VM_DATA_DEFAULT_FLAGS \
(VM_READ | VM_WRITE | \
((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0) | \
VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
#include <asm-generic/page.h>
#endif /* _ASM_C6X_PAGE_H */
/*
* Port on Texas Instruments TMS320C6x architecture
*
* Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated
* Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _ASM_C6X_PGTABLE_H
#define _ASM_C6X_PGTABLE_H
#include <asm-generic/4level-fixup.h>
#include <asm/setup.h>
#include <asm/page.h>
/*
* All 32bit addresses are effectively valid for vmalloc...
* Sort of meaningless for non-VM targets.
*/
#define VMALLOC_START 0
#define VMALLOC_END 0xffffffff
#define pgd_present(pgd) (1)
#define pgd_none(pgd) (0)
#define pgd_bad(pgd) (0)
#define pgd_clear(pgdp)
#define kern_addr_valid(addr) (1)
#define pmd_offset(a, b) ((void *)0)
#define pmd_none(x) (!pmd_val(x))
#define pmd_present(x) (pmd_val(x))
#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
#define pmd_bad(x) (pmd_val(x) & ~PAGE_MASK)
#define PAGE_NONE __pgprot(0) /* these mean nothing to NO_MM */
#define PAGE_SHARED __pgprot(0) /* these mean nothing to NO_MM */
#define PAGE_COPY __pgprot(0) /* these mean nothing to NO_MM */
#define PAGE_READONLY __pgprot(0) /* these mean nothing to NO_MM */
#define PAGE_KERNEL __pgprot(0) /* these mean nothing to NO_MM */
#define pgprot_noncached(prot) (prot)
extern void paging_init(void);
#define __swp_type(x) (0)
#define __swp_offset(x) (0)
#define __swp_entry(typ, off) ((swp_entry_t) { ((typ) | ((off) << 7)) })
#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
static inline int pte_file(pte_t pte)
{
return 0;
}
#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)
/*
* ZERO_PAGE is a global shared page that is always zero: used
* for zero-mapped memory areas etc..
*/
#define ZERO_PAGE(vaddr) virt_to_page(empty_zero_page)
extern unsigned long empty_zero_page;
#define swapper_pg_dir ((pgd_t *) 0)
/*
* No page table caches to initialise
*/
#define pgtable_cache_init() do { } while (0)
#define io_remap_pfn_range remap_pfn_range
#define io_remap_page_range(vma, vaddr, paddr, size, prot) \
remap_pfn_range(vma, vaddr, (paddr) >> PAGE_SHIFT, size, prot)
#include <asm-generic/pgtable.h>
#endif /* _ASM_C6X_PGTABLE_H */
/*
* Port on Texas Instruments TMS320C6x architecture
*
* Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
* Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
*
* Updated for 2.6.34: Mark Salter <msalter@redhat.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _ASM_C6X_PROCESSOR_H
#define _ASM_C6X_PROCESSOR_H
#include <asm/ptrace.h>
#include <asm/page.h>
#include <asm/current.h>
/*
* Default implementation of macro that returns current
* instruction pointer ("program counter").
*/
#define current_text_addr() \
({ \
void *__pc; \
asm("mvc .S2 pce1,%0\n" : "=b"(__pc)); \
__pc; \
})
/*
* User space process size. This is mostly meaningless for NOMMU
* but some C6X processors may have RAM addresses up to 0xFFFFFFFF.
* Since calls like mmap() can return an address or an error, we
* have to allow room for error returns when code does something
* like:
*
* addr = do_mmap(...)
* if ((unsigned long)addr >= TASK_SIZE)
* ... its an error code, not an address ...
*
* Here, we allow for 4096 error codes which means we really can't
* use the last 4K page on systems with RAM extending all the way
* to the end of the 32-bit address space.
*/
#define TASK_SIZE 0xFFFFF000
/*
* This decides where the kernel will search for a free chunk of vm
* space during mmap's. We won't be using it
*/
#define TASK_UNMAPPED_BASE 0
struct thread_struct {
unsigned long long b15_14;
unsigned long long a15_14;
unsigned long long b13_12;
unsigned long long a13_12;
unsigned long long b11_10;
unsigned long long a11_10;
unsigned long long ricl_icl;
unsigned long usp; /* user stack pointer */
unsigned long pc; /* kernel pc */
unsigned long wchan;
};
#define INIT_THREAD \
{ \
.usp = 0, \
.wchan = 0, \
}
#define INIT_MMAP { \
&init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, \
NULL, NULL }
#define task_pt_regs(task) \
((struct pt_regs *)(THREAD_START_SP + task_stack_page(task)) - 1)
#define alloc_kernel_stack() __get_free_page(GFP_KERNEL)
#define free_kernel_stack(page) free_page((page))
/* Forward declaration, a strange C thing */
struct task_struct;
extern void start_thread(struct pt_regs *regs, unsigned int pc,
unsigned long usp);
/* Free all resources held by a thread. */
static inline void release_thread(struct task_struct *dead_task)
{
}
/* Prepare to copy thread state - unlazy all lazy status */
#define prepare_to_copy(tsk) do { } while (0)
extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
#define copy_segments(tsk, mm) do { } while (0)
#define release_segments(mm) do { } while (0)
/*
* saved PC of a blocked thread.
*/
#define thread_saved_pc(tsk) (task_pt_regs(tsk)->pc)
/*
* saved kernel SP and DP of a blocked thread.
*/
#ifdef _BIG_ENDIAN
#define thread_saved_ksp(tsk) \
(*(unsigned long *)&(tsk)->thread.b15_14)
#define thread_saved_dp(tsk) \
(*(((unsigned long *)&(tsk)->thread.b15_14) + 1))
#else
#define thread_saved_ksp(tsk) \
(*(((unsigned long *)&(tsk)->thread.b15_14) + 1))
#define thread_saved_dp(tsk) \
(*(unsigned long *)&(tsk)->thread.b15_14)
#endif
extern unsigned long get_wchan(struct task_struct *p);
#define KSTK_EIP(tsk) (task_pt_regs(task)->pc)
#define KSTK_ESP(tsk) (task_pt_regs(task)->sp)
#define cpu_relax() do { } while (0)
extern const struct seq_operations cpuinfo_op;
#endif /* ASM_C6X_PROCESSOR_H */
/*
* Copyright (C) 2010 Texas Instruments Incorporated
* Author: Mark Salter (msalter@redhat.com)
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _ASM_C6X_PROCINFO_H
#define _ASM_C6X_PROCINFO_H
#ifdef __KERNEL__
struct proc_info_list {
unsigned int cpu_val;
unsigned int cpu_mask;
const char *arch_name;
const char *elf_name;
unsigned int elf_hwcap;
};
#else /* __KERNEL__ */
#include <asm/elf.h>
#warning "Please include asm/elf.h instead"
#endif /* __KERNEL__ */
#endif /* _ASM_C6X_PROCINFO_H */
/* dummy prom.h; here to make linux/of.h's #includes happy */
/*
* Copyright (C) 2004, 2006, 2009, 2010 Texas Instruments Incorporated
* Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
*
* Updated for 2.6.34: Mark Salter <msalter@redhat.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _ASM_C6X_PTRACE_H
#define _ASM_C6X_PTRACE_H
#define BKPT_OPCODE 0x56454314 /* illegal opcode */
#ifdef _BIG_ENDIAN
#define PT_LO(odd, even) odd
#define PT_HI(odd, even) even
#else
#define PT_LO(odd, even) even
#define PT_HI(odd, even) odd
#endif
#define PT_A4_ORG PT_LO(1, 0)
#define PT_TSR PT_HI(1, 0)
#define PT_ILC PT_LO(3, 2)
#define PT_RILC PT_HI(3, 2)
#define PT_CSR PT_LO(5, 4)
#define PT_PC PT_HI(5, 4)
#define PT_B16 PT_LO(7, 6)
#define PT_B17 PT_HI(7, 6)
#define PT_B18 PT_LO(9, 8)
#define PT_B19 PT_HI(9, 8)
#define PT_B20 PT_LO(11, 10)
#define PT_B21 PT_HI(11, 10)
#define PT_B22 PT_LO(13, 12)
#define PT_B23 PT_HI(13, 12)
#define PT_B24 PT_LO(15, 14)
#define PT_B25 PT_HI(15, 14)
#define PT_B26 PT_LO(17, 16)
#define PT_B27 PT_HI(17, 16)
#define PT_B28 PT_LO(19, 18)
#define PT_B29 PT_HI(19, 18)
#define PT_B30 PT_LO(21, 20)
#define PT_B31 PT_HI(21, 20)
#define PT_B0 PT_LO(23, 22)
#define PT_B1 PT_HI(23, 22)
#define PT_B2 PT_LO(25, 24)
#define PT_B3 PT_HI(25, 24)
#define PT_B4 PT_LO(27, 26)
#define PT_B5 PT_HI(27, 26)
#define PT_B6 PT_LO(29, 28)
#define PT_B7 PT_HI(29, 28)
#define PT_B8 PT_LO(31, 30)
#define PT_B9 PT_HI(31, 30)
#define PT_B10 PT_LO(33, 32)
#define PT_B11 PT_HI(33, 32)
#define PT_B12 PT_LO(35, 34)
#define PT_B13 PT_HI(35, 34)
#define PT_A16 PT_LO(37, 36)
#define PT_A17 PT_HI(37, 36)
#define PT_A18 PT_LO(39, 38)
#define PT_A19 PT_HI(39, 38)
#define PT_A20 PT_LO(41, 40)
#define PT_A21 PT_HI(41, 40)
#define PT_A22 PT_LO(43, 42)
#define PT_A23 PT_HI(43, 42)
#define PT_A24 PT_LO(45, 44)
#define PT_A25 PT_HI(45, 44)
#define PT_A26 PT_LO(47, 46)
#define PT_A27 PT_HI(47, 46)
#define PT_A28 PT_LO(49, 48)
#define PT_A29 PT_HI(49, 48)
#define PT_A30 PT_LO(51, 50)
#define PT_A31 PT_HI(51, 50)
#define PT_A0 PT_LO(53, 52)
#define PT_A1 PT_HI(53, 52)
#define PT_A2 PT_LO(55, 54)
#define PT_A3 PT_HI(55, 54)
#define PT_A4 PT_LO(57, 56)
#define PT_A5 PT_HI(57, 56)
#define PT_A6 PT_LO(59, 58)
#define PT_A7 PT_HI(59, 58)
#define PT_A8 PT_LO(61, 60)
#define PT_A9 PT_HI(61, 60)
#define PT_A10 PT_LO(63, 62)
#define PT_A11 PT_HI(63, 62)
#define PT_A12 PT_LO(65, 64)
#define PT_A13 PT_HI(65, 64)
#define PT_A14 PT_LO(67, 66)
#define PT_A15 PT_HI(67, 66)
#define PT_B14 PT_LO(69, 68)
#define PT_B15 PT_HI(69, 68)
#define NR_PTREGS 70
#define PT_DP PT_B14 /* Data Segment Pointer (B14) */
#define PT_SP PT_B15 /* Stack Pointer (B15) */
#ifndef __ASSEMBLY__
#ifdef _BIG_ENDIAN
#define REG_PAIR(odd, even) unsigned long odd; unsigned long even
#else
#define REG_PAIR(odd, even) unsigned long even; unsigned long odd
#endif
/*
* this struct defines the way the registers are stored on the
* stack during a system call. fields defined with REG_PAIR
* are saved and restored using double-word memory operations
* which means the word ordering of the pair depends on endianess.
*/
struct pt_regs {
REG_PAIR(tsr, orig_a4);
REG_PAIR(rilc, ilc);
REG_PAIR(pc, csr);
REG_PAIR(b17, b16);
REG_PAIR(b19, b18);
REG_PAIR(b21, b20);
REG_PAIR(b23, b22);
REG_PAIR(b25, b24);
REG_PAIR(b27, b26);
REG_PAIR(b29, b28);
REG_PAIR(b31, b30);
REG_PAIR(b1, b0);
REG_PAIR(b3, b2);
REG_PAIR(b5, b4);
REG_PAIR(b7, b6);
REG_PAIR(b9, b8);
REG_PAIR(b11, b10);
REG_PAIR(b13, b12);
REG_PAIR(a17, a16);
REG_PAIR(a19, a18);
REG_PAIR(a21, a20);
REG_PAIR(a23, a22);
REG_PAIR(a25, a24);
REG_PAIR(a27, a26);
REG_PAIR(a29, a28);
REG_PAIR(a31, a30);
REG_PAIR(a1, a0);
REG_PAIR(a3, a2);
REG_PAIR(a5, a4);
REG_PAIR(a7, a6);
REG_PAIR(a9, a8);
REG_PAIR(a11, a10);
REG_PAIR(a13, a12);
REG_PAIR(a15, a14);
REG_PAIR(sp, dp);
};
#ifdef __KERNEL__
#include <linux/linkage.h>
#define user_mode(regs) ((((regs)->tsr) & 0x40) != 0)
#define instruction_pointer(regs) ((regs)->pc)
#define profile_pc(regs) instruction_pointer(regs)
#define user_stack_pointer(regs) ((regs)->sp)
extern void show_regs(struct pt_regs *);
extern asmlinkage unsigned long syscall_trace_entry(struct pt_regs *regs);
extern asmlinkage void syscall_trace_exit(struct pt_regs *regs);
#endif /* __KERNEL__ */
#endif /* __ASSEMBLY__ */
#endif /* _ASM_C6X_PTRACE_H */
#ifndef _ASM_C6X_SECTIONS_H
#define _ASM_C6X_SECTIONS_H
#include <asm-generic/sections.h>
extern char _vectors_start[];
extern char _vectors_end[];
extern char _data_lma[];
extern char _fdt_start[], _fdt_end[];
#endif /* _ASM_C6X_SECTIONS_H */
/*
* Port on Texas Instruments TMS320C6x architecture
*
* Copyright (C) 2004, 2009, 2010 2011 Texas Instruments Incorporated
* Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _ASM_C6X_SETUP_H
#define _ASM_C6X_SETUP_H
#define COMMAND_LINE_SIZE 1024
#ifndef __ASSEMBLY__
extern char c6x_command_line[COMMAND_LINE_SIZE];
extern int c6x_add_memory(phys_addr_t start, unsigned long size);
extern unsigned long ram_start;
extern unsigned long ram_end;
extern int c6x_num_cores;
extern unsigned int c6x_silicon_rev;
extern unsigned int c6x_devstat;
extern unsigned char c6x_fuse_mac[6];
extern void machine_init(unsigned long dt_ptr);
#endif /* !__ASSEMBLY__ */
#endif /* _ASM_C6X_SETUP_H */
/*
* Port on Texas Instruments TMS320C6x architecture
*
* Copyright (C) 2004, 2009 Texas Instruments Incorporated
* Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _ASM_C6X_SIGCONTEXT_H
#define _ASM_C6X_SIGCONTEXT_H
struct sigcontext {
unsigned long sc_mask; /* old sigmask */
unsigned long sc_sp; /* old user stack pointer */
unsigned long sc_a4;
unsigned long sc_b4;
unsigned long sc_a6;
unsigned long sc_b6;
unsigned long sc_a8;
unsigned long sc_b8;
unsigned long sc_a0;
unsigned long sc_a1;
unsigned long sc_a2;
unsigned long sc_a3;
unsigned long sc_a5;
unsigned long sc_a7;
unsigned long sc_a9;
unsigned long sc_b0;
unsigned long sc_b1;
unsigned long sc_b2;
unsigned long sc_b3;
unsigned long sc_b5;
unsigned long sc_b7;
unsigned long sc_b9;
unsigned long sc_a16;
unsigned long sc_a17;
unsigned long sc_a18;
unsigned long sc_a19;
unsigned long sc_a20;
unsigned long sc_a21;
unsigned long sc_a22;
unsigned long sc_a23;
unsigned long sc_a24;
unsigned long sc_a25;
unsigned long sc_a26;
unsigned long sc_a27;
unsigned long sc_a28;
unsigned long sc_a29;
unsigned long sc_a30;
unsigned long sc_a31;
unsigned long sc_b16;
unsigned long sc_b17;
unsigned long sc_b18;
unsigned long sc_b19;
unsigned long sc_b20;
unsigned long sc_b21;
unsigned long sc_b22;
unsigned long sc_b23;
unsigned long sc_b24;
unsigned long sc_b25;
unsigned long sc_b26;
unsigned long sc_b27;
unsigned long sc_b28;
unsigned long sc_b29;
unsigned long sc_b30;
unsigned long sc_b31;
unsigned long sc_csr;
unsigned long sc_pc;
};
#endif /* _ASM_C6X_SIGCONTEXT_H */
#ifndef _ASM_C6X_SIGNAL_H
#define _ASM_C6X_SIGNAL_H
#include <asm-generic/signal.h>
#ifndef __ASSEMBLY__
#include <linux/linkage.h>
struct pt_regs;
extern asmlinkage int do_rt_sigreturn(struct pt_regs *regs);
extern asmlinkage void do_notify_resume(struct pt_regs *regs,
u32 thread_info_flags,
int syscall);
#endif
#endif /* _ASM_C6X_SIGNAL_H */
/*
* Miscellaneous SoC-specific hooks.
*
* Copyright (C) 2011 Texas Instruments Incorporated
*
* Author: Mark Salter <msalter@redhat.com>
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
#ifndef _ASM_C6X_SOC_H
#define _ASM_C6X_SOC_H
struct soc_ops {
/* Return active exception event or -1 if none */
int (*get_exception)(void);
/* Assert an event */
void (*assert_event)(unsigned int evt);
};
extern struct soc_ops soc_ops;
extern int soc_get_exception(void);
extern void soc_assert_event(unsigned int event);
extern int soc_mac_addr(unsigned int index, u8 *addr);
/*
* for mmio on SoC devices. regs are always same byte order as cpu.
*/
#define soc_readl(addr) __raw_readl(addr)
#define soc_writel(b, addr) __raw_writel((b), (addr))
#endif /* _ASM_C6X_SOC_H */
/*
* Port on Texas Instruments TMS320C6x architecture
*
* Copyright (C) 2004, 2009, 2011 Texas Instruments Incorporated
* Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _ASM_C6X_STRING_H
#define _ASM_C6X_STRING_H
#include <asm/page.h>
#include <linux/linkage.h>
asmlinkage extern void *memcpy(void *to, const void *from, size_t n);
#define __HAVE_ARCH_MEMCPY
#endif /* _ASM_C6X_STRING_H */
/*
* Copyright (C) 2011 Texas Instruments Incorporated
* Author: Mark Salter <msalter@redhat.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _ASM_C6X_SWAB_H
#define _ASM_C6X_SWAB_H
static inline __attribute_const__ __u16 __c6x_swab16(__u16 val)
{
asm("swap4 .l1 %0,%0\n" : "+a"(val));
return val;
}
static inline __attribute_const__ __u32 __c6x_swab32(__u32 val)
{
asm("swap4 .l1 %0,%0\n"
"swap2 .l1 %0,%0\n"
: "+a"(val));
return val;
}
static inline __attribute_const__ __u64 __c6x_swab64(__u64 val)
{
asm(" swap2 .s1 %p0,%P0\n"
"|| swap2 .l1 %P0,%p0\n"
" swap4 .l1 %p0,%p0\n"
" swap4 .l1 %P0,%P0\n"
: "+a"(val));
return val;
}
static inline __attribute_const__ __u32 __c6x_swahw32(__u32 val)
{
asm("swap2 .l1 %0,%0\n" : "+a"(val));
return val;
}
static inline __attribute_const__ __u32 __c6x_swahb32(__u32 val)
{
asm("swap4 .l1 %0,%0\n" : "+a"(val));
return val;
}
#define __arch_swab16 __c6x_swab16
#define __arch_swab32 __c6x_swab32
#define __arch_swab64 __c6x_swab64
#define __arch_swahw32 __c6x_swahw32
#define __arch_swahb32 __c6x_swahb32
#endif /* _ASM_C6X_SWAB_H */
/*
* Copyright (C) 2011 Texas Instruments Incorporated
* Author: Mark Salter <msalter@redhat.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef __ASM_C6X_SYSCALL_H
#define __ASM_C6X_SYSCALL_H
#include <linux/err.h>
#include <linux/sched.h>
static inline int syscall_get_nr(struct task_struct *task,
struct pt_regs *regs)
{
return regs->b0;
}
static inline void syscall_rollback(struct task_struct *task,
struct pt_regs *regs)
{
/* do nothing */
}
static inline long syscall_get_error(struct task_struct *task,
struct pt_regs *regs)
{
return IS_ERR_VALUE(regs->a4) ? regs->a4 : 0;
}
static inline long syscall_get_return_value(struct task_struct *task,
struct pt_regs *regs)
{
return regs->a4;
}
static inline void syscall_set_return_value(struct task_struct *task,
struct pt_regs *regs,
int error, long val)
{
regs->a4 = error ?: val;
}
static inline void syscall_get_arguments(struct task_struct *task,
struct pt_regs *regs, unsigned int i,
unsigned int n, unsigned long *args)
{
switch (i) {
case 0:
if (!n--)
break;
*args++ = regs->a4;
case 1:
if (!n--)
break;
*args++ = regs->b4;
case 2:
if (!n--)
break;
*args++ = regs->a6;
case 3:
if (!n--)
break;
*args++ = regs->b6;
case 4:
if (!n--)
break;
*args++ = regs->a8;
case 5:
if (!n--)
break;
*args++ = regs->b8;
case 6:
if (!n--)
break;
default:
BUG();
}
}
static inline void syscall_set_arguments(struct task_struct *task,
struct pt_regs *regs,
unsigned int i, unsigned int n,
const unsigned long *args)
{
switch (i) {
case 0:
if (!n--)
break;
regs->a4 = *args++;
case 1:
if (!n--)
break;
regs->b4 = *args++;
case 2:
if (!n--)
break;
regs->a6 = *args++;
case 3:
if (!n--)
break;
regs->b6 = *args++;
case 4:
if (!n--)
break;
regs->a8 = *args++;
case 5:
if (!n--)
break;
regs->a9 = *args++;
case 6:
if (!n)
break;
default:
BUG();
}
}
#endif /* __ASM_C6X_SYSCALLS_H */
/*
* Copyright (C) 2011 Texas Instruments Incorporated
* Author: Mark Salter <msalter@redhat.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation, version 2.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
* NON INFRINGEMENT. See the GNU General Public License for
* more details.
*/
#ifndef __ASM_C6X_SYSCALLS_H
#define __ASM_C6X_SYSCALLS_H
#include <linux/compiler.h>
#include <linux/linkage.h>
#include <linux/types.h>
/* The array of function pointers for syscalls. */
extern void *sys_call_table[];
/* The following are trampolines in entry.S to handle 64-bit arguments */
extern long sys_pread_c6x(unsigned int fd, char __user *buf,
size_t count, off_t pos_low, off_t pos_high);
extern long sys_pwrite_c6x(unsigned int fd, const char __user *buf,
size_t count, off_t pos_low, off_t pos_high);
extern long sys_truncate64_c6x(const char __user *path,
off_t length_low, off_t length_high);
extern long sys_ftruncate64_c6x(unsigned int fd,
off_t length_low, off_t length_high);
extern long sys_fadvise64_c6x(int fd, u32 offset_lo, u32 offset_hi,
u32 len, int advice);
extern long sys_fadvise64_64_c6x(int fd, u32 offset_lo, u32 offset_hi,
u32 len_lo, u32 len_hi, int advice);
extern long sys_fallocate_c6x(int fd, int mode,
u32 offset_lo, u32 offset_hi,
u32 len_lo, u32 len_hi);
extern int sys_cache_sync(unsigned long s, unsigned long e);
struct pt_regs;
extern asmlinkage long sys_c6x_clone(struct pt_regs *regs);
extern asmlinkage long sys_c6x_execve(const char __user *name,
const char __user *const __user *argv,
const char __user *const __user *envp,
struct pt_regs *regs);
#include <asm-generic/syscalls.h>
#endif /* __ASM_C6X_SYSCALLS_H */
/*
* Port on Texas Instruments TMS320C6x architecture
*
* Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
* Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _ASM_C6X_SYSTEM_H
#define _ASM_C6X_SYSTEM_H
#include <linux/linkage.h>
#include <linux/irqflags.h>
#define prepare_to_switch() do { } while (0)
struct task_struct;
struct thread_struct;
asmlinkage void *__switch_to(struct thread_struct *prev,
struct thread_struct *next,
struct task_struct *tsk);
#define switch_to(prev, next, last) \
do { \
current->thread.wchan = (u_long) __builtin_return_address(0); \
(last) = __switch_to(&(prev)->thread, \
&(next)->thread, (prev)); \
mb(); \
current->thread.wchan = 0; \
} while (0)
/* Reset the board */
#define HARD_RESET_NOW()
#define get_creg(reg) \
({ unsigned int __x; \
asm volatile ("mvc .s2 " #reg ",%0\n" : "=b"(__x)); __x; })
#define set_creg(reg, v) \
do { unsigned int __x = (unsigned int)(v); \
asm volatile ("mvc .s2 %0," #reg "\n" : : "b"(__x)); \
} while (0)
#define or_creg(reg, n) \
do { unsigned __x, __n = (unsigned)(n); \
asm volatile ("mvc .s2 " #reg ",%0\n" \
"or .l2 %1,%0,%0\n" \
"mvc .s2 %0," #reg "\n" \
"nop\n" \
: "=&b"(__x) : "b"(__n)); \
} while (0)
#define and_creg(reg, n) \
do { unsigned __x, __n = (unsigned)(n); \
asm volatile ("mvc .s2 " #reg ",%0\n" \
"and .l2 %1,%0,%0\n" \
"mvc .s2 %0," #reg "\n" \
"nop\n" \
: "=&b"(__x) : "b"(__n)); \
} while (0)
#define get_coreid() (get_creg(DNUM) & 0xff)
/* Set/get IST */
#define set_ist(x) set_creg(ISTP, x)
#define get_ist() get_creg(ISTP)
/*
* Exception management
*/
asmlinkage void enable_exception(void);
#define disable_exception()
#define get_except_type() get_creg(EFR)
#define ack_exception(type) set_creg(ECR, 1 << (type))
#define get_iexcept() get_creg(IERR)
#define set_iexcept(mask) set_creg(IERR, (mask))
/*
* Misc. functions
*/
#define nop() asm("NOP\n");
#define mb() barrier()
#define rmb() barrier()
#define wmb() barrier()
#define set_mb(var, value) do { var = value; mb(); } while (0)
#define set_wmb(var, value) do { var = value; wmb(); } while (0)
#define smp_mb() barrier()
#define smp_rmb() barrier()
#define smp_wmb() barrier()
#define smp_read_barrier_depends() do { } while (0)
#define xchg(ptr, x) \
((__typeof__(*(ptr)))__xchg((unsigned int)(x), (void *) (ptr), \
sizeof(*(ptr))))
#define tas(ptr) xchg((ptr), 1)
unsigned int _lmbd(unsigned int, unsigned int);
unsigned int _bitr(unsigned int);
struct __xchg_dummy { unsigned int a[100]; };
#define __xg(x) ((volatile struct __xchg_dummy *)(x))
static inline unsigned int __xchg(unsigned int x, volatile void *ptr, int size)
{
unsigned int tmp;
unsigned long flags;
local_irq_save(flags);
switch (size) {
case 1:
tmp = 0;
tmp = *((unsigned char *) ptr);
*((unsigned char *) ptr) = (unsigned char) x;
break;
case 2:
tmp = 0;
tmp = *((unsigned short *) ptr);
*((unsigned short *) ptr) = x;
break;
case 4:
tmp = 0;
tmp = *((unsigned int *) ptr);
*((unsigned int *) ptr) = x;
break;
}
local_irq_restore(flags);
return tmp;
}
#include <asm-generic/cmpxchg-local.h>
/*
* cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
* them available.
*/
#define cmpxchg_local(ptr, o, n) \
((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), \
(unsigned long)(o), \
(unsigned long)(n), \
sizeof(*(ptr))))
#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
#include <asm-generic/cmpxchg.h>
#define _extu(x, s, e) \
({ unsigned int __x; \
asm volatile ("extu .S2 %3,%1,%2,%0\n" : \
"=b"(__x) : "n"(s), "n"(e), "b"(x)); \
__x; })
extern unsigned int c6x_core_freq;
struct pt_regs;
extern void die(char *str, struct pt_regs *fp, int nr);
extern asmlinkage int process_exception(struct pt_regs *regs);
extern void time_init(void);
extern void free_initmem(void);
extern void (*c6x_restart)(void);
extern void (*c6x_halt)(void);
#endif /* _ASM_C6X_SYSTEM_H */
/*
* Port on Texas Instruments TMS320C6x architecture
*
* Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
* Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
*
* Updated for 2.6.3x: Mark Salter <msalter@redhat.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _ASM_C6X_THREAD_INFO_H
#define _ASM_C6X_THREAD_INFO_H
#ifdef __KERNEL__
#include <asm/page.h>
#ifdef CONFIG_4KSTACKS
#define THREAD_SIZE 4096
#define THREAD_SHIFT 12
#define THREAD_ORDER 0
#else
#define THREAD_SIZE 8192
#define THREAD_SHIFT 13
#define THREAD_ORDER 1
#endif
#define THREAD_START_SP (THREAD_SIZE - 8)
#ifndef __ASSEMBLY__
typedef struct {
unsigned long seg;
} mm_segment_t;
/*
* low level task data.
*/
struct thread_info {
struct task_struct *task; /* main task structure */
struct exec_domain *exec_domain; /* execution domain */
unsigned long flags; /* low level flags */
int cpu; /* cpu we're on */
int preempt_count; /* 0 = preemptable, <0 = BUG */
mm_segment_t addr_limit; /* thread address space */
struct restart_block restart_block;
};
/*
* macros/functions for gaining access to the thread information structure
*
* preempt_count needs to be 1 initially, until the scheduler is functional.
*/
#define INIT_THREAD_INFO(tsk) \
{ \
.task = &tsk, \
.exec_domain = &default_exec_domain, \
.flags = 0, \
.cpu = 0, \
.preempt_count = INIT_PREEMPT_COUNT, \
.addr_limit = KERNEL_DS, \
.restart_block = { \
.fn = do_no_restart_syscall, \
}, \
}
#define init_thread_info (init_thread_union.thread_info)
#define init_stack (init_thread_union.stack)
/* get the thread information struct of current task */
static inline __attribute__((const))
struct thread_info *current_thread_info(void)
{
struct thread_info *ti;
asm volatile (" clr .s2 B15,0,%1,%0\n"
: "=b" (ti)
: "Iu5" (THREAD_SHIFT - 1));
return ti;
}
#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
/* thread information allocation */
#ifdef CONFIG_DEBUG_STACK_USAGE
#define THREAD_FLAGS (GFP_KERNEL | __GFP_NOTRACK | __GFP_ZERO)
#else
#define THREAD_FLAGS (GFP_KERNEL | __GFP_NOTRACK)
#endif
#define alloc_thread_info_node(tsk, node) \
((struct thread_info *)__get_free_pages(THREAD_FLAGS, THREAD_ORDER))
#define free_thread_info(ti) free_pages((unsigned long) (ti), THREAD_ORDER)
#define get_thread_info(ti) get_task_struct((ti)->task)
#define put_thread_info(ti) put_task_struct((ti)->task)
#endif /* __ASSEMBLY__ */
#define PREEMPT_ACTIVE 0x10000000
/*
* thread information flag bit numbers
* - pending work-to-be-done flags are in LSW
* - other flags in MSW
*/
#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
#define TIF_NOTIFY_RESUME 1 /* resumption notification requested */
#define TIF_SIGPENDING 2 /* signal pending */
#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
#define TIF_RESTORE_SIGMASK 4 /* restore signal mask in do_signal() */
#define TIF_POLLING_NRFLAG 16 /* true if polling TIF_NEED_RESCHED */
#define TIF_MEMDIE 17 /* OOM killer killed process */
#define TIF_WORK_MASK 0x00007FFE /* work on irq/exception return */
#define TIF_ALLWORK_MASK 0x00007FFF /* work on any return to u-space */
#endif /* __KERNEL__ */
#endif /* _ASM_C6X_THREAD_INFO_H */
#ifndef _C6X_TIMER64_H
#define _C6X_TIMER64_H
extern void __init timer64_init(void);
#endif /* _C6X_TIMER64_H */
/*
* Port on Texas Instruments TMS320C6x architecture
*
* Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
* Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
*
* Modified for 2.6.34: Mark Salter <msalter@redhat.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _ASM_C6X_TIMEX_H
#define _ASM_C6X_TIMEX_H
#define CLOCK_TICK_RATE ((1000 * 1000000UL) / 6)
/* 64-bit timestamp */
typedef unsigned long long cycles_t;
static inline cycles_t get_cycles(void)
{
unsigned l, h;
asm volatile (" dint\n"
" mvc .s2 TSCL,%0\n"
" mvc .s2 TSCH,%1\n"
" rint\n"
: "=b"(l), "=b"(h));
return ((cycles_t)h << 32) | l;
}
#endif /* _ASM_C6X_TIMEX_H */
#ifndef _ASM_C6X_TLB_H
#define _ASM_C6X_TLB_H
#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
#include <asm-generic/tlb.h>
#endif /* _ASM_C6X_TLB_H */
/*
* Port on Texas Instruments TMS320C6x architecture
*
* Copyright (C) 2004, 2009, 2011 Texas Instruments Incorporated
* Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _ASM_C6X_TRAPS_H
#define _ASM_C6X_TRAPS_H
#define EXCEPT_TYPE_NXF 31 /* NMI */
#define EXCEPT_TYPE_EXC 30 /* external exception */
#define EXCEPT_TYPE_IXF 1 /* internal exception */
#define EXCEPT_TYPE_SXF 0 /* software exception */
#define EXCEPT_CAUSE_LBX (1 << 7) /* loop buffer exception */
#define EXCEPT_CAUSE_PRX (1 << 6) /* privilege exception */
#define EXCEPT_CAUSE_RAX (1 << 5) /* resource access exception */
#define EXCEPT_CAUSE_RCX (1 << 4) /* resource conflict exception */
#define EXCEPT_CAUSE_OPX (1 << 3) /* opcode exception */
#define EXCEPT_CAUSE_EPX (1 << 2) /* execute packet exception */
#define EXCEPT_CAUSE_FPX (1 << 1) /* fetch packet exception */
#define EXCEPT_CAUSE_IFX (1 << 0) /* instruction fetch exception */
struct exception_info {
char *kernel_str;
int signo;
int code;
};
extern int (*c6x_nmi_handler)(struct pt_regs *regs);
#endif /* _ASM_C6X_TRAPS_H */
/*
* Copyright (C) 2011 Texas Instruments Incorporated
* Author: Mark Salter <msalter@redhat.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _ASM_C6X_UACCESS_H
#define _ASM_C6X_UACCESS_H
#include <linux/types.h>
#include <linux/compiler.h>
#include <linux/string.h>
#ifdef CONFIG_ACCESS_CHECK
#define __access_ok _access_ok
#endif
/*
* __copy_from_user/copy_to_user are based on ones in asm-generic/uaccess.h
*
* C6X supports unaligned 32 and 64 bit loads and stores.
*/
static inline __must_check long __copy_from_user(void *to,
const void __user *from, unsigned long n)
{
u32 tmp32;
u64 tmp64;
if (__builtin_constant_p(n)) {
switch (n) {
case 1:
*(u8 *)to = *(u8 __force *)from;
return 0;
case 4:
asm volatile ("ldnw .d1t1 *%2,%0\n"
"nop 4\n"
"stnw .d1t1 %0,*%1\n"
: "=&a"(tmp32)
: "A"(to), "a"(from)
: "memory");
return 0;
case 8:
asm volatile ("ldndw .d1t1 *%2,%0\n"
"nop 4\n"
"stndw .d1t1 %0,*%1\n"
: "=&a"(tmp64)
: "a"(to), "a"(from)
: "memory");
return 0;
default:
break;
}
}
memcpy(to, (const void __force *)from, n);
return 0;
}
static inline __must_check long __copy_to_user(void __user *to,
const void *from, unsigned long n)
{
u32 tmp32;
u64 tmp64;
if (__builtin_constant_p(n)) {
switch (n) {
case 1:
*(u8 __force *)to = *(u8 *)from;
return 0;
case 4:
asm volatile ("ldnw .d1t1 *%2,%0\n"
"nop 4\n"
"stnw .d1t1 %0,*%1\n"
: "=&a"(tmp32)
: "a"(to), "a"(from)
: "memory");
return 0;
case 8:
asm volatile ("ldndw .d1t1 *%2,%0\n"
"nop 4\n"
"stndw .d1t1 %0,*%1\n"
: "=&a"(tmp64)
: "a"(to), "a"(from)
: "memory");
return 0;
default:
break;
}
}
memcpy((void __force *)to, from, n);
return 0;
}
#define __copy_to_user __copy_to_user
#define __copy_from_user __copy_from_user
extern int _access_ok(unsigned long addr, unsigned long size);
#ifdef CONFIG_ACCESS_CHECK
#define __access_ok _access_ok
#endif
#include <asm-generic/uaccess.h>
#endif /* _ASM_C6X_UACCESS_H */
/*
* Port on Texas Instruments TMS320C6x architecture
*
* Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated
* Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
* Rewritten for 2.6.3x: Mark Salter <msalter@redhat.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _ASM_C6X_UNALIGNED_H
#define _ASM_C6X_UNALIGNED_H
#include <linux/swab.h>
/*
* The C64x+ can do unaligned word and dword accesses in hardware
* using special load/store instructions.
*/
static inline u16 get_unaligned_le16(const void *p)
{
const u8 *_p = p;
return _p[0] | _p[1] << 8;
}
static inline u16 get_unaligned_be16(const void *p)
{
const u8 *_p = p;
return _p[0] << 8 | _p[1];
}
static inline void put_unaligned_le16(u16 val, void *p)
{
u8 *_p = p;
_p[0] = val;
_p[1] = val >> 8;
}
static inline void put_unaligned_be16(u16 val, void *p)
{
u8 *_p = p;
_p[0] = val >> 8;
_p[1] = val;
}
static inline u32 get_unaligned32(const void *p)
{
u32 val = (u32) p;
asm (" ldnw .d1t1 *%0,%0\n"
" nop 4\n"
: "+a"(val));
return val;
}
static inline void put_unaligned32(u32 val, void *p)
{
asm volatile (" stnw .d2t1 %0,*%1\n"
: : "a"(val), "b"(p) : "memory");
}
static inline u64 get_unaligned64(const void *p)
{
u64 val;
asm volatile (" ldndw .d1t1 *%1,%0\n"
" nop 4\n"
: "=a"(val) : "a"(p));
return val;
}
static inline void put_unaligned64(u64 val, const void *p)
{
asm volatile (" stndw .d2t1 %0,*%1\n"
: : "a"(val), "b"(p) : "memory");
}
#ifdef CONFIG_CPU_BIG_ENDIAN
#define get_unaligned_le32(p) __swab32(get_unaligned32(p))
#define get_unaligned_le64(p) __swab64(get_unaligned64(p))
#define get_unaligned_be32(p) get_unaligned32(p)
#define get_unaligned_be64(p) get_unaligned64(p)
#define put_unaligned_le32(v, p) put_unaligned32(__swab32(v), (p))
#define put_unaligned_le64(v, p) put_unaligned64(__swab64(v), (p))
#define put_unaligned_be32(v, p) put_unaligned32((v), (p))
#define put_unaligned_be64(v, p) put_unaligned64((v), (p))
#define get_unaligned __get_unaligned_be
#define put_unaligned __put_unaligned_be
#else
#define get_unaligned_le32(p) get_unaligned32(p)
#define get_unaligned_le64(p) get_unaligned64(p)
#define get_unaligned_be32(p) __swab32(get_unaligned32(p))
#define get_unaligned_be64(p) __swab64(get_unaligned64(p))
#define put_unaligned_le32(v, p) put_unaligned32((v), (p))
#define put_unaligned_le64(v, p) put_unaligned64((v), (p))
#define put_unaligned_be32(v, p) put_unaligned32(__swab32(v), (p))
#define put_unaligned_be64(v, p) put_unaligned64(__swab64(v), (p))
#define get_unaligned __get_unaligned_le
#define put_unaligned __put_unaligned_le
#endif
/*
* Cause a link-time error if we try an unaligned access other than
* 1,2,4 or 8 bytes long
*/
extern int __bad_unaligned_access_size(void);
#define __get_unaligned_le(ptr) (typeof(*(ptr)))({ \
sizeof(*(ptr)) == 1 ? *(ptr) : \
(sizeof(*(ptr)) == 2 ? get_unaligned_le16((ptr)) : \
(sizeof(*(ptr)) == 4 ? get_unaligned_le32((ptr)) : \
(sizeof(*(ptr)) == 8 ? get_unaligned_le64((ptr)) : \
__bad_unaligned_access_size()))); \
})
#define __get_unaligned_be(ptr) (__force typeof(*(ptr)))({ \
sizeof(*(ptr)) == 1 ? *(ptr) : \
(sizeof(*(ptr)) == 2 ? get_unaligned_be16((ptr)) : \
(sizeof(*(ptr)) == 4 ? get_unaligned_be32((ptr)) : \
(sizeof(*(ptr)) == 8 ? get_unaligned_be64((ptr)) : \
__bad_unaligned_access_size()))); \
})
#define __put_unaligned_le(val, ptr) ({ \
void *__gu_p = (ptr); \
switch (sizeof(*(ptr))) { \
case 1: \
*(u8 *)__gu_p = (__force u8)(val); \
break; \
case 2: \
put_unaligned_le16((__force u16)(val), __gu_p); \
break; \
case 4: \
put_unaligned_le32((__force u32)(val), __gu_p); \
break; \
case 8: \
put_unaligned_le64((__force u64)(val), __gu_p); \
break; \
default: \
__bad_unaligned_access_size(); \
break; \
} \
(void)0; })
#define __put_unaligned_be(val, ptr) ({ \
void *__gu_p = (ptr); \
switch (sizeof(*(ptr))) { \
case 1: \
*(u8 *)__gu_p = (__force u8)(val); \
break; \
case 2: \
put_unaligned_be16((__force u16)(val), __gu_p); \
break; \
case 4: \
put_unaligned_be32((__force u32)(val), __gu_p); \
break; \
case 8: \
put_unaligned_be64((__force u64)(val), __gu_p); \
break; \
default: \
__bad_unaligned_access_size(); \
break; \
} \
(void)0; })
#endif /* _ASM_C6X_UNALIGNED_H */
/*
* Copyright (C) 2011 Texas Instruments Incorporated
*
* Based on arch/tile version.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation, version 2.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
* NON INFRINGEMENT. See the GNU General Public License for
* more details.
*/
#if !defined(_ASM_C6X_UNISTD_H) || defined(__SYSCALL)
#define _ASM_C6X_UNISTD_H
/* Use the standard ABI for syscalls. */
#include <asm-generic/unistd.h>
/* C6X-specific syscalls. */
#define __NR_cache_sync (__NR_arch_specific_syscall + 0)
__SYSCALL(__NR_cache_sync, sys_cache_sync)
#endif /* _ASM_C6X_UNISTD_H */
#
# Makefile for arch/c6x/kernel/
#
extra-y := head.o vmlinux.lds
obj-y := process.o traps.o irq.o signal.o ptrace.o
obj-y += setup.o sys_c6x.o time.o devicetree.o
obj-y += switch_to.o entry.o vectors.o c6x_ksyms.o
obj-y += soc.o dma.o
obj-$(CONFIG_MODULES) += module.o
/*
* Generate definitions needed by assembly language modules.
* This code generates raw asm output which is post-processed
* to extract and format the required data.
*/
#include <linux/sched.h>
#include <linux/thread_info.h>
#include <asm/procinfo.h>
#include <linux/kbuild.h>
#include <linux/unistd.h>
void foo(void)
{
OFFSET(REGS_A16, pt_regs, a16);
OFFSET(REGS_A17, pt_regs, a17);
OFFSET(REGS_A18, pt_regs, a18);
OFFSET(REGS_A19, pt_regs, a19);
OFFSET(REGS_A20, pt_regs, a20);
OFFSET(REGS_A21, pt_regs, a21);
OFFSET(REGS_A22, pt_regs, a22);
OFFSET(REGS_A23, pt_regs, a23);
OFFSET(REGS_A24, pt_regs, a24);
OFFSET(REGS_A25, pt_regs, a25);
OFFSET(REGS_A26, pt_regs, a26);
OFFSET(REGS_A27, pt_regs, a27);
OFFSET(REGS_A28, pt_regs, a28);
OFFSET(REGS_A29, pt_regs, a29);
OFFSET(REGS_A30, pt_regs, a30);
OFFSET(REGS_A31, pt_regs, a31);
OFFSET(REGS_B16, pt_regs, b16);
OFFSET(REGS_B17, pt_regs, b17);
OFFSET(REGS_B18, pt_regs, b18);
OFFSET(REGS_B19, pt_regs, b19);
OFFSET(REGS_B20, pt_regs, b20);
OFFSET(REGS_B21, pt_regs, b21);
OFFSET(REGS_B22, pt_regs, b22);
OFFSET(REGS_B23, pt_regs, b23);
OFFSET(REGS_B24, pt_regs, b24);
OFFSET(REGS_B25, pt_regs, b25);
OFFSET(REGS_B26, pt_regs, b26);
OFFSET(REGS_B27, pt_regs, b27);
OFFSET(REGS_B28, pt_regs, b28);
OFFSET(REGS_B29, pt_regs, b29);
OFFSET(REGS_B30, pt_regs, b30);
OFFSET(REGS_B31, pt_regs, b31);
OFFSET(REGS_A0, pt_regs, a0);
OFFSET(REGS_A1, pt_regs, a1);
OFFSET(REGS_A2, pt_regs, a2);
OFFSET(REGS_A3, pt_regs, a3);
OFFSET(REGS_A4, pt_regs, a4);
OFFSET(REGS_A5, pt_regs, a5);
OFFSET(REGS_A6, pt_regs, a6);
OFFSET(REGS_A7, pt_regs, a7);
OFFSET(REGS_A8, pt_regs, a8);
OFFSET(REGS_A9, pt_regs, a9);
OFFSET(REGS_A10, pt_regs, a10);
OFFSET(REGS_A11, pt_regs, a11);
OFFSET(REGS_A12, pt_regs, a12);
OFFSET(REGS_A13, pt_regs, a13);
OFFSET(REGS_A14, pt_regs, a14);
OFFSET(REGS_A15, pt_regs, a15);
OFFSET(REGS_B0, pt_regs, b0);
OFFSET(REGS_B1, pt_regs, b1);
OFFSET(REGS_B2, pt_regs, b2);
OFFSET(REGS_B3, pt_regs, b3);
OFFSET(REGS_B4, pt_regs, b4);
OFFSET(REGS_B5, pt_regs, b5);
OFFSET(REGS_B6, pt_regs, b6);
OFFSET(REGS_B7, pt_regs, b7);
OFFSET(REGS_B8, pt_regs, b8);
OFFSET(REGS_B9, pt_regs, b9);
OFFSET(REGS_B10, pt_regs, b10);
OFFSET(REGS_B11, pt_regs, b11);
OFFSET(REGS_B12, pt_regs, b12);
OFFSET(REGS_B13, pt_regs, b13);
OFFSET(REGS_DP, pt_regs, dp);
OFFSET(REGS_SP, pt_regs, sp);
OFFSET(REGS_TSR, pt_regs, tsr);
OFFSET(REGS_ORIG_A4, pt_regs, orig_a4);
DEFINE(REGS__END, sizeof(struct pt_regs));
BLANK();
OFFSET(THREAD_PC, thread_struct, pc);
OFFSET(THREAD_B15_14, thread_struct, b15_14);
OFFSET(THREAD_A15_14, thread_struct, a15_14);
OFFSET(THREAD_B13_12, thread_struct, b13_12);
OFFSET(THREAD_A13_12, thread_struct, a13_12);
OFFSET(THREAD_B11_10, thread_struct, b11_10);
OFFSET(THREAD_A11_10, thread_struct, a11_10);
OFFSET(THREAD_RICL_ICL, thread_struct, ricl_icl);
BLANK();
OFFSET(TASK_STATE, task_struct, state);
BLANK();
OFFSET(THREAD_INFO_FLAGS, thread_info, flags);
OFFSET(THREAD_INFO_PREEMPT_COUNT, thread_info, preempt_count);
BLANK();
/* These would be unneccessary if we ran asm files
* through the preprocessor.
*/
DEFINE(KTHREAD_SIZE, THREAD_SIZE);
DEFINE(KTHREAD_SHIFT, THREAD_SHIFT);
DEFINE(KTHREAD_START_SP, THREAD_START_SP);
DEFINE(ENOSYS_, ENOSYS);
DEFINE(NR_SYSCALLS_, __NR_syscalls);
DEFINE(_TIF_SYSCALL_TRACE, (1<<TIF_SYSCALL_TRACE));
DEFINE(_TIF_NOTIFY_RESUME, (1<<TIF_NOTIFY_RESUME));
DEFINE(_TIF_SIGPENDING, (1<<TIF_SIGPENDING));
DEFINE(_TIF_NEED_RESCHED, (1<<TIF_NEED_RESCHED));
DEFINE(_TIF_POLLING_NRFLAG, (1<<TIF_POLLING_NRFLAG));
DEFINE(_TIF_ALLWORK_MASK, TIF_ALLWORK_MASK);
DEFINE(_TIF_WORK_MASK, TIF_WORK_MASK);
}
/*
* Port on Texas Instruments TMS320C6x architecture
*
* Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
* Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#include <linux/module.h>
#include <asm/checksum.h>
#include <linux/io.h>
/*
* libgcc functions - used internally by the compiler...
*/
extern int __c6xabi_divi(int dividend, int divisor);
EXPORT_SYMBOL(__c6xabi_divi);
extern unsigned __c6xabi_divu(unsigned dividend, unsigned divisor);
EXPORT_SYMBOL(__c6xabi_divu);
extern int __c6xabi_remi(int dividend, int divisor);
EXPORT_SYMBOL(__c6xabi_remi);
extern unsigned __c6xabi_remu(unsigned dividend, unsigned divisor);
EXPORT_SYMBOL(__c6xabi_remu);
extern int __c6xabi_divremi(int dividend, int divisor);
EXPORT_SYMBOL(__c6xabi_divremi);
extern unsigned __c6xabi_divremu(unsigned dividend, unsigned divisor);
EXPORT_SYMBOL(__c6xabi_divremu);
extern unsigned long long __c6xabi_mpyll(unsigned long long src1,
unsigned long long src2);
EXPORT_SYMBOL(__c6xabi_mpyll);
extern long long __c6xabi_negll(long long src);
EXPORT_SYMBOL(__c6xabi_negll);
extern unsigned long long __c6xabi_llshl(unsigned long long src1, uint src2);
EXPORT_SYMBOL(__c6xabi_llshl);
extern long long __c6xabi_llshr(long long src1, uint src2);
EXPORT_SYMBOL(__c6xabi_llshr);
extern unsigned long long __c6xabi_llshru(unsigned long long src1, uint src2);
EXPORT_SYMBOL(__c6xabi_llshru);
extern void __c6xabi_strasgi(int *dst, const int *src, unsigned cnt);
EXPORT_SYMBOL(__c6xabi_strasgi);
extern void __c6xabi_push_rts(void);
EXPORT_SYMBOL(__c6xabi_push_rts);
extern void __c6xabi_pop_rts(void);
EXPORT_SYMBOL(__c6xabi_pop_rts);
extern void __c6xabi_strasgi_64plus(int *dst, const int *src, unsigned cnt);
EXPORT_SYMBOL(__c6xabi_strasgi_64plus);
/* lib functions */
EXPORT_SYMBOL(memcpy);
/*
* Architecture specific OF callbacks.
*
* Copyright (C) 2011 Texas Instruments Incorporated
* Author: Mark Salter <msalter@redhat.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#include <linux/init.h>
#include <linux/of.h>
#include <linux/of_fdt.h>
#include <linux/initrd.h>
#include <linux/memblock.h>
void __init early_init_devtree(void *params)
{
/* Setup flat device-tree pointer */
initial_boot_params = params;
/* Retrieve various informations from the /chosen node of the
* device-tree, including the platform type, initrd location and
* size and more ...
*/
of_scan_flat_dt(early_init_dt_scan_chosen, c6x_command_line);
/* Scan memory nodes and rebuild MEMBLOCKs */
of_scan_flat_dt(early_init_dt_scan_root, NULL);
of_scan_flat_dt(early_init_dt_scan_memory, NULL);
}
#ifdef CONFIG_BLK_DEV_INITRD
void __init early_init_dt_setup_initrd_arch(unsigned long start,
unsigned long end)
{
initrd_start = (unsigned long)__va(start);
initrd_end = (unsigned long)__va(end);
initrd_below_start_ok = 1;
}
#endif
void __init early_init_dt_add_memory_arch(u64 base, u64 size)
{
c6x_add_memory(base, size);
}
void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
{
return __va(memblock_alloc(size, align));
}
/*
* Copyright (C) 2011 Texas Instruments Incorporated
* Author: Mark Salter <msalter@redhat.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/module.h>
#include <linux/dma-mapping.h>
#include <linux/mm.h>
#include <linux/mm_types.h>
#include <linux/scatterlist.h>
#include <asm/cacheflush.h>
static void c6x_dma_sync(dma_addr_t handle, size_t size,
enum dma_data_direction dir)
{
unsigned long paddr = handle;
BUG_ON(!valid_dma_direction(dir));
switch (dir) {
case DMA_FROM_DEVICE:
L2_cache_block_invalidate(paddr, paddr + size);
break;
case DMA_TO_DEVICE:
L2_cache_block_writeback(paddr, paddr + size);
break;
case DMA_BIDIRECTIONAL:
L2_cache_block_writeback_invalidate(paddr, paddr + size);
break;
default:
break;
}
}
dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
enum dma_data_direction dir)
{
dma_addr_t addr = virt_to_phys(ptr);
c6x_dma_sync(addr, size, dir);
debug_dma_map_page(dev, virt_to_page(ptr),
(unsigned long)ptr & ~PAGE_MASK, size,
dir, addr, true);
return addr;
}
EXPORT_SYMBOL(dma_map_single);
void dma_unmap_single(struct device *dev, dma_addr_t handle,
size_t size, enum dma_data_direction dir)
{
c6x_dma_sync(handle, size, dir);
debug_dma_unmap_page(dev, handle, size, dir, true);
}
EXPORT_SYMBOL(dma_unmap_single);
int dma_map_sg(struct device *dev, struct scatterlist *sglist,
int nents, enum dma_data_direction dir)
{
struct scatterlist *sg;
int i;
for_each_sg(sglist, sg, nents, i)
sg->dma_address = dma_map_single(dev, sg_virt(sg), sg->length,
dir);
debug_dma_map_sg(dev, sglist, nents, nents, dir);
return nents;
}
EXPORT_SYMBOL(dma_map_sg);
void dma_unmap_sg(struct device *dev, struct scatterlist *sglist,
int nents, enum dma_data_direction dir)
{
struct scatterlist *sg;
int i;
for_each_sg(sglist, sg, nents, i)
dma_unmap_single(dev, sg_dma_address(sg), sg->length, dir);
debug_dma_unmap_sg(dev, sglist, nents, dir);
}
EXPORT_SYMBOL(dma_unmap_sg);
void dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle,
size_t size, enum dma_data_direction dir)
{
c6x_dma_sync(handle, size, dir);
debug_dma_sync_single_for_cpu(dev, handle, size, dir);
}
EXPORT_SYMBOL(dma_sync_single_for_cpu);
void dma_sync_single_for_device(struct device *dev, dma_addr_t handle,
size_t size, enum dma_data_direction dir)
{
c6x_dma_sync(handle, size, dir);
debug_dma_sync_single_for_device(dev, handle, size, dir);
}
EXPORT_SYMBOL(dma_sync_single_for_device);
void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sglist,
int nents, enum dma_data_direction dir)
{
struct scatterlist *sg;
int i;
for_each_sg(sglist, sg, nents, i)
dma_sync_single_for_cpu(dev, sg_dma_address(sg),
sg->length, dir);
debug_dma_sync_sg_for_cpu(dev, sglist, nents, dir);
}
EXPORT_SYMBOL(dma_sync_sg_for_cpu);
void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sglist,
int nents, enum dma_data_direction dir)
{
struct scatterlist *sg;
int i;
for_each_sg(sglist, sg, nents, i)
dma_sync_single_for_device(dev, sg_dma_address(sg),
sg->length, dir);
debug_dma_sync_sg_for_device(dev, sglist, nents, dir);
}
EXPORT_SYMBOL(dma_sync_sg_for_device);
/* Number of entries preallocated for DMA-API debugging */
#define PREALLOC_DMA_DEBUG_ENTRIES (1 << 16)
static int __init dma_init(void)
{
dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
return 0;
}
fs_initcall(dma_init);
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;
; Port on Texas Instruments TMS320C6x architecture
;
; Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
; Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
;
; This program is free software; you can redistribute it and/or modify
; it under the terms of the GNU General Public License version 2 as
; published by the Free Software Foundation.
;
#include <linux/linkage.h>
#include <linux/of_fdt.h>
#include <asm/asm-offsets.h>
__HEAD
ENTRY(_c_int00)
;; Save magic and pointer
MV .S1 A4,A10
MV .S2 B4,B10
MVKL .S2 __bss_start,B5
MVKH .S2 __bss_start,B5
MVKL .S2 __bss_stop,B6
MVKH .S2 __bss_stop,B6
SUB .L2 B6,B5,B6 ; bss size
;; Set the stack pointer
MVKL .S2 current_ksp,B0
MVKH .S2 current_ksp,B0
LDW .D2T2 *B0,B15
;; clear bss
SHR .S2 B6,3,B0 ; number of dwords to clear
ZERO .L2 B13
ZERO .L2 B12
bss_loop:
BDEC .S2 bss_loop,B0
NOP 3
CMPLT .L2 B0,0,B1
[!B1] STDW .D2T2 B13:B12,*B5++[1]
NOP 4
AND .D2 ~7,B15,B15
;; Clear GIE and PGIE
MVC .S2 CSR,B2
CLR .S2 B2,0,1,B2
MVC .S2 B2,CSR
MVC .S2 TSR,B2
CLR .S2 B2,0,1,B2
MVC .S2 B2,TSR
MVC .S2 ITSR,B2
CLR .S2 B2,0,1,B2
MVC .S2 B2,ITSR
MVC .S2 NTSR,B2
CLR .S2 B2,0,1,B2
MVC .S2 B2,NTSR
;; pass DTB pointer to machine_init (or zero if none)
MVKL .S1 OF_DT_HEADER,A0
MVKH .S1 OF_DT_HEADER,A0
CMPEQ .L1 A10,A0,A0
[A0] MV .S1X B10,A4
[!A0] MVK .S1 0,A4
#ifdef CONFIG_C6X_BIG_KERNEL
MVKL .S1 machine_init,A0
MVKH .S1 machine_init,A0
B .S2X A0
ADDKPC .S2 0f,B3,4
0:
#else
CALLP .S2 machine_init,B3
#endif
;; Jump to Linux init
#ifdef CONFIG_C6X_BIG_KERNEL
MVKL .S1 start_kernel,A0
MVKH .S1 start_kernel,A0
B .S2X A0
#else
B .S2 start_kernel
#endif
NOP 5
L1: BNOP .S2 L1,5
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/*
* Port on Texas Instruments TMS320C6x architecture
*
* Copyright (C) 2005, 2009, 2010, 2011 Texas Instruments Incorporated
* Author: Thomas Charleux (thomas.charleux@jaluna.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#include <linux/moduleloader.h>
#include <linux/elf.h>
#include <linux/vmalloc.h>
#include <linux/kernel.h>
static inline int fixup_pcr(u32 *ip, Elf32_Addr dest, u32 maskbits, int shift)
{
u32 opcode;
long ep = (long)ip & ~31;
long delta = ((long)dest - ep) >> 2;
long mask = (1 << maskbits) - 1;
if ((delta >> (maskbits - 1)) == 0 ||
(delta >> (maskbits - 1)) == -1) {
opcode = *ip;
opcode &= ~(mask << shift);
opcode |= ((delta & mask) << shift);
*ip = opcode;
pr_debug("REL PCR_S%d[%p] dest[%p] opcode[%08x]\n",
maskbits, ip, (void *)dest, opcode);
return 0;
}
pr_err("PCR_S%d reloc %p -> %p out of range!\n",
maskbits, ip, (void *)dest);
return -1;
}
/*
* apply a RELA relocation
*/
int apply_relocate_add(Elf32_Shdr *sechdrs,
const char *strtab,
unsigned int symindex,
unsigned int relsec,
struct module *me)
{
Elf32_Rela *rel = (void *) sechdrs[relsec].sh_addr;
Elf_Sym *sym;
u32 *location, opcode;
unsigned int i;
Elf32_Addr v;
Elf_Addr offset = 0;
pr_debug("Applying relocate section %u to %u with offset 0x%x\n",
relsec, sechdrs[relsec].sh_info, offset);
for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
/* This is where to make the change */
location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
+ rel[i].r_offset - offset;
/* This is the symbol it is referring to. Note that all
undefined symbols have been resolved. */
sym = (Elf_Sym *)sechdrs[symindex].sh_addr
+ ELF32_R_SYM(rel[i].r_info);
/* this is the adjustment to be made */
v = sym->st_value + rel[i].r_addend;
switch (ELF32_R_TYPE(rel[i].r_info)) {
case R_C6000_ABS32:
pr_debug("RELA ABS32: [%p] = 0x%x\n", location, v);
*location = v;
break;
case R_C6000_ABS16:
pr_debug("RELA ABS16: [%p] = 0x%x\n", location, v);
*(u16 *)location = v;
break;
case R_C6000_ABS8:
pr_debug("RELA ABS8: [%p] = 0x%x\n", location, v);
*(u8 *)location = v;
break;
case R_C6000_ABS_L16:
opcode = *location;
opcode &= ~0x7fff80;
opcode |= ((v & 0xffff) << 7);
pr_debug("RELA ABS_L16[%p] v[0x%x] opcode[0x%x]\n",
location, v, opcode);
*location = opcode;
break;
case R_C6000_ABS_H16:
opcode = *location;
opcode &= ~0x7fff80;
opcode |= ((v >> 9) & 0x7fff80);
pr_debug("RELA ABS_H16[%p] v[0x%x] opcode[0x%x]\n",
location, v, opcode);
*location = opcode;
break;
case R_C6000_PCR_S21:
if (fixup_pcr(location, v, 21, 7))
return -ENOEXEC;
break;
case R_C6000_PCR_S12:
if (fixup_pcr(location, v, 12, 16))
return -ENOEXEC;
break;
case R_C6000_PCR_S10:
if (fixup_pcr(location, v, 10, 13))
return -ENOEXEC;
break;
default:
pr_err("module %s: Unknown RELA relocation: %u\n",
me->name, ELF32_R_TYPE(rel[i].r_info));
return -ENOEXEC;
}
}
return 0;
}
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#
# Makefile for arch/c6x/lib/
#
lib-y := divu.o divi.o pop_rts.o push_rts.o remi.o remu.o strasgi.o llshru.o
lib-y += llshr.o llshl.o negll.o mpyll.o divremi.o divremu.o
lib-y += checksum.o csum_64plus.o memcpy_64plus.o strasgi_64plus.o
/*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <linux/module.h>
#include <net/checksum.h>
#include <asm/byteorder.h>
/*
* copy from fs while checksumming, otherwise like csum_partial
*/
__wsum
csum_partial_copy_from_user(const void __user *src, void *dst, int len,
__wsum sum, int *csum_err)
{
int missing;
missing = __copy_from_user(dst, src, len);
if (missing) {
memset(dst + len - missing, 0, missing);
*csum_err = -EFAULT;
} else
*csum_err = 0;
return csum_partial(dst, len, sum);
}
EXPORT_SYMBOL(csum_partial_copy_from_user);
/* These are from csum_64plus.S */
EXPORT_SYMBOL(csum_partial);
EXPORT_SYMBOL(csum_partial_copy);
EXPORT_SYMBOL(ip_compute_csum);
EXPORT_SYMBOL(ip_fast_csum);
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