Commit 07e9117e authored by Yangbo Lu's avatar Yangbo Lu Committed by Scott Wood

powerpc/dts: Add and fix 1588 timer node for eTSEC

Add 1588 timer node in files:
arch/powerpc/boot/dts/bsc9131rdb.dtsi
arch/powerpc/boot/dts/bsc9132qds.dtsi
arch/powerpc/boot/dts/p1010rdb.dtsi
arch/powerpc/boot/dts/p1020rdb-pd.dts
arch/powerpc/boot/dts/p1021rdb-pc.dtsi
arch/powerpc/boot/dts/p1022ds.dtsi
arch/powerpc/boot/dts/p1025twr.dtsi
For P2020RDB-PC, registers' values should be calculated
based on default 1588 reference clock(300MHz) not 250MHz,
and fix this in file:
arch/powerpc/boot/dts/p2020rdb-pc.dtsi
Signed-off-by: default avatarYangbo Lu <yangbo.lu@freescale.com>
Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
parent 881ea7d3
......@@ -80,6 +80,18 @@ sdhc@2e000 {
status = "disabled";
};
ptp_clock@b0e00 {
compatible = "fsl,etsec-ptp";
reg = <0xb0e00 0xb0>;
interrupts = <68 2 0 0 69 2 0 0>;
fsl,tclk-period = <5>;
fsl,tmr-prsc = <2>;
fsl,tmr-add = <0xcccccccd>;
fsl,tmr-fiper1 = <999999995>;
fsl,tmr-fiper2 = <99990>;
fsl,max-adj = <249999999>;
};
enet0: ethernet@b0000 {
phy-handle = <&phy0>;
phy-connection-type = "rgmii-id";
......
......@@ -87,6 +87,18 @@ tbi0: tbi-phy@11 {
};
};
ptp_clock@b0e00 {
compatible = "fsl,etsec-ptp";
reg = <0xb0e00 0xb0>;
interrupts = <68 2 0 0 69 2 0 0>;
fsl,tclk-period = <5>;
fsl,tmr-prsc = <2>;
fsl,tmr-add = <0xcccccccd>;
fsl,tmr-fiper1 = <999999995>;
fsl,tmr-fiper2 = <99990>;
fsl,max-adj = <249999999>;
};
enet0: ethernet@b0000 {
phy-handle = <&phy0>;
tbi-handle = <&tbi0>;
......
......@@ -186,6 +186,18 @@ tbi1: tbi-phy@11 {
};
};
ptp_clock@b0e00 {
compatible = "fsl,etsec-ptp";
reg = <0xb0e00 0xb0>;
interrupts = <68 2 0 0 69 2 0 0>;
fsl,tclk-period = <10>;
fsl,tmr-prsc = <2>;
fsl,tmr-add = <0x80000016>;
fsl,tmr-fiper1 = <999999990>;
fsl,tmr-fiper2 = <99990>;
fsl,max-adj = <199999999>;
};
enet0: ethernet@b0000 {
phy-handle = <&phy0>;
phy-connection-type = "rgmii-id";
......
......@@ -225,6 +225,18 @@ tbi2: tbi-phy@11 {
};
};
ptp_clock@b0e00 {
compatible = "fsl,etsec-ptp";
reg = <0xb0e00 0xb0>;
interrupts = <68 2 0 0 69 2 0 0>;
fsl,tclk-period = <10>;
fsl,tmr-prsc = <2>;
fsl,tmr-add = <0x80000016>;
fsl,tmr-fiper1 = <999999990>;
fsl,tmr-fiper2 = <99990>;
fsl,max-adj = <199999999>;
};
enet0: ethernet@b0000 {
fixed-link = <1 1 1000 0 0>;
phy-connection-type = "rgmii-id";
......
......@@ -224,6 +224,18 @@ tbi2: tbi-phy@11 {
};
};
ptp_clock@b0e00 {
compatible = "fsl,etsec-ptp";
reg = <0xb0e00 0xb0>;
interrupts = <68 2 0 0 69 2 0 0>;
fsl,tclk-period = <10>;
fsl,tmr-prsc = <2>;
fsl,tmr-add = <0x80000016>;
fsl,tmr-fiper1 = <999999990>;
fsl,tmr-fiper2 = <99990>;
fsl,max-adj = <199999999>;
};
enet0: ethernet@b0000 {
fixed-link = <1 1 1000 0 0>;
phy-connection-type = "rgmii-id";
......
......@@ -215,6 +215,18 @@ tbi-phy@2 {
};
};
ptp_clock@b0e00 {
compatible = "fsl,etsec-ptp";
reg = <0xb0e00 0xb0>;
interrupts = <68 2 0 0 69 2 0 0>;
fsl,tclk-period = <5>;
fsl,tmr-prsc = <2>;
fsl,tmr-add = <0xc01ebd3d>;
fsl,tmr-fiper1 = <999999995>;
fsl,tmr-fiper2 = <99990>;
fsl,max-adj = <266499999>;
};
ethernet@b0000 {
phy-handle = <&phy0>;
phy-connection-type = "rgmii-id";
......
......@@ -138,6 +138,18 @@ tbi2: tbi-phy@11 {
};
};
ptp_clock@b0e00 {
compatible = "fsl,etsec-ptp";
reg = <0xb0e00 0xb0>;
interrupts = <68 2 0 0 69 2 0 0>;
fsl,tclk-period = <10>;
fsl,tmr-prsc = <2>;
fsl,tmr-add = <0xc0000021>;
fsl,tmr-fiper1 = <999999990>;
fsl,tmr-fiper2 = <99990>;
fsl,max-adj = <133333332>;
};
enet0: ethernet@b0000 {
phy-handle = <&phy0>;
phy-connection-type = "rgmii-id";
......
......@@ -216,11 +216,11 @@ mdio@26520 {
ptp_clock@24e00 {
fsl,tclk-period = <5>;
fsl,tmr-prsc = <200>;
fsl,tmr-add = <0xCCCCCCCD>;
fsl,tmr-fiper1 = <0x3B9AC9FB>;
fsl,tmr-fiper2 = <0x0001869B>;
fsl,max-adj = <249999999>;
fsl,tmr-prsc = <2>;
fsl,tmr-add = <0xaaaaaaab>;
fsl,tmr-fiper1 = <999999995>;
fsl,tmr-fiper2 = <99990>;
fsl,max-adj = <299999999>;
};
enet0: ethernet@24000 {
......
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