Commit 089a6ade authored by Anson Huang's avatar Anson Huang Committed by Shawn Guo

arm64: dts: imx8mn-ddr4-evk: Add i2c1 support

Enable i2c1 on i.MX8MN DDR4 EVK board.
Signed-off-by: default avatarAnson Huang <Anson.Huang@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 13cb15e0
...@@ -50,6 +50,13 @@ MX8MN_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19 ...@@ -50,6 +50,13 @@ MX8MN_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19
>; >;
}; };
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX8MN_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
MX8MN_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
>;
};
pinctrl_reg_usdhc2_vmmc: regusdhc2vmmc { pinctrl_reg_usdhc2_vmmc: regusdhc2vmmc {
fsl,pins = < fsl,pins = <
MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41
...@@ -182,6 +189,13 @@ ethphy0: ethernet-phy@0 { ...@@ -182,6 +189,13 @@ ethphy0: ethernet-phy@0 {
}; };
}; };
&i2c1 {
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
};
&snvs_pwrkey { &snvs_pwrkey {
status = "okay"; status = "okay";
}; };
......
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