Merge bk://linux-dj.bkbits.net/cpufreq

into home.transmeta.com:/home/torvalds/v2.5/linux

arch/i386/kernel/cpu/cpufreq/gx-suspmod.c

@@ -147,7 +147,7 @@ MODULE_PARM(max_duration, "i");
 #ifdef SUSPMOD_DEBUG
 #define dprintk(msg...) printk(KERN_DEBUG "cpufreq:" msg)
 #else
-#define dprintk(msg...) do { } while(0);
+#define dprintk(msg...) do { } while(0)
 #endif
 
 /**

arch/i386/kernel/cpu/cpufreq/longhaul.c

@@ -37,7 +37,7 @@
 #ifdef DEBUG
 #define dprintk(msg...) printk(msg)
 #else
-#define dprintk(msg...) do { } while(0);
+#define dprintk(msg...) do { } while(0)
 #endif
 
 static unsigned int numscales=16, numvscales;

arch/i386/kernel/cpu/cpufreq/powernow-k7.c

@@ -32,7 +32,7 @@
 #ifdef DEBUG
 #define dprintk(msg...) printk(msg)
 #else
-#define dprintk(msg...) do { } while(0);
+#define dprintk(msg...) do { } while(0)
 #endif
 
 #define PFX "powernow: "
@@ -89,7 +89,7 @@ static char have_a0;
 	rdmsr (msr, l__, h__);	\
 	val = l__;	\
 	val |= ((u64)h__<<32);	\
-} while(0);
+} while(0)
 #endif
 
 #ifndef wrmsrl
@@ -236,20 +236,24 @@ static void change_speed (unsigned int index)
 
 	if (have_a0 == 1)	/* A0 errata 5 */
 		__asm__("\tcli\n");
+
+	/* First change the frequency. */
+	if (fidvidctl.bits.FID != fid) {
 		rdmsrl (MSR_K7_FID_VID_CTL, fidvidctl.val);
 		fidvidctl.bits.SGTC = latency;	/* Stop grant timeout counter */
-
 		fidvidctl.bits.FID = fid;
 		fidvidctl.bits.FIDC = 1;
+		wrmsrl (MSR_K7_FID_VID_CTL, fidvidctl.val);
+	}
 
-	/* Set the voltage lazily. Ie, only do voltage transition
-	   if its changed since last time (Some speeds have the same voltage) */
+	/* Now change voltage. */
 	if (fidvidctl.bits.VID != vid) {
+		rdmsrl (MSR_K7_FID_VID_CTL, fidvidctl.val);
 		fidvidctl.bits.VID = vid;
 		fidvidctl.bits.VIDC = 1;
+		wrmsrl (MSR_K7_FID_VID_CTL, fidvidctl.val);
 	}
 
-	wrmsrl (MSR_K7_FID_VID_CTL, fidvidctl.val);
 	if (have_a0 == 1)
 		__asm__("\tsti\n");
 
@@ -386,6 +390,10 @@ static struct cpufreq_driver powernow_driver = {
 
 static int __init powernow_init (void)
 {
+	if (dmi_broken & BROKEN_CPUFREQ) {
+		printk (KERN_INFO PFX "Disabled at boot time by DMI,\n");
+		return -ENODEV;
+	}
 	if (check_powernow()==0)
 		return -ENODEV;
 	return cpufreq_register_driver(&powernow_driver);

arch/i386/kernel/dmi_scan.c

@@ -511,6 +511,14 @@ static __init int exploding_pnp_bios(struct dmi_blacklist *d)
 	return 0;
 }
 
+static __init int acer_cpufreq_pst(struct dmi_blacklist *d)
+{
+	printk(KERN_WARNING "%s laptop with broken PST tables in BIOS detected.\n", d->ident);
+	printk(KERN_WARNING "You need to downgrade to 3A21 (09/09/2002), or try a newer BIOS than 3A71 (01/20/2003)\n");
+	printk(KERN_WARNING "cpufreq scaling has been disabled as a result of this.\n");
+	dmi_broken |= BROKEN_CPUFREQ;
+	return 0;
+}
 
 
 /*
@@ -825,6 +833,17 @@ static __initdata struct dmi_blacklist dmi_blacklist[]={
 			NO_MATCH, NO_MATCH, NO_MATCH
 			} },
 
+	/*
+	 * Some Athlon laptops have really fucked PST tables.
+	 * A BIOS update is all that can save them.
+	 * Mention this, and disable cpufreq.
+	 */
+	{ acer_cpufreq_pst, "Acer Aspire", {
+			MATCH(DMI_SYS_VENDOR, "Insyde Software"),
+			MATCH(DMI_BIOS_VERSION, "3A71"),
+			NO_MATCH, NO_MATCH, NO_MATCH
+			} },
+
 	{ NULL, }
 };
 	

include/asm-i386/system.h

@@ -474,5 +474,6 @@ extern int is_sony_vaio_laptop;
 #define BROKEN_ACPI_Sx		0x0001
 #define BROKEN_INIT_AFTER_S1	0x0002
 #define BROKEN_PNP_BIOS		0x0004
+#define BROKEN_CPUFREQ		0x0008
 
 #endif