Commit 0a4e9ce1 authored by Willy Tarreau's avatar Willy Tarreau Committed by Jakub Kicinski

macb: support the two tx descriptors on at91rm9200

The at91rm9200 variant used by a few chips including the MSC313 supports
two Tx descriptors (one frame being serialized and another one queued).
However the driver only implemented a single one, which adds a dead time
after each transfer to receive and process the interrupt and wake the
queue up, preventing from reaching line rate.

This patch implements a very basic 2-deep queue to address this limitation.
The tests run on a Breadbee board equipped with an MSC313E show that at
1 GHz, HTTP traffic on medium-sized objects (45kB) was limited to exactly
50 Mbps before this patch, and jumped to 76 Mbps with this patch. And tests
on a single TCP stream with an MTU of 576 jump from 10kpps to 15kpps. With
1500 byte packets it's now possible to reach line rate versus 75 Mbps
before.

Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: Claudiu Beznea <claudiu.beznea@microchip.com>
Cc: Daniel Palmer <daniel@0x0f.com>
Signed-off-by: default avatarWilly Tarreau <w@1wt.eu>
Link: https://lore.kernel.org/r/20201011090944.10607-4-w@1wt.euSigned-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 73d74228
...@@ -1209,6 +1209,8 @@ struct macb { ...@@ -1209,6 +1209,8 @@ struct macb {
/* AT91RM9200 transmit queue (1 on wire + 1 queued) */ /* AT91RM9200 transmit queue (1 on wire + 1 queued) */
struct macb_tx_skb rm9200_txq[2]; struct macb_tx_skb rm9200_txq[2];
unsigned int rm9200_tx_tail;
unsigned int rm9200_tx_len;
unsigned int max_tx_length; unsigned int max_tx_length;
u64 ethtool_stats[GEM_STATS_LEN + QUEUE_STATS_LEN * MACB_MAX_QUEUES]; u64 ethtool_stats[GEM_STATS_LEN + QUEUE_STATS_LEN * MACB_MAX_QUEUES];
......
...@@ -3908,6 +3908,7 @@ static int at91ether_start(struct macb *lp) ...@@ -3908,6 +3908,7 @@ static int at91ether_start(struct macb *lp)
MACB_BIT(ISR_TUND) | MACB_BIT(ISR_TUND) |
MACB_BIT(ISR_RLE) | MACB_BIT(ISR_RLE) |
MACB_BIT(TCOMP) | MACB_BIT(TCOMP) |
MACB_BIT(RM9200_TBRE) |
MACB_BIT(ISR_ROVR) | MACB_BIT(ISR_ROVR) |
MACB_BIT(HRESP)); MACB_BIT(HRESP));
...@@ -3924,6 +3925,7 @@ static void at91ether_stop(struct macb *lp) ...@@ -3924,6 +3925,7 @@ static void at91ether_stop(struct macb *lp)
MACB_BIT(ISR_TUND) | MACB_BIT(ISR_TUND) |
MACB_BIT(ISR_RLE) | MACB_BIT(ISR_RLE) |
MACB_BIT(TCOMP) | MACB_BIT(TCOMP) |
MACB_BIT(RM9200_TBRE) |
MACB_BIT(ISR_ROVR) | MACB_BIT(ISR_ROVR) |
MACB_BIT(HRESP)); MACB_BIT(HRESP));
...@@ -3993,11 +3995,10 @@ static netdev_tx_t at91ether_start_xmit(struct sk_buff *skb, ...@@ -3993,11 +3995,10 @@ static netdev_tx_t at91ether_start_xmit(struct sk_buff *skb,
struct net_device *dev) struct net_device *dev)
{ {
struct macb *lp = netdev_priv(dev); struct macb *lp = netdev_priv(dev);
unsigned long flags;
if (macb_readl(lp, TSR) & MACB_BIT(RM9200_BNQ)) { if (lp->rm9200_tx_len < 2) {
int desc = 0; int desc = lp->rm9200_tx_tail;
netif_stop_queue(dev);
/* Store packet information (to free when Tx completed) */ /* Store packet information (to free when Tx completed) */
lp->rm9200_txq[desc].skb = skb; lp->rm9200_txq[desc].skb = skb;
...@@ -4011,6 +4012,15 @@ static netdev_tx_t at91ether_start_xmit(struct sk_buff *skb, ...@@ -4011,6 +4012,15 @@ static netdev_tx_t at91ether_start_xmit(struct sk_buff *skb,
return NETDEV_TX_OK; return NETDEV_TX_OK;
} }
spin_lock_irqsave(&lp->lock, flags);
lp->rm9200_tx_tail = (desc + 1) & 1;
lp->rm9200_tx_len++;
if (lp->rm9200_tx_len > 1)
netif_stop_queue(dev);
spin_unlock_irqrestore(&lp->lock, flags);
/* Set address of the data in the Transmit Address register */ /* Set address of the data in the Transmit Address register */
macb_writel(lp, TAR, lp->rm9200_txq[desc].mapping); macb_writel(lp, TAR, lp->rm9200_txq[desc].mapping);
/* Set length of the packet in the Transmit Control register */ /* Set length of the packet in the Transmit Control register */
...@@ -4076,6 +4086,8 @@ static irqreturn_t at91ether_interrupt(int irq, void *dev_id) ...@@ -4076,6 +4086,8 @@ static irqreturn_t at91ether_interrupt(int irq, void *dev_id)
struct macb *lp = netdev_priv(dev); struct macb *lp = netdev_priv(dev);
u32 intstatus, ctl; u32 intstatus, ctl;
unsigned int desc; unsigned int desc;
unsigned int qlen;
u32 tsr;
/* MAC Interrupt Status register indicates what interrupts are pending. /* MAC Interrupt Status register indicates what interrupts are pending.
* It is automatically cleared once read. * It is automatically cleared once read.
...@@ -4087,21 +4099,39 @@ static irqreturn_t at91ether_interrupt(int irq, void *dev_id) ...@@ -4087,21 +4099,39 @@ static irqreturn_t at91ether_interrupt(int irq, void *dev_id)
at91ether_rx(dev); at91ether_rx(dev);
/* Transmit complete */ /* Transmit complete */
if (intstatus & MACB_BIT(TCOMP)) { if (intstatus & (MACB_BIT(TCOMP) | MACB_BIT(RM9200_TBRE))) {
/* The TCOM bit is set even if the transmission failed */ /* The TCOM bit is set even if the transmission failed */
if (intstatus & (MACB_BIT(ISR_TUND) | MACB_BIT(ISR_RLE))) if (intstatus & (MACB_BIT(ISR_TUND) | MACB_BIT(ISR_RLE)))
dev->stats.tx_errors++; dev->stats.tx_errors++;
desc = 0; spin_lock(&lp->lock);
if (lp->rm9200_txq[desc].skb) {
tsr = macb_readl(lp, TSR);
/* we have three possibilities here:
* - all pending packets transmitted (TGO, implies BNQ)
* - only first packet transmitted (!TGO && BNQ)
* - two frames pending (!TGO && !BNQ)
* Note that TGO ("transmit go") is called "IDLE" on RM9200.
*/
qlen = (tsr & MACB_BIT(TGO)) ? 0 :
(tsr & MACB_BIT(RM9200_BNQ)) ? 1 : 2;
while (lp->rm9200_tx_len > qlen) {
desc = (lp->rm9200_tx_tail - lp->rm9200_tx_len) & 1;
dev_consume_skb_irq(lp->rm9200_txq[desc].skb); dev_consume_skb_irq(lp->rm9200_txq[desc].skb);
lp->rm9200_txq[desc].skb = NULL; lp->rm9200_txq[desc].skb = NULL;
dma_unmap_single(&lp->pdev->dev, lp->rm9200_txq[desc].mapping, dma_unmap_single(&lp->pdev->dev, lp->rm9200_txq[desc].mapping,
lp->rm9200_txq[desc].size, DMA_TO_DEVICE); lp->rm9200_txq[desc].size, DMA_TO_DEVICE);
dev->stats.tx_packets++; dev->stats.tx_packets++;
dev->stats.tx_bytes += lp->rm9200_txq[desc].size; dev->stats.tx_bytes += lp->rm9200_txq[desc].size;
lp->rm9200_tx_len--;
} }
if (lp->rm9200_tx_len < 2 && netif_queue_stopped(dev))
netif_wake_queue(dev); netif_wake_queue(dev);
spin_unlock(&lp->lock);
} }
/* Work-around for EMAC Errata section 41.3.1 */ /* Work-around for EMAC Errata section 41.3.1 */
......
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