Commit 0adad031 authored by Maxime Ripard's avatar Maxime Ripard

clk: sunxi-ng: sun5i: Export video PLLs

The video PLLs are used directly by the HDMI controller. Export them so
that we can use them in our DT node.
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
parent abea2421
...@@ -28,15 +28,17 @@ ...@@ -28,15 +28,17 @@
#define CLK_PLL_AUDIO_4X 6 #define CLK_PLL_AUDIO_4X 6
#define CLK_PLL_AUDIO_8X 7 #define CLK_PLL_AUDIO_8X 7
#define CLK_PLL_VIDEO0 8 #define CLK_PLL_VIDEO0 8
#define CLK_PLL_VIDEO0_2X 9
/* The PLL_VIDEO0_2X is exported for HDMI */
#define CLK_PLL_VE 10 #define CLK_PLL_VE 10
#define CLK_PLL_DDR_BASE 11 #define CLK_PLL_DDR_BASE 11
#define CLK_PLL_DDR 12 #define CLK_PLL_DDR 12
#define CLK_PLL_DDR_OTHER 13 #define CLK_PLL_DDR_OTHER 13
#define CLK_PLL_PERIPH 14 #define CLK_PLL_PERIPH 14
#define CLK_PLL_VIDEO1 15 #define CLK_PLL_VIDEO1 15
#define CLK_PLL_VIDEO1_2X 16
/* The PLL_VIDEO1_2X is exported for HDMI */
/* The CPU clock is exported */ /* The CPU clock is exported */
#define CLK_AXI 18 #define CLK_AXI 18
......
...@@ -19,6 +19,9 @@ ...@@ -19,6 +19,9 @@
#define CLK_HOSC 1 #define CLK_HOSC 1
#define CLK_PLL_VIDEO0_2X 9
#define CLK_PLL_VIDEO1_2X 16
#define CLK_CPU 17 #define CLK_CPU 17
#define CLK_AHB_OTG 23 #define CLK_AHB_OTG 23
......
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