drm/i915/display: use max_level to control loop

Since we are already loop through the levels to sanitize them, mark what
is the real max_level so it can be used in subsequent loop. This makes
it simpler to later add the adjustment latency to "valid levels". No
change in behavior, just makes the code easier to follow.
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210622212210.3746133-2-lucas.demarchi@intel.com

drivers/gpu/drm/i915/intel_pm.c

@@ -2908,6 +2908,9 @@ static void intel_read_wm_latency(struct drm_i915_private *dev_priv,
 			if (wm[level] == 0) {
 				for (i = level + 1; i <= max_level; i++)
 					wm[i] = 0;
+
+				max_level = level - 1;
+
 				break;
 			}
 		}
@@ -2922,13 +2925,9 @@ static void intel_read_wm_latency(struct drm_i915_private *dev_priv,
 		if (wm[0] == 0) {
 			u8 adjust = DISPLAY_VER(dev_priv) >= 12 ? 3 : 2;
 
-			wm[0] += adjust;
-			for (level = 1; level <= max_level; level++) {
-				if (wm[level] == 0)
-					break;
+			for (level = 0; level <= max_level; level++)
 				wm[level] += adjust;
 		}
-		}
 
 		/*
 		 * WA Level-0 adjustment for 16GB DIMMs: SKL+