Commit 0c70840b authored by Neil Zhang's avatar Neil Zhang Committed by Felipe Balbi

usb: gadget: mv_udc: rewrite fifo flush

1: Add parameter check.
2: For controller endpoint, we need to flush in and out directions.
3: delete redundant code, make it more readable.
Signed-off-by: default avatarNeil Zhang <zhangwm@marvell.com>
Signed-off-by: default avatarFelipe Balbi <balbi@ti.com>
parent 615268b0
...@@ -681,37 +681,28 @@ static void mv_ep_fifo_flush(struct usb_ep *_ep) ...@@ -681,37 +681,28 @@ static void mv_ep_fifo_flush(struct usb_ep *_ep)
{ {
struct mv_udc *udc; struct mv_udc *udc;
u32 bit_pos, direction; u32 bit_pos, direction;
struct mv_ep *ep = container_of(_ep, struct mv_ep, ep); struct mv_ep *ep;
unsigned int loops; unsigned int loops;
if (!_ep)
return;
ep = container_of(_ep, struct mv_ep, ep);
if (!ep->desc)
return;
udc = ep->udc; udc = ep->udc;
direction = ep_dir(ep); direction = ep_dir(ep);
bit_pos = 1 << ((direction == EP_DIR_OUT ? 0 : 16) + ep->ep_num);
/*
* Flushing will halt the pipe
* Write 1 to the Flush register
*/
writel(bit_pos, &udc->op_regs->epflush);
/* Wait until flushing completed */ if (ep->ep_num == 0)
loops = LOOPS(FLUSH_TIMEOUT); bit_pos = (1 << 16) | 1;
while (readl(&udc->op_regs->epflush) & bit_pos) { else if (direction == EP_DIR_OUT)
/* bit_pos = 1 << ep->ep_num;
* ENDPTFLUSH bit should be cleared to indicate this else
* operation is complete bit_pos = 1 << (16 + ep->ep_num);
*/
if (loops == 0) {
dev_err(&udc->dev->dev,
"TIMEOUT for ENDPTFLUSH=0x%x, bit_pos=0x%x\n",
(unsigned)readl(&udc->op_regs->epflush),
(unsigned)bit_pos);
return;
}
loops--;
udelay(LOOPS_USEC);
}
loops = LOOPS(EPSTATUS_TIMEOUT); loops = LOOPS(EPSTATUS_TIMEOUT);
while (readl(&udc->op_regs->epstatus) & bit_pos) { do {
unsigned int inter_loops; unsigned int inter_loops;
if (loops == 0) { if (loops == 0) {
...@@ -726,7 +717,7 @@ static void mv_ep_fifo_flush(struct usb_ep *_ep) ...@@ -726,7 +717,7 @@ static void mv_ep_fifo_flush(struct usb_ep *_ep)
/* Wait until flushing completed */ /* Wait until flushing completed */
inter_loops = LOOPS(FLUSH_TIMEOUT); inter_loops = LOOPS(FLUSH_TIMEOUT);
while (readl(&udc->op_regs->epflush) & bit_pos) { while (readl(&udc->op_regs->epflush)) {
/* /*
* ENDPTFLUSH bit should be cleared to indicate this * ENDPTFLUSH bit should be cleared to indicate this
* operation is complete * operation is complete
...@@ -743,7 +734,7 @@ static void mv_ep_fifo_flush(struct usb_ep *_ep) ...@@ -743,7 +734,7 @@ static void mv_ep_fifo_flush(struct usb_ep *_ep)
udelay(LOOPS_USEC); udelay(LOOPS_USEC);
} }
loops--; loops--;
} } while (readl(&udc->op_regs->epstatus) & bit_pos);
} }
/* queues (submits) an I/O request to an endpoint */ /* queues (submits) an I/O request to an endpoint */
......
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