Commit 0c86b4bd authored by Ezequiel Garcia's avatar Ezequiel Garcia Committed by Mauro Carvalho Chehab

media: vp8: Rename V4L2 VP8 specific macro to V4L2_VP8_

Before we move the VP8 controls to a stable public header,
rename this macro so it's clearly V4L2-specific.
Signed-off-by: default avatarEzequiel Garcia <ezequiel@collabora.com>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
parent 45c79296
...@@ -234,7 +234,7 @@ static void cfg_parts(struct hantro_ctx *ctx, ...@@ -234,7 +234,7 @@ static void cfg_parts(struct hantro_ctx *ctx,
{ {
struct hantro_dev *vpu = ctx->dev; struct hantro_dev *vpu = ctx->dev;
struct vb2_v4l2_buffer *vb2_src; struct vb2_v4l2_buffer *vb2_src;
u32 first_part_offset = VP8_FRAME_IS_KEY_FRAME(hdr) ? 10 : 3; u32 first_part_offset = V4L2_VP8_FRAME_IS_KEY_FRAME(hdr) ? 10 : 3;
u32 mb_size, mb_offset_bytes, mb_offset_bits, mb_start_bits; u32 mb_size, mb_offset_bytes, mb_offset_bits, mb_start_bits;
u32 dct_size_part_size, dct_part_offset; u32 dct_size_part_size, dct_part_offset;
struct hantro_reg reg; struct hantro_reg reg;
...@@ -442,7 +442,7 @@ void hantro_g1_vp8_dec_run(struct hantro_ctx *ctx) ...@@ -442,7 +442,7 @@ void hantro_g1_vp8_dec_run(struct hantro_ctx *ctx)
return; return;
/* Reset segment_map buffer in keyframe */ /* Reset segment_map buffer in keyframe */
if (VP8_FRAME_IS_KEY_FRAME(hdr) && ctx->vp8_dec.segment_map.cpu) if (V4L2_VP8_FRAME_IS_KEY_FRAME(hdr) && ctx->vp8_dec.segment_map.cpu)
memset(ctx->vp8_dec.segment_map.cpu, 0, memset(ctx->vp8_dec.segment_map.cpu, 0,
ctx->vp8_dec.segment_map.size); ctx->vp8_dec.segment_map.size);
...@@ -460,7 +460,7 @@ void hantro_g1_vp8_dec_run(struct hantro_ctx *ctx) ...@@ -460,7 +460,7 @@ void hantro_g1_vp8_dec_run(struct hantro_ctx *ctx)
vdpu_write_relaxed(vpu, reg, G1_REG_CONFIG); vdpu_write_relaxed(vpu, reg, G1_REG_CONFIG);
reg = G1_REG_DEC_CTRL0_DEC_MODE(10); reg = G1_REG_DEC_CTRL0_DEC_MODE(10);
if (!VP8_FRAME_IS_KEY_FRAME(hdr)) if (!V4L2_VP8_FRAME_IS_KEY_FRAME(hdr))
reg |= G1_REG_DEC_CTRL0_PIC_INTER_E; reg |= G1_REG_DEC_CTRL0_PIC_INTER_E;
if (!(hdr->flags & V4L2_VP8_FRAME_FLAG_MB_NO_SKIP_COEFF)) if (!(hdr->flags & V4L2_VP8_FRAME_FLAG_MB_NO_SKIP_COEFF))
reg |= G1_REG_DEC_CTRL0_SKIP_MODE; reg |= G1_REG_DEC_CTRL0_SKIP_MODE;
......
...@@ -347,7 +347,7 @@ static void cfg_parts(struct hantro_ctx *ctx, ...@@ -347,7 +347,7 @@ static void cfg_parts(struct hantro_ctx *ctx,
{ {
struct hantro_dev *vpu = ctx->dev; struct hantro_dev *vpu = ctx->dev;
struct vb2_v4l2_buffer *vb2_src; struct vb2_v4l2_buffer *vb2_src;
u32 first_part_offset = VP8_FRAME_IS_KEY_FRAME(hdr) ? 10 : 3; u32 first_part_offset = V4L2_VP8_FRAME_IS_KEY_FRAME(hdr) ? 10 : 3;
u32 mb_size, mb_offset_bytes, mb_offset_bits, mb_start_bits; u32 mb_size, mb_offset_bytes, mb_offset_bits, mb_start_bits;
u32 dct_size_part_size, dct_part_offset; u32 dct_size_part_size, dct_part_offset;
dma_addr_t src_dma; dma_addr_t src_dma;
...@@ -520,7 +520,7 @@ void rk3399_vpu_vp8_dec_run(struct hantro_ctx *ctx) ...@@ -520,7 +520,7 @@ void rk3399_vpu_vp8_dec_run(struct hantro_ctx *ctx)
return; return;
/* Reset segment_map buffer in keyframe */ /* Reset segment_map buffer in keyframe */
if (VP8_FRAME_IS_KEY_FRAME(hdr) && ctx->vp8_dec.segment_map.cpu) if (V4L2_VP8_FRAME_IS_KEY_FRAME(hdr) && ctx->vp8_dec.segment_map.cpu)
memset(ctx->vp8_dec.segment_map.cpu, 0, memset(ctx->vp8_dec.segment_map.cpu, 0,
ctx->vp8_dec.segment_map.size); ctx->vp8_dec.segment_map.size);
...@@ -537,7 +537,7 @@ void rk3399_vpu_vp8_dec_run(struct hantro_ctx *ctx) ...@@ -537,7 +537,7 @@ void rk3399_vpu_vp8_dec_run(struct hantro_ctx *ctx)
reg = VDPU_REG_CONFIG_DEC_TIMEOUT_E reg = VDPU_REG_CONFIG_DEC_TIMEOUT_E
| VDPU_REG_CONFIG_DEC_CLK_GATE_E; | VDPU_REG_CONFIG_DEC_CLK_GATE_E;
if (!VP8_FRAME_IS_KEY_FRAME(hdr)) if (!V4L2_VP8_FRAME_IS_KEY_FRAME(hdr))
reg |= VDPU_REG_DEC_CTRL0_PIC_INTER_E; reg |= VDPU_REG_DEC_CTRL0_PIC_INTER_E;
vdpu_write_relaxed(vpu, reg, VDPU_REG_EN_FLAGS); vdpu_write_relaxed(vpu, reg, VDPU_REG_EN_FLAGS);
......
...@@ -526,7 +526,7 @@ static void cedrus_read_header(struct cedrus_dev *dev, ...@@ -526,7 +526,7 @@ static void cedrus_read_header(struct cedrus_dev *dev,
{ {
int i, j; int i, j;
if (VP8_FRAME_IS_KEY_FRAME(slice)) { if (V4L2_VP8_FRAME_IS_KEY_FRAME(slice)) {
read_bits(dev, 1, VP8_PROB_HALF); read_bits(dev, 1, VP8_PROB_HALF);
read_bits(dev, 1, VP8_PROB_HALF); read_bits(dev, 1, VP8_PROB_HALF);
} }
...@@ -550,12 +550,12 @@ static void cedrus_read_header(struct cedrus_dev *dev, ...@@ -550,12 +550,12 @@ static void cedrus_read_header(struct cedrus_dev *dev,
for (i = 0; i < QUANT_DELTA_COUNT; i++) for (i = 0; i < QUANT_DELTA_COUNT; i++)
get_delta_q(dev); get_delta_q(dev);
if (!VP8_FRAME_IS_KEY_FRAME(slice)) if (!V4L2_VP8_FRAME_IS_KEY_FRAME(slice))
process_ref_frame_info(dev); process_ref_frame_info(dev);
read_bits(dev, 1, VP8_PROB_HALF); read_bits(dev, 1, VP8_PROB_HALF);
if (!VP8_FRAME_IS_KEY_FRAME(slice)) if (!V4L2_VP8_FRAME_IS_KEY_FRAME(slice))
read_bits(dev, 1, VP8_PROB_HALF); read_bits(dev, 1, VP8_PROB_HALF);
cedrus_write(dev, VE_H264_TRIGGER_TYPE, VE_H264_TRIGGER_TYPE_VP8_UPDATE_COEF); cedrus_write(dev, VE_H264_TRIGGER_TYPE, VE_H264_TRIGGER_TYPE_VP8_UPDATE_COEF);
...@@ -565,7 +565,7 @@ static void cedrus_read_header(struct cedrus_dev *dev, ...@@ -565,7 +565,7 @@ static void cedrus_read_header(struct cedrus_dev *dev,
if (read_bits(dev, 1, VP8_PROB_HALF)) if (read_bits(dev, 1, VP8_PROB_HALF))
read_bits(dev, 8, VP8_PROB_HALF); read_bits(dev, 8, VP8_PROB_HALF);
if (!VP8_FRAME_IS_KEY_FRAME(slice)) { if (!V4L2_VP8_FRAME_IS_KEY_FRAME(slice)) {
read_bits(dev, 8, VP8_PROB_HALF); read_bits(dev, 8, VP8_PROB_HALF);
read_bits(dev, 8, VP8_PROB_HALF); read_bits(dev, 8, VP8_PROB_HALF);
read_bits(dev, 8, VP8_PROB_HALF); read_bits(dev, 8, VP8_PROB_HALF);
...@@ -672,7 +672,7 @@ static void cedrus_vp8_setup(struct cedrus_ctx *ctx, ...@@ -672,7 +672,7 @@ static void cedrus_vp8_setup(struct cedrus_ctx *ctx,
reg = slice->first_part_size * 8; reg = slice->first_part_size * 8;
cedrus_write(dev, VE_VP8_FIRST_DATA_PART_LEN, reg); cedrus_write(dev, VE_VP8_FIRST_DATA_PART_LEN, reg);
header_size = VP8_FRAME_IS_KEY_FRAME(slice) ? 10 : 3; header_size = V4L2_VP8_FRAME_IS_KEY_FRAME(slice) ? 10 : 3;
reg = slice->first_part_size + header_size; reg = slice->first_part_size + header_size;
cedrus_write(dev, VE_VP8_PART_SIZE_OFFSET, reg); cedrus_write(dev, VE_VP8_PART_SIZE_OFFSET, reg);
...@@ -850,7 +850,7 @@ static void cedrus_vp8_setup(struct cedrus_ctx *ctx, ...@@ -850,7 +850,7 @@ static void cedrus_vp8_setup(struct cedrus_ctx *ctx,
ctx->codec.vp8.last_filter_type = ctx->codec.vp8.last_filter_type =
!!(slice->lf.flags & V4L2_VP8_LF_FILTER_TYPE_SIMPLE); !!(slice->lf.flags & V4L2_VP8_LF_FILTER_TYPE_SIMPLE);
ctx->codec.vp8.last_frame_p_type = ctx->codec.vp8.last_frame_p_type =
!VP8_FRAME_IS_KEY_FRAME(slice); !V4L2_VP8_FRAME_IS_KEY_FRAME(slice);
ctx->codec.vp8.last_sharpness_level = ctx->codec.vp8.last_sharpness_level =
slice->lf.sharpness_level; slice->lf.sharpness_level;
} }
......
...@@ -146,7 +146,7 @@ struct v4l2_vp8_entropy_coder_state { ...@@ -146,7 +146,7 @@ struct v4l2_vp8_entropy_coder_state {
#define V4L2_VP8_FRAME_FLAG_SIGN_BIAS_GOLDEN 0x10 #define V4L2_VP8_FRAME_FLAG_SIGN_BIAS_GOLDEN 0x10
#define V4L2_VP8_FRAME_FLAG_SIGN_BIAS_ALT 0x20 #define V4L2_VP8_FRAME_FLAG_SIGN_BIAS_ALT 0x20
#define VP8_FRAME_IS_KEY_FRAME(hdr) \ #define V4L2_VP8_FRAME_IS_KEY_FRAME(hdr) \
(!!((hdr)->flags & V4L2_VP8_FRAME_FLAG_KEY_FRAME)) (!!((hdr)->flags & V4L2_VP8_FRAME_FLAG_KEY_FRAME))
/** /**
......
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