Commit 0ccc3ccf authored by Christian König's avatar Christian König Committed by Alex Deucher

drm/amdgpu: re-apply "use the new cursor in the VM code" v2

Now that we found the underlying problem we can re-apply this patch.

This reverts commit 6b44b667.

v2: rebase on KFD changes
Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Acked-by: default avatarFelix Kuehling <Felix.Kuehling@amd.com>
Tested-by: default avatarNirmoy Das <nirmoy.das@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent c6a11133
...@@ -37,6 +37,7 @@ ...@@ -37,6 +37,7 @@
#include "amdgpu_gmc.h" #include "amdgpu_gmc.h"
#include "amdgpu_xgmi.h" #include "amdgpu_xgmi.h"
#include "amdgpu_dma_buf.h" #include "amdgpu_dma_buf.h"
#include "amdgpu_res_cursor.h"
#include "kfd_svm.h" #include "kfd_svm.h"
/** /**
...@@ -1606,7 +1607,7 @@ static int amdgpu_vm_update_ptes(struct amdgpu_vm_update_params *params, ...@@ -1606,7 +1607,7 @@ static int amdgpu_vm_update_ptes(struct amdgpu_vm_update_params *params,
* @last: last mapped entry * @last: last mapped entry
* @flags: flags for the entries * @flags: flags for the entries
* @offset: offset into nodes and pages_addr * @offset: offset into nodes and pages_addr
* @nodes: array of drm_mm_nodes with the MC addresses * @res: ttm_resource to map
* @pages_addr: DMA addresses to use for mapping * @pages_addr: DMA addresses to use for mapping
* @fence: optional resulting fence * @fence: optional resulting fence
* *
...@@ -1621,13 +1622,13 @@ int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev, ...@@ -1621,13 +1622,13 @@ int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
bool unlocked, struct dma_resv *resv, bool unlocked, struct dma_resv *resv,
uint64_t start, uint64_t last, uint64_t start, uint64_t last,
uint64_t flags, uint64_t offset, uint64_t flags, uint64_t offset,
struct drm_mm_node *nodes, struct ttm_resource *res,
dma_addr_t *pages_addr, dma_addr_t *pages_addr,
struct dma_fence **fence) struct dma_fence **fence)
{ {
struct amdgpu_vm_update_params params; struct amdgpu_vm_update_params params;
struct amdgpu_res_cursor cursor;
enum amdgpu_sync_mode sync_mode; enum amdgpu_sync_mode sync_mode;
uint64_t pfn;
int r; int r;
memset(&params, 0, sizeof(params)); memset(&params, 0, sizeof(params));
...@@ -1645,14 +1646,6 @@ int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev, ...@@ -1645,14 +1646,6 @@ int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
else else
sync_mode = AMDGPU_SYNC_EXPLICIT; sync_mode = AMDGPU_SYNC_EXPLICIT;
pfn = offset >> PAGE_SHIFT;
if (nodes) {
while (pfn >= nodes->size) {
pfn -= nodes->size;
++nodes;
}
}
amdgpu_vm_eviction_lock(vm); amdgpu_vm_eviction_lock(vm);
if (vm->evicting) { if (vm->evicting) {
r = -EBUSY; r = -EBUSY;
...@@ -1671,23 +1664,17 @@ int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev, ...@@ -1671,23 +1664,17 @@ int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
if (r) if (r)
goto error_unlock; goto error_unlock;
do { amdgpu_res_first(res, offset, (last - start + 1) * AMDGPU_GPU_PAGE_SIZE,
&cursor);
while (cursor.remaining) {
uint64_t tmp, num_entries, addr; uint64_t tmp, num_entries, addr;
num_entries = cursor.size >> AMDGPU_GPU_PAGE_SHIFT;
num_entries = last - start + 1;
if (nodes) {
addr = nodes->start << PAGE_SHIFT;
num_entries = min((nodes->size - pfn) *
AMDGPU_GPU_PAGES_IN_CPU_PAGE, num_entries);
} else {
addr = 0;
}
if (pages_addr) { if (pages_addr) {
bool contiguous = true; bool contiguous = true;
if (num_entries > AMDGPU_GPU_PAGES_IN_CPU_PAGE) { if (num_entries > AMDGPU_GPU_PAGES_IN_CPU_PAGE) {
uint64_t pfn = cursor.start >> PAGE_SHIFT;
uint64_t count; uint64_t count;
contiguous = pages_addr[pfn + 1] == contiguous = pages_addr[pfn + 1] ==
...@@ -1707,16 +1694,18 @@ int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev, ...@@ -1707,16 +1694,18 @@ int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
} }
if (!contiguous) { if (!contiguous) {
addr = pfn << PAGE_SHIFT; addr = cursor.start;
params.pages_addr = pages_addr; params.pages_addr = pages_addr;
} else { } else {
addr = pages_addr[pfn]; addr = pages_addr[cursor.start >> PAGE_SHIFT];
params.pages_addr = NULL; params.pages_addr = NULL;
} }
} else if (flags & (AMDGPU_PTE_VALID | AMDGPU_PTE_PRT)) { } else if (flags & (AMDGPU_PTE_VALID | AMDGPU_PTE_PRT)) {
addr += bo_adev->vm_manager.vram_base_offset; addr = bo_adev->vm_manager.vram_base_offset +
addr += pfn << PAGE_SHIFT; cursor.start;
} else {
addr = 0;
} }
tmp = start + num_entries; tmp = start + num_entries;
...@@ -1724,14 +1713,9 @@ int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev, ...@@ -1724,14 +1713,9 @@ int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
if (r) if (r)
goto error_unlock; goto error_unlock;
pfn += num_entries / AMDGPU_GPU_PAGES_IN_CPU_PAGE; amdgpu_res_next(&cursor, num_entries * AMDGPU_GPU_PAGE_SIZE);
if (nodes && nodes->size == pfn) {
pfn = 0;
++nodes;
}
start = tmp; start = tmp;
};
} while (unlikely(start != last + 1));
r = vm->update_funcs->commit(&params, fence); r = vm->update_funcs->commit(&params, fence);
...@@ -1760,7 +1744,6 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va, ...@@ -1760,7 +1744,6 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va,
struct amdgpu_bo_va_mapping *mapping; struct amdgpu_bo_va_mapping *mapping;
dma_addr_t *pages_addr = NULL; dma_addr_t *pages_addr = NULL;
struct ttm_resource *mem; struct ttm_resource *mem;
struct drm_mm_node *nodes;
struct dma_fence **last_update; struct dma_fence **last_update;
struct dma_resv *resv; struct dma_resv *resv;
uint64_t flags; uint64_t flags;
...@@ -1769,7 +1752,6 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va, ...@@ -1769,7 +1752,6 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va,
if (clear || !bo) { if (clear || !bo) {
mem = NULL; mem = NULL;
nodes = NULL;
resv = vm->root.base.bo->tbo.base.resv; resv = vm->root.base.bo->tbo.base.resv;
} else { } else {
struct drm_gem_object *obj = &bo->tbo.base; struct drm_gem_object *obj = &bo->tbo.base;
...@@ -1784,7 +1766,6 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va, ...@@ -1784,7 +1766,6 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va,
bo = gem_to_amdgpu_bo(gobj); bo = gem_to_amdgpu_bo(gobj);
} }
mem = &bo->tbo.mem; mem = &bo->tbo.mem;
nodes = mem->mm_node;
if (mem->mem_type == TTM_PL_TT) if (mem->mem_type == TTM_PL_TT)
pages_addr = bo->tbo.ttm->dma_address; pages_addr = bo->tbo.ttm->dma_address;
} }
...@@ -1833,7 +1814,7 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va, ...@@ -1833,7 +1814,7 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va,
r = amdgpu_vm_bo_update_mapping(adev, bo_adev, vm, false, false, r = amdgpu_vm_bo_update_mapping(adev, bo_adev, vm, false, false,
resv, mapping->start, resv, mapping->start,
mapping->last, update_flags, mapping->last, update_flags,
mapping->offset, nodes, mapping->offset, mem,
pages_addr, last_update); pages_addr, last_update);
if (r) if (r)
return r; return r;
......
...@@ -402,7 +402,7 @@ int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev, ...@@ -402,7 +402,7 @@ int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
bool unlocked, struct dma_resv *resv, bool unlocked, struct dma_resv *resv,
uint64_t start, uint64_t last, uint64_t start, uint64_t last,
uint64_t flags, uint64_t offset, uint64_t flags, uint64_t offset,
struct drm_mm_node *nodes, struct ttm_resource *res,
dma_addr_t *pages_addr, dma_addr_t *pages_addr,
struct dma_fence **fence); struct dma_fence **fence);
int amdgpu_vm_bo_update(struct amdgpu_device *adev, int amdgpu_vm_bo_update(struct amdgpu_device *adev,
......
...@@ -1159,8 +1159,7 @@ svm_range_map_to_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm, ...@@ -1159,8 +1159,7 @@ svm_range_map_to_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm,
prange->mapping.start, prange->mapping.start,
prange->mapping.last, pte_flags, prange->mapping.last, pte_flags,
prange->mapping.offset, prange->mapping.offset,
prange->ttm_res ? prange->ttm_res,
prange->ttm_res->mm_node : NULL,
dma_addr, &vm->last_update); dma_addr, &vm->last_update);
if (r) { if (r) {
pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start); pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start);
......
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