Commit 0cfbe179 authored by Anson Huang's avatar Anson Huang Committed by Wim Van Sebroeck

watchdog: imx7ulp: Watchdog should continue running for wait/stop mode

When kernel idle, system will enter wait/stop mode, wdog should continue
running in this scenario, and the refresh thread can wake up system from
wait/stop mode.
Signed-off-by: default avatarAnson Huang <Anson.Huang@nxp.com>
Reviewed-by: default avatarGuenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/1596150213-31638-2-git-send-email-Anson.Huang@nxp.comSigned-off-by: default avatarGuenter Roeck <linux@roeck-us.net>
Signed-off-by: default avatarWim Van Sebroeck <wim@linux-watchdog.org>
parent d342951b
...@@ -22,6 +22,8 @@ ...@@ -22,6 +22,8 @@
#define WDOG_CS_CLK (LPO_CLK << LPO_CLK_SHIFT) #define WDOG_CS_CLK (LPO_CLK << LPO_CLK_SHIFT)
#define WDOG_CS_EN BIT(7) #define WDOG_CS_EN BIT(7)
#define WDOG_CS_UPDATE BIT(5) #define WDOG_CS_UPDATE BIT(5)
#define WDOG_CS_WAIT BIT(1)
#define WDOG_CS_STOP BIT(0)
#define WDOG_CNT 0x4 #define WDOG_CNT 0x4
#define WDOG_TOVAL 0x8 #define WDOG_TOVAL 0x8
...@@ -187,7 +189,8 @@ static int imx7ulp_wdt_init(void __iomem *base, unsigned int timeout) ...@@ -187,7 +189,8 @@ static int imx7ulp_wdt_init(void __iomem *base, unsigned int timeout)
/* set an initial timeout value in TOVAL */ /* set an initial timeout value in TOVAL */
writel(timeout, base + WDOG_TOVAL); writel(timeout, base + WDOG_TOVAL);
/* enable 32bit command sequence and reconfigure */ /* enable 32bit command sequence and reconfigure */
val = WDOG_CS_CMD32EN | WDOG_CS_CLK | WDOG_CS_UPDATE; val = WDOG_CS_CMD32EN | WDOG_CS_CLK | WDOG_CS_UPDATE |
WDOG_CS_WAIT | WDOG_CS_STOP;
writel(val, base + WDOG_CS); writel(val, base + WDOG_CS);
imx7ulp_wdt_wait(base, WDOG_CS_RCS); imx7ulp_wdt_wait(base, WDOG_CS_RCS);
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment