Commit 10aa3b78 authored by Hariprasad Shenai's avatar Hariprasad Shenai Committed by David S. Miller

cxgb4vf: Update to 128 byte mailbox size for T6 adapter

Signed-off-by: default avatarHariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 2216d014
...@@ -54,6 +54,7 @@ ...@@ -54,6 +54,7 @@
#define T4VF_MPS_BASE_ADDR 0x0100 #define T4VF_MPS_BASE_ADDR 0x0100
#define T4VF_PL_BASE_ADDR 0x0200 #define T4VF_PL_BASE_ADDR 0x0200
#define T4VF_MBDATA_BASE_ADDR 0x0240 #define T4VF_MBDATA_BASE_ADDR 0x0240
#define T6VF_MBDATA_BASE_ADDR 0x0280
#define T4VF_CIM_BASE_ADDR 0x0300 #define T4VF_CIM_BASE_ADDR 0x0300
#define T4VF_REGMAP_START 0x0000 #define T4VF_REGMAP_START 0x0000
......
...@@ -120,12 +120,19 @@ int t4vf_wr_mbox_core(struct adapter *adapter, const void *cmd, int size, ...@@ -120,12 +120,19 @@ int t4vf_wr_mbox_core(struct adapter *adapter, const void *cmd, int size,
1, 1, 3, 5, 10, 10, 20, 50, 100 1, 1, 3, 5, 10, 10, 20, 50, 100
}; };
u32 v; u32 v, mbox_data;
int i, ms, delay_idx; int i, ms, delay_idx;
const __be64 *p; const __be64 *p;
u32 mbox_data = T4VF_MBDATA_BASE_ADDR;
u32 mbox_ctl = T4VF_CIM_BASE_ADDR + CIM_VF_EXT_MAILBOX_CTRL; u32 mbox_ctl = T4VF_CIM_BASE_ADDR + CIM_VF_EXT_MAILBOX_CTRL;
/* In T6, mailbox size is changed to 128 bytes to avoid
* invalidating the entire prefetch buffer.
*/
if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5)
mbox_data = T4VF_MBDATA_BASE_ADDR;
else
mbox_data = T6VF_MBDATA_BASE_ADDR;
/* /*
* Commands must be multiples of 16 bytes in length and may not be * Commands must be multiples of 16 bytes in length and may not be
* larger than the size of the Mailbox Data register array. * larger than the size of the Mailbox Data register array.
......
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