Commit 1539c8c5 authored by Pierre-Louis Bossart's avatar Pierre-Louis Bossart Committed by Mark Brown

ASoC: SOF: core: debug: force all processing on primary core

The topology file currently provides information on which
pipeline/processing is to be scheduled on which DSP core.

To help diagnose potential issues, this patch provides an override of
the 'core' tokens to use the primary core (typically core0). Of course
this may result in a Core0 activity that exceeds hardware
capabilities, so this should only be used when the total processing
fits on DSP - possibly using firmware mockup processing and stubs.

No new dmesg log was added to avoid adding noise during topology
parsing, but the existing logs will show the primary core being used.

This is strictly for validation/debug, products should NEVER use this
override, the topology is assumed to be the description of the
firmware graph.
Signed-off-by: default avatarPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: default avatarBard Liao <bard.liao@intel.com>
Reviewed-by: default avatarKai Vehmanen <kai.vehmanen@linux.intel.com>
Signed-off-by: default avatarPeter Ujfalusi <peter.ujfalusi@linux.intel.com>
Link: https://lore.kernel.org/r/20211006110645.26679-2-peter.ujfalusi@linux.intel.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent dc1fad25
...@@ -30,6 +30,9 @@ ...@@ -30,6 +30,9 @@
#define SOF_DBG_DYNAMIC_PIPELINES_ENABLE BIT(4) /* 0: use static pipelines #define SOF_DBG_DYNAMIC_PIPELINES_ENABLE BIT(4) /* 0: use static pipelines
* 1: use dynamic pipelines * 1: use dynamic pipelines
*/ */
#define SOF_DBG_DISABLE_MULTICORE BIT(5) /* schedule all pipelines/widgets
* on primary core
*/
#define SOF_DBG_DUMP_REGS BIT(0) #define SOF_DBG_DUMP_REGS BIT(0)
#define SOF_DBG_DUMP_MBOX BIT(1) #define SOF_DBG_DUMP_MBOX BIT(1)
......
...@@ -1759,6 +1759,9 @@ static int sof_widget_load_pipeline(struct snd_soc_component *scomp, int index, ...@@ -1759,6 +1759,9 @@ static int sof_widget_load_pipeline(struct snd_soc_component *scomp, int index,
goto err; goto err;
} }
if (sof_core_debug & SOF_DBG_DISABLE_MULTICORE)
pipeline->core = SOF_DSP_PRIMARY_CORE;
if (sof_core_debug & SOF_DBG_DYNAMIC_PIPELINES_OVERRIDE) if (sof_core_debug & SOF_DBG_DYNAMIC_PIPELINES_OVERRIDE)
swidget->dynamic_pipeline_widget = sof_core_debug & swidget->dynamic_pipeline_widget = sof_core_debug &
SOF_DBG_DYNAMIC_PIPELINES_ENABLE; SOF_DBG_DYNAMIC_PIPELINES_ENABLE;
...@@ -2356,6 +2359,9 @@ static int sof_widget_ready(struct snd_soc_component *scomp, int index, ...@@ -2356,6 +2359,9 @@ static int sof_widget_ready(struct snd_soc_component *scomp, int index,
return ret; return ret;
} }
if (sof_core_debug & SOF_DBG_DISABLE_MULTICORE)
comp.core = SOF_DSP_PRIMARY_CORE;
swidget->core = comp.core; swidget->core = comp.core;
ret = sof_parse_tokens(scomp, &swidget->comp_ext, comp_ext_tokens, ret = sof_parse_tokens(scomp, &swidget->comp_ext, comp_ext_tokens,
......
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