Commit 158bc065 authored by Andrew Lunn's avatar Andrew Lunn Committed by David S. Miller

net: dsa: mv88e6xxx: replace ds with ps where possible

The dsa_switch structure ds is actually needed in very few places,
mostly during setup of the switch. The private structure ps is however
needed nearly everywhere. Pass ps, not ds internally.

[vd: rebased Andrew's patch.]
Signed-off-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarVivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 8cd14ccb
...@@ -50,6 +50,7 @@ static const char *mv88e6123_drv_probe(struct device *dsa_dev, ...@@ -50,6 +50,7 @@ static const char *mv88e6123_drv_probe(struct device *dsa_dev,
static int mv88e6123_setup_global(struct dsa_switch *ds) static int mv88e6123_setup_global(struct dsa_switch *ds)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
u32 upstream_port = dsa_upstream_port(ds); u32 upstream_port = dsa_upstream_port(ds);
int ret; int ret;
u32 reg; u32 reg;
...@@ -62,7 +63,7 @@ static int mv88e6123_setup_global(struct dsa_switch *ds) ...@@ -62,7 +63,7 @@ static int mv88e6123_setup_global(struct dsa_switch *ds)
* external PHYs to poll), don't discard packets with * external PHYs to poll), don't discard packets with
* excessive collisions, and mask all interrupt sources. * excessive collisions, and mask all interrupt sources.
*/ */
ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_CONTROL, 0x0000); ret = mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_CONTROL, 0x0000);
if (ret) if (ret)
return ret; return ret;
...@@ -73,26 +74,29 @@ static int mv88e6123_setup_global(struct dsa_switch *ds) ...@@ -73,26 +74,29 @@ static int mv88e6123_setup_global(struct dsa_switch *ds)
reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT | reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT | upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT; upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT;
ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg); ret = mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);
if (ret) if (ret)
return ret; return ret;
/* Disable remote management for now, and set the switch's /* Disable remote management for now, and set the switch's
* DSA device number. * DSA device number.
*/ */
return mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_CONTROL_2, return mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_CONTROL_2,
ds->index & 0x1f); ds->index & 0x1f);
} }
static int mv88e6123_setup(struct dsa_switch *ds) static int mv88e6123_setup(struct dsa_switch *ds)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
int ret; int ret;
ret = mv88e6xxx_setup_common(ds); ps->ds = ds;
ret = mv88e6xxx_setup_common(ps);
if (ret < 0) if (ret < 0)
return ret; return ret;
ret = mv88e6xxx_switch_reset(ds, false); ret = mv88e6xxx_switch_reset(ps, false);
if (ret < 0) if (ret < 0)
return ret; return ret;
......
...@@ -56,6 +56,7 @@ static const char *mv88e6131_drv_probe(struct device *dsa_dev, ...@@ -56,6 +56,7 @@ static const char *mv88e6131_drv_probe(struct device *dsa_dev,
static int mv88e6131_setup_global(struct dsa_switch *ds) static int mv88e6131_setup_global(struct dsa_switch *ds)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
u32 upstream_port = dsa_upstream_port(ds); u32 upstream_port = dsa_upstream_port(ds);
int ret; int ret;
u32 reg; u32 reg;
...@@ -69,14 +70,14 @@ static int mv88e6131_setup_global(struct dsa_switch *ds) ...@@ -69,14 +70,14 @@ static int mv88e6131_setup_global(struct dsa_switch *ds)
* to arbitrate between packet queues, set the maximum frame * to arbitrate between packet queues, set the maximum frame
* size to 1632, and mask all interrupt sources. * size to 1632, and mask all interrupt sources.
*/ */
ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_CONTROL, ret = mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_CONTROL,
GLOBAL_CONTROL_PPU_ENABLE | GLOBAL_CONTROL_PPU_ENABLE |
GLOBAL_CONTROL_MAX_FRAME_1632); GLOBAL_CONTROL_MAX_FRAME_1632);
if (ret) if (ret)
return ret; return ret;
/* Set the VLAN ethertype to 0x8100. */ /* Set the VLAN ethertype to 0x8100. */
ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_CORE_TAG_TYPE, 0x8100); ret = mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_CORE_TAG_TYPE, 0x8100);
if (ret) if (ret)
return ret; return ret;
...@@ -87,7 +88,7 @@ static int mv88e6131_setup_global(struct dsa_switch *ds) ...@@ -87,7 +88,7 @@ static int mv88e6131_setup_global(struct dsa_switch *ds)
reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT | reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT | upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
GLOBAL_MONITOR_CONTROL_ARP_DISABLED; GLOBAL_MONITOR_CONTROL_ARP_DISABLED;
ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg); ret = mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);
if (ret) if (ret)
return ret; return ret;
...@@ -96,11 +97,11 @@ static int mv88e6131_setup_global(struct dsa_switch *ds) ...@@ -96,11 +97,11 @@ static int mv88e6131_setup_global(struct dsa_switch *ds)
* DSA device number. * DSA device number.
*/ */
if (ds->dst->pd->nr_chips > 1) if (ds->dst->pd->nr_chips > 1)
ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_CONTROL_2, ret = mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_CONTROL_2,
GLOBAL_CONTROL_2_MULTIPLE_CASCADE | GLOBAL_CONTROL_2_MULTIPLE_CASCADE |
(ds->index & 0x1f)); (ds->index & 0x1f));
else else
ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_CONTROL_2, ret = mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_CONTROL_2,
GLOBAL_CONTROL_2_NO_CASCADE | GLOBAL_CONTROL_2_NO_CASCADE |
(ds->index & 0x1f)); (ds->index & 0x1f));
if (ret) if (ret)
...@@ -109,7 +110,7 @@ static int mv88e6131_setup_global(struct dsa_switch *ds) ...@@ -109,7 +110,7 @@ static int mv88e6131_setup_global(struct dsa_switch *ds)
/* Force the priority of IGMP/MLD snoop frames and ARP frames /* Force the priority of IGMP/MLD snoop frames and ARP frames
* to the highest setting. * to the highest setting.
*/ */
return mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_PRIO_OVERRIDE, return mv88e6xxx_reg_write(ps, REG_GLOBAL2, GLOBAL2_PRIO_OVERRIDE,
GLOBAL2_PRIO_OVERRIDE_FORCE_SNOOP | GLOBAL2_PRIO_OVERRIDE_FORCE_SNOOP |
7 << GLOBAL2_PRIO_OVERRIDE_SNOOP_SHIFT | 7 << GLOBAL2_PRIO_OVERRIDE_SNOOP_SHIFT |
GLOBAL2_PRIO_OVERRIDE_FORCE_ARP | GLOBAL2_PRIO_OVERRIDE_FORCE_ARP |
...@@ -118,15 +119,18 @@ static int mv88e6131_setup_global(struct dsa_switch *ds) ...@@ -118,15 +119,18 @@ static int mv88e6131_setup_global(struct dsa_switch *ds)
static int mv88e6131_setup(struct dsa_switch *ds) static int mv88e6131_setup(struct dsa_switch *ds)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
int ret; int ret;
ret = mv88e6xxx_setup_common(ds); ps->ds = ds;
ret = mv88e6xxx_setup_common(ps);
if (ret < 0) if (ret < 0)
return ret; return ret;
mv88e6xxx_ppu_state_init(ds); mv88e6xxx_ppu_state_init(ps);
ret = mv88e6xxx_switch_reset(ds, false); ret = mv88e6xxx_switch_reset(ps, false);
if (ret < 0) if (ret < 0)
return ret; return ret;
......
...@@ -56,6 +56,7 @@ static const char *mv88e6171_drv_probe(struct device *dsa_dev, ...@@ -56,6 +56,7 @@ static const char *mv88e6171_drv_probe(struct device *dsa_dev,
static int mv88e6171_setup_global(struct dsa_switch *ds) static int mv88e6171_setup_global(struct dsa_switch *ds)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
u32 upstream_port = dsa_upstream_port(ds); u32 upstream_port = dsa_upstream_port(ds);
int ret; int ret;
u32 reg; u32 reg;
...@@ -67,7 +68,7 @@ static int mv88e6171_setup_global(struct dsa_switch *ds) ...@@ -67,7 +68,7 @@ static int mv88e6171_setup_global(struct dsa_switch *ds)
/* Discard packets with excessive collisions, mask all /* Discard packets with excessive collisions, mask all
* interrupt sources, enable PPU. * interrupt sources, enable PPU.
*/ */
ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_CONTROL, ret = mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_CONTROL,
GLOBAL_CONTROL_PPU_ENABLE | GLOBAL_CONTROL_PPU_ENABLE |
GLOBAL_CONTROL_DISCARD_EXCESS); GLOBAL_CONTROL_DISCARD_EXCESS);
if (ret) if (ret)
...@@ -81,26 +82,29 @@ static int mv88e6171_setup_global(struct dsa_switch *ds) ...@@ -81,26 +82,29 @@ static int mv88e6171_setup_global(struct dsa_switch *ds)
upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT | upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT | upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT |
upstream_port << GLOBAL_MONITOR_CONTROL_MIRROR_SHIFT; upstream_port << GLOBAL_MONITOR_CONTROL_MIRROR_SHIFT;
ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg); ret = mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);
if (ret) if (ret)
return ret; return ret;
/* Disable remote management for now, and set the switch's /* Disable remote management for now, and set the switch's
* DSA device number. * DSA device number.
*/ */
return mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_CONTROL_2, return mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_CONTROL_2,
ds->index & 0x1f); ds->index & 0x1f);
} }
static int mv88e6171_setup(struct dsa_switch *ds) static int mv88e6171_setup(struct dsa_switch *ds)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
int ret; int ret;
ret = mv88e6xxx_setup_common(ds); ps->ds = ds;
ret = mv88e6xxx_setup_common(ps);
if (ret < 0) if (ret < 0)
return ret; return ret;
ret = mv88e6xxx_switch_reset(ds, true); ret = mv88e6xxx_switch_reset(ps, true);
if (ret < 0) if (ret < 0)
return ret; return ret;
......
...@@ -73,6 +73,7 @@ static const char *mv88e6352_drv_probe(struct device *dsa_dev, ...@@ -73,6 +73,7 @@ static const char *mv88e6352_drv_probe(struct device *dsa_dev,
static int mv88e6352_setup_global(struct dsa_switch *ds) static int mv88e6352_setup_global(struct dsa_switch *ds)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
u32 upstream_port = dsa_upstream_port(ds); u32 upstream_port = dsa_upstream_port(ds);
int ret; int ret;
u32 reg; u32 reg;
...@@ -84,7 +85,7 @@ static int mv88e6352_setup_global(struct dsa_switch *ds) ...@@ -84,7 +85,7 @@ static int mv88e6352_setup_global(struct dsa_switch *ds)
/* Discard packets with excessive collisions, /* Discard packets with excessive collisions,
* mask all interrupt sources, enable PPU (bit 14, undocumented). * mask all interrupt sources, enable PPU (bit 14, undocumented).
*/ */
ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_CONTROL, ret = mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_CONTROL,
GLOBAL_CONTROL_PPU_ENABLE | GLOBAL_CONTROL_PPU_ENABLE |
GLOBAL_CONTROL_DISCARD_EXCESS); GLOBAL_CONTROL_DISCARD_EXCESS);
if (ret) if (ret)
...@@ -97,14 +98,14 @@ static int mv88e6352_setup_global(struct dsa_switch *ds) ...@@ -97,14 +98,14 @@ static int mv88e6352_setup_global(struct dsa_switch *ds)
reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT | reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT | upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT; upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT;
ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg); ret = mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);
if (ret) if (ret)
return ret; return ret;
/* Disable remote management for now, and set the switch's /* Disable remote management for now, and set the switch's
* DSA device number. * DSA device number.
*/ */
return mv88e6xxx_reg_write(ds, REG_GLOBAL, 0x1c, ds->index & 0x1f); return mv88e6xxx_reg_write(ps, REG_GLOBAL, 0x1c, ds->index & 0x1f);
} }
static int mv88e6352_setup(struct dsa_switch *ds) static int mv88e6352_setup(struct dsa_switch *ds)
...@@ -112,13 +113,15 @@ static int mv88e6352_setup(struct dsa_switch *ds) ...@@ -112,13 +113,15 @@ static int mv88e6352_setup(struct dsa_switch *ds)
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
int ret; int ret;
ret = mv88e6xxx_setup_common(ds); ps->ds = ds;
ret = mv88e6xxx_setup_common(ps);
if (ret < 0) if (ret < 0)
return ret; return ret;
mutex_init(&ps->eeprom_mutex); mutex_init(&ps->eeprom_mutex);
ret = mv88e6xxx_switch_reset(ds, true); ret = mv88e6xxx_switch_reset(ps, true);
if (ret < 0) if (ret < 0)
return ret; return ret;
...@@ -136,7 +139,7 @@ static int mv88e6352_read_eeprom_word(struct dsa_switch *ds, int addr) ...@@ -136,7 +139,7 @@ static int mv88e6352_read_eeprom_word(struct dsa_switch *ds, int addr)
mutex_lock(&ps->eeprom_mutex); mutex_lock(&ps->eeprom_mutex);
ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_EEPROM_OP, ret = mv88e6xxx_reg_write(ps, REG_GLOBAL2, GLOBAL2_EEPROM_OP,
GLOBAL2_EEPROM_OP_READ | GLOBAL2_EEPROM_OP_READ |
(addr & GLOBAL2_EEPROM_OP_ADDR_MASK)); (addr & GLOBAL2_EEPROM_OP_ADDR_MASK));
if (ret < 0) if (ret < 0)
...@@ -146,7 +149,7 @@ static int mv88e6352_read_eeprom_word(struct dsa_switch *ds, int addr) ...@@ -146,7 +149,7 @@ static int mv88e6352_read_eeprom_word(struct dsa_switch *ds, int addr)
if (ret < 0) if (ret < 0)
goto error; goto error;
ret = mv88e6xxx_reg_read(ds, REG_GLOBAL2, GLOBAL2_EEPROM_DATA); ret = mv88e6xxx_reg_read(ps, REG_GLOBAL2, GLOBAL2_EEPROM_DATA);
error: error:
mutex_unlock(&ps->eeprom_mutex); mutex_unlock(&ps->eeprom_mutex);
return ret; return ret;
...@@ -217,9 +220,10 @@ static int mv88e6352_get_eeprom(struct dsa_switch *ds, ...@@ -217,9 +220,10 @@ static int mv88e6352_get_eeprom(struct dsa_switch *ds,
static int mv88e6352_eeprom_is_readonly(struct dsa_switch *ds) static int mv88e6352_eeprom_is_readonly(struct dsa_switch *ds)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
int ret; int ret;
ret = mv88e6xxx_reg_read(ds, REG_GLOBAL2, GLOBAL2_EEPROM_OP); ret = mv88e6xxx_reg_read(ps, REG_GLOBAL2, GLOBAL2_EEPROM_OP);
if (ret < 0) if (ret < 0)
return ret; return ret;
...@@ -237,11 +241,11 @@ static int mv88e6352_write_eeprom_word(struct dsa_switch *ds, int addr, ...@@ -237,11 +241,11 @@ static int mv88e6352_write_eeprom_word(struct dsa_switch *ds, int addr,
mutex_lock(&ps->eeprom_mutex); mutex_lock(&ps->eeprom_mutex);
ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_EEPROM_DATA, data); ret = mv88e6xxx_reg_write(ps, REG_GLOBAL2, GLOBAL2_EEPROM_DATA, data);
if (ret < 0) if (ret < 0)
goto error; goto error;
ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_EEPROM_OP, ret = mv88e6xxx_reg_write(ps, REG_GLOBAL2, GLOBAL2_EEPROM_OP,
GLOBAL2_EEPROM_OP_WRITE | GLOBAL2_EEPROM_OP_WRITE |
(addr & GLOBAL2_EEPROM_OP_ADDR_MASK)); (addr & GLOBAL2_EEPROM_OP_ADDR_MASK));
if (ret < 0) if (ret < 0)
......
...@@ -25,12 +25,10 @@ ...@@ -25,12 +25,10 @@
#include <net/switchdev.h> #include <net/switchdev.h>
#include "mv88e6xxx.h" #include "mv88e6xxx.h"
static void assert_smi_lock(struct dsa_switch *ds) static void assert_smi_lock(struct mv88e6xxx_priv_state *ps)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
if (unlikely(!mutex_is_locked(&ps->smi_mutex))) { if (unlikely(!mutex_is_locked(&ps->smi_mutex))) {
dev_err(ds->master_dev, "SMI lock not held!\n"); dev_err(ps->dev, "SMI lock not held!\n");
dump_stack(); dump_stack();
} }
} }
...@@ -92,30 +90,29 @@ static int __mv88e6xxx_reg_read(struct mii_bus *bus, int sw_addr, int addr, ...@@ -92,30 +90,29 @@ static int __mv88e6xxx_reg_read(struct mii_bus *bus, int sw_addr, int addr,
return ret & 0xffff; return ret & 0xffff;
} }
static int _mv88e6xxx_reg_read(struct dsa_switch *ds, int addr, int reg) static int _mv88e6xxx_reg_read(struct mv88e6xxx_priv_state *ps,
int addr, int reg)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
int ret; int ret;
assert_smi_lock(ds); assert_smi_lock(ps);
ret = __mv88e6xxx_reg_read(ps->bus, ps->sw_addr, addr, reg); ret = __mv88e6xxx_reg_read(ps->bus, ps->sw_addr, addr, reg);
if (ret < 0) if (ret < 0)
return ret; return ret;
dev_dbg(ds->master_dev, "<- addr: 0x%.2x reg: 0x%.2x val: 0x%.4x\n", dev_dbg(ps->dev, "<- addr: 0x%.2x reg: 0x%.2x val: 0x%.4x\n",
addr, reg, ret); addr, reg, ret);
return ret; return ret;
} }
int mv88e6xxx_reg_read(struct dsa_switch *ds, int addr, int reg) int mv88e6xxx_reg_read(struct mv88e6xxx_priv_state *ps, int addr, int reg)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
int ret; int ret;
mutex_lock(&ps->smi_mutex); mutex_lock(&ps->smi_mutex);
ret = _mv88e6xxx_reg_read(ds, addr, reg); ret = _mv88e6xxx_reg_read(ps, addr, reg);
mutex_unlock(&ps->smi_mutex); mutex_unlock(&ps->smi_mutex);
return ret; return ret;
...@@ -153,26 +150,24 @@ static int __mv88e6xxx_reg_write(struct mii_bus *bus, int sw_addr, int addr, ...@@ -153,26 +150,24 @@ static int __mv88e6xxx_reg_write(struct mii_bus *bus, int sw_addr, int addr,
return 0; return 0;
} }
static int _mv88e6xxx_reg_write(struct dsa_switch *ds, int addr, int reg, static int _mv88e6xxx_reg_write(struct mv88e6xxx_priv_state *ps, int addr,
u16 val) int reg, u16 val)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); assert_smi_lock(ps);
assert_smi_lock(ds); dev_dbg(ps->dev, "-> addr: 0x%.2x reg: 0x%.2x val: 0x%.4x\n",
dev_dbg(ds->master_dev, "-> addr: 0x%.2x reg: 0x%.2x val: 0x%.4x\n",
addr, reg, val); addr, reg, val);
return __mv88e6xxx_reg_write(ps->bus, ps->sw_addr, addr, reg, val); return __mv88e6xxx_reg_write(ps->bus, ps->sw_addr, addr, reg, val);
} }
int mv88e6xxx_reg_write(struct dsa_switch *ds, int addr, int reg, u16 val) int mv88e6xxx_reg_write(struct mv88e6xxx_priv_state *ps, int addr,
int reg, u16 val)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
int ret; int ret;
mutex_lock(&ps->smi_mutex); mutex_lock(&ps->smi_mutex);
ret = _mv88e6xxx_reg_write(ds, addr, reg, val); ret = _mv88e6xxx_reg_write(ps, addr, reg, val);
mutex_unlock(&ps->smi_mutex); mutex_unlock(&ps->smi_mutex);
return ret; return ret;
...@@ -180,24 +175,26 @@ int mv88e6xxx_reg_write(struct dsa_switch *ds, int addr, int reg, u16 val) ...@@ -180,24 +175,26 @@ int mv88e6xxx_reg_write(struct dsa_switch *ds, int addr, int reg, u16 val)
int mv88e6xxx_set_addr_direct(struct dsa_switch *ds, u8 *addr) int mv88e6xxx_set_addr_direct(struct dsa_switch *ds, u8 *addr)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
int err; int err;
err = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_MAC_01, err = mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_MAC_01,
(addr[0] << 8) | addr[1]); (addr[0] << 8) | addr[1]);
if (err) if (err)
return err; return err;
err = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_MAC_23, err = mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_MAC_23,
(addr[2] << 8) | addr[3]); (addr[2] << 8) | addr[3]);
if (err) if (err)
return err; return err;
return mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_MAC_45, return mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_MAC_45,
(addr[4] << 8) | addr[5]); (addr[4] << 8) | addr[5]);
} }
int mv88e6xxx_set_addr_indirect(struct dsa_switch *ds, u8 *addr) int mv88e6xxx_set_addr_indirect(struct dsa_switch *ds, u8 *addr)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
int ret; int ret;
int i; int i;
...@@ -205,7 +202,7 @@ int mv88e6xxx_set_addr_indirect(struct dsa_switch *ds, u8 *addr) ...@@ -205,7 +202,7 @@ int mv88e6xxx_set_addr_indirect(struct dsa_switch *ds, u8 *addr)
int j; int j;
/* Write the MAC address byte. */ /* Write the MAC address byte. */
ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_SWITCH_MAC, ret = mv88e6xxx_reg_write(ps, REG_GLOBAL2, GLOBAL2_SWITCH_MAC,
GLOBAL2_SWITCH_MAC_BUSY | GLOBAL2_SWITCH_MAC_BUSY |
(i << 8) | addr[i]); (i << 8) | addr[i]);
if (ret) if (ret)
...@@ -213,7 +210,7 @@ int mv88e6xxx_set_addr_indirect(struct dsa_switch *ds, u8 *addr) ...@@ -213,7 +210,7 @@ int mv88e6xxx_set_addr_indirect(struct dsa_switch *ds, u8 *addr)
/* Wait for the write to complete. */ /* Wait for the write to complete. */
for (j = 0; j < 16; j++) { for (j = 0; j < 16; j++) {
ret = mv88e6xxx_reg_read(ds, REG_GLOBAL2, ret = mv88e6xxx_reg_read(ps, REG_GLOBAL2,
GLOBAL2_SWITCH_MAC); GLOBAL2_SWITCH_MAC);
if (ret < 0) if (ret < 0)
return ret; return ret;
...@@ -228,39 +225,40 @@ int mv88e6xxx_set_addr_indirect(struct dsa_switch *ds, u8 *addr) ...@@ -228,39 +225,40 @@ int mv88e6xxx_set_addr_indirect(struct dsa_switch *ds, u8 *addr)
return 0; return 0;
} }
static int _mv88e6xxx_phy_read(struct dsa_switch *ds, int addr, int regnum) static int _mv88e6xxx_phy_read(struct mv88e6xxx_priv_state *ps, int addr,
int regnum)
{ {
if (addr >= 0) if (addr >= 0)
return _mv88e6xxx_reg_read(ds, addr, regnum); return _mv88e6xxx_reg_read(ps, addr, regnum);
return 0xffff; return 0xffff;
} }
static int _mv88e6xxx_phy_write(struct dsa_switch *ds, int addr, int regnum, static int _mv88e6xxx_phy_write(struct mv88e6xxx_priv_state *ps, int addr,
u16 val) int regnum, u16 val)
{ {
if (addr >= 0) if (addr >= 0)
return _mv88e6xxx_reg_write(ds, addr, regnum, val); return _mv88e6xxx_reg_write(ps, addr, regnum, val);
return 0; return 0;
} }
#ifdef CONFIG_NET_DSA_MV88E6XXX_NEED_PPU #ifdef CONFIG_NET_DSA_MV88E6XXX_NEED_PPU
static int mv88e6xxx_ppu_disable(struct dsa_switch *ds) static int mv88e6xxx_ppu_disable(struct mv88e6xxx_priv_state *ps)
{ {
int ret; int ret;
unsigned long timeout; unsigned long timeout;
ret = mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_CONTROL); ret = mv88e6xxx_reg_read(ps, REG_GLOBAL, GLOBAL_CONTROL);
if (ret < 0) if (ret < 0)
return ret; return ret;
ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_CONTROL, ret = mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_CONTROL,
ret & ~GLOBAL_CONTROL_PPU_ENABLE); ret & ~GLOBAL_CONTROL_PPU_ENABLE);
if (ret) if (ret)
return ret; return ret;
timeout = jiffies + 1 * HZ; timeout = jiffies + 1 * HZ;
while (time_before(jiffies, timeout)) { while (time_before(jiffies, timeout)) {
ret = mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_STATUS); ret = mv88e6xxx_reg_read(ps, REG_GLOBAL, GLOBAL_STATUS);
if (ret < 0) if (ret < 0)
return ret; return ret;
...@@ -273,23 +271,23 @@ static int mv88e6xxx_ppu_disable(struct dsa_switch *ds) ...@@ -273,23 +271,23 @@ static int mv88e6xxx_ppu_disable(struct dsa_switch *ds)
return -ETIMEDOUT; return -ETIMEDOUT;
} }
static int mv88e6xxx_ppu_enable(struct dsa_switch *ds) static int mv88e6xxx_ppu_enable(struct mv88e6xxx_priv_state *ps)
{ {
int ret, err; int ret, err;
unsigned long timeout; unsigned long timeout;
ret = mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_CONTROL); ret = mv88e6xxx_reg_read(ps, REG_GLOBAL, GLOBAL_CONTROL);
if (ret < 0) if (ret < 0)
return ret; return ret;
err = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_CONTROL, err = mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_CONTROL,
ret | GLOBAL_CONTROL_PPU_ENABLE); ret | GLOBAL_CONTROL_PPU_ENABLE);
if (err) if (err)
return err; return err;
timeout = jiffies + 1 * HZ; timeout = jiffies + 1 * HZ;
while (time_before(jiffies, timeout)) { while (time_before(jiffies, timeout)) {
ret = mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_STATUS); ret = mv88e6xxx_reg_read(ps, REG_GLOBAL, GLOBAL_STATUS);
if (ret < 0) if (ret < 0)
return ret; return ret;
...@@ -308,9 +306,7 @@ static void mv88e6xxx_ppu_reenable_work(struct work_struct *ugly) ...@@ -308,9 +306,7 @@ static void mv88e6xxx_ppu_reenable_work(struct work_struct *ugly)
ps = container_of(ugly, struct mv88e6xxx_priv_state, ppu_work); ps = container_of(ugly, struct mv88e6xxx_priv_state, ppu_work);
if (mutex_trylock(&ps->ppu_mutex)) { if (mutex_trylock(&ps->ppu_mutex)) {
struct dsa_switch *ds = ps->ds; if (mv88e6xxx_ppu_enable(ps) == 0)
if (mv88e6xxx_ppu_enable(ds) == 0)
ps->ppu_disabled = 0; ps->ppu_disabled = 0;
mutex_unlock(&ps->ppu_mutex); mutex_unlock(&ps->ppu_mutex);
} }
...@@ -323,9 +319,8 @@ static void mv88e6xxx_ppu_reenable_timer(unsigned long _ps) ...@@ -323,9 +319,8 @@ static void mv88e6xxx_ppu_reenable_timer(unsigned long _ps)
schedule_work(&ps->ppu_work); schedule_work(&ps->ppu_work);
} }
static int mv88e6xxx_ppu_access_get(struct dsa_switch *ds) static int mv88e6xxx_ppu_access_get(struct mv88e6xxx_priv_state *ps)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
int ret; int ret;
mutex_lock(&ps->ppu_mutex); mutex_lock(&ps->ppu_mutex);
...@@ -336,7 +331,7 @@ static int mv88e6xxx_ppu_access_get(struct dsa_switch *ds) ...@@ -336,7 +331,7 @@ static int mv88e6xxx_ppu_access_get(struct dsa_switch *ds)
* it. * it.
*/ */
if (!ps->ppu_disabled) { if (!ps->ppu_disabled) {
ret = mv88e6xxx_ppu_disable(ds); ret = mv88e6xxx_ppu_disable(ps);
if (ret < 0) { if (ret < 0) {
mutex_unlock(&ps->ppu_mutex); mutex_unlock(&ps->ppu_mutex);
return ret; return ret;
...@@ -350,19 +345,15 @@ static int mv88e6xxx_ppu_access_get(struct dsa_switch *ds) ...@@ -350,19 +345,15 @@ static int mv88e6xxx_ppu_access_get(struct dsa_switch *ds)
return ret; return ret;
} }
static void mv88e6xxx_ppu_access_put(struct dsa_switch *ds) static void mv88e6xxx_ppu_access_put(struct mv88e6xxx_priv_state *ps)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
/* Schedule a timer to re-enable the PHY polling unit. */ /* Schedule a timer to re-enable the PHY polling unit. */
mod_timer(&ps->ppu_timer, jiffies + msecs_to_jiffies(10)); mod_timer(&ps->ppu_timer, jiffies + msecs_to_jiffies(10));
mutex_unlock(&ps->ppu_mutex); mutex_unlock(&ps->ppu_mutex);
} }
void mv88e6xxx_ppu_state_init(struct dsa_switch *ds) void mv88e6xxx_ppu_state_init(struct mv88e6xxx_priv_state *ps)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
mutex_init(&ps->ppu_mutex); mutex_init(&ps->ppu_mutex);
INIT_WORK(&ps->ppu_work, mv88e6xxx_ppu_reenable_work); INIT_WORK(&ps->ppu_work, mv88e6xxx_ppu_reenable_work);
init_timer(&ps->ppu_timer); init_timer(&ps->ppu_timer);
...@@ -372,12 +363,13 @@ void mv88e6xxx_ppu_state_init(struct dsa_switch *ds) ...@@ -372,12 +363,13 @@ void mv88e6xxx_ppu_state_init(struct dsa_switch *ds)
int mv88e6xxx_phy_read_ppu(struct dsa_switch *ds, int addr, int regnum) int mv88e6xxx_phy_read_ppu(struct dsa_switch *ds, int addr, int regnum)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
int ret; int ret;
ret = mv88e6xxx_ppu_access_get(ds); ret = mv88e6xxx_ppu_access_get(ps);
if (ret >= 0) { if (ret >= 0) {
ret = mv88e6xxx_reg_read(ds, addr, regnum); ret = mv88e6xxx_reg_read(ps, addr, regnum);
mv88e6xxx_ppu_access_put(ds); mv88e6xxx_ppu_access_put(ps);
} }
return ret; return ret;
...@@ -386,96 +378,79 @@ int mv88e6xxx_phy_read_ppu(struct dsa_switch *ds, int addr, int regnum) ...@@ -386,96 +378,79 @@ int mv88e6xxx_phy_read_ppu(struct dsa_switch *ds, int addr, int regnum)
int mv88e6xxx_phy_write_ppu(struct dsa_switch *ds, int addr, int mv88e6xxx_phy_write_ppu(struct dsa_switch *ds, int addr,
int regnum, u16 val) int regnum, u16 val)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
int ret; int ret;
ret = mv88e6xxx_ppu_access_get(ds); ret = mv88e6xxx_ppu_access_get(ps);
if (ret >= 0) { if (ret >= 0) {
ret = mv88e6xxx_reg_write(ds, addr, regnum, val); ret = mv88e6xxx_reg_write(ps, addr, regnum, val);
mv88e6xxx_ppu_access_put(ds); mv88e6xxx_ppu_access_put(ps);
} }
return ret; return ret;
} }
#endif #endif
static bool mv88e6xxx_6065_family(struct dsa_switch *ds) static bool mv88e6xxx_6065_family(struct mv88e6xxx_priv_state *ps)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
return ps->info->family == MV88E6XXX_FAMILY_6065; return ps->info->family == MV88E6XXX_FAMILY_6065;
} }
static bool mv88e6xxx_6095_family(struct dsa_switch *ds) static bool mv88e6xxx_6095_family(struct mv88e6xxx_priv_state *ps)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
return ps->info->family == MV88E6XXX_FAMILY_6095; return ps->info->family == MV88E6XXX_FAMILY_6095;
} }
static bool mv88e6xxx_6097_family(struct dsa_switch *ds) static bool mv88e6xxx_6097_family(struct mv88e6xxx_priv_state *ps)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
return ps->info->family == MV88E6XXX_FAMILY_6097; return ps->info->family == MV88E6XXX_FAMILY_6097;
} }
static bool mv88e6xxx_6165_family(struct dsa_switch *ds) static bool mv88e6xxx_6165_family(struct mv88e6xxx_priv_state *ps)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
return ps->info->family == MV88E6XXX_FAMILY_6165; return ps->info->family == MV88E6XXX_FAMILY_6165;
} }
static bool mv88e6xxx_6185_family(struct dsa_switch *ds) static bool mv88e6xxx_6185_family(struct mv88e6xxx_priv_state *ps)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
return ps->info->family == MV88E6XXX_FAMILY_6185; return ps->info->family == MV88E6XXX_FAMILY_6185;
} }
static bool mv88e6xxx_6320_family(struct dsa_switch *ds) static bool mv88e6xxx_6320_family(struct mv88e6xxx_priv_state *ps)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
return ps->info->family == MV88E6XXX_FAMILY_6320; return ps->info->family == MV88E6XXX_FAMILY_6320;
} }
static bool mv88e6xxx_6351_family(struct dsa_switch *ds) static bool mv88e6xxx_6351_family(struct mv88e6xxx_priv_state *ps)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
return ps->info->family == MV88E6XXX_FAMILY_6351; return ps->info->family == MV88E6XXX_FAMILY_6351;
} }
static bool mv88e6xxx_6352_family(struct dsa_switch *ds) static bool mv88e6xxx_6352_family(struct mv88e6xxx_priv_state *ps)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
return ps->info->family == MV88E6XXX_FAMILY_6352; return ps->info->family == MV88E6XXX_FAMILY_6352;
} }
static unsigned int mv88e6xxx_num_databases(struct dsa_switch *ds) static unsigned int mv88e6xxx_num_databases(struct mv88e6xxx_priv_state *ps)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
return ps->info->num_databases; return ps->info->num_databases;
} }
static bool mv88e6xxx_has_fid_reg(struct dsa_switch *ds) static bool mv88e6xxx_has_fid_reg(struct mv88e6xxx_priv_state *ps)
{ {
/* Does the device have dedicated FID registers for ATU and VTU ops? */ /* Does the device have dedicated FID registers for ATU and VTU ops? */
if (mv88e6xxx_6097_family(ds) || mv88e6xxx_6165_family(ds) || if (mv88e6xxx_6097_family(ps) || mv88e6xxx_6165_family(ps) ||
mv88e6xxx_6351_family(ds) || mv88e6xxx_6352_family(ds)) mv88e6xxx_6351_family(ps) || mv88e6xxx_6352_family(ps))
return true; return true;
return false; return false;
} }
static bool mv88e6xxx_has_stu(struct dsa_switch *ds) static bool mv88e6xxx_has_stu(struct mv88e6xxx_priv_state *ps)
{ {
/* Does the device have STU and dedicated SID registers for VTU ops? */ /* Does the device have STU and dedicated SID registers for VTU ops? */
if (mv88e6xxx_6097_family(ds) || mv88e6xxx_6165_family(ds) || if (mv88e6xxx_6097_family(ps) || mv88e6xxx_6165_family(ps) ||
mv88e6xxx_6351_family(ds) || mv88e6xxx_6352_family(ds)) mv88e6xxx_6351_family(ps) || mv88e6xxx_6352_family(ps))
return true; return true;
return false; return false;
...@@ -497,7 +472,7 @@ void mv88e6xxx_adjust_link(struct dsa_switch *ds, int port, ...@@ -497,7 +472,7 @@ void mv88e6xxx_adjust_link(struct dsa_switch *ds, int port,
mutex_lock(&ps->smi_mutex); mutex_lock(&ps->smi_mutex);
ret = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_PCS_CTRL); ret = _mv88e6xxx_reg_read(ps, REG_PORT(port), PORT_PCS_CTRL);
if (ret < 0) if (ret < 0)
goto out; goto out;
...@@ -511,7 +486,7 @@ void mv88e6xxx_adjust_link(struct dsa_switch *ds, int port, ...@@ -511,7 +486,7 @@ void mv88e6xxx_adjust_link(struct dsa_switch *ds, int port,
if (phydev->link) if (phydev->link)
reg |= PORT_PCS_CTRL_LINK_UP; reg |= PORT_PCS_CTRL_LINK_UP;
if (mv88e6xxx_6065_family(ds) && phydev->speed > SPEED_100) if (mv88e6xxx_6065_family(ps) && phydev->speed > SPEED_100)
goto out; goto out;
switch (phydev->speed) { switch (phydev->speed) {
...@@ -533,7 +508,7 @@ void mv88e6xxx_adjust_link(struct dsa_switch *ds, int port, ...@@ -533,7 +508,7 @@ void mv88e6xxx_adjust_link(struct dsa_switch *ds, int port,
if (phydev->duplex == DUPLEX_FULL) if (phydev->duplex == DUPLEX_FULL)
reg |= PORT_PCS_CTRL_DUPLEX_FULL; reg |= PORT_PCS_CTRL_DUPLEX_FULL;
if ((mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds)) && if ((mv88e6xxx_6352_family(ps) || mv88e6xxx_6351_family(ps)) &&
(port >= ps->info->num_ports - 2)) { (port >= ps->info->num_ports - 2)) {
if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
reg |= PORT_PCS_CTRL_RGMII_DELAY_RXCLK; reg |= PORT_PCS_CTRL_RGMII_DELAY_RXCLK;
...@@ -543,19 +518,19 @@ void mv88e6xxx_adjust_link(struct dsa_switch *ds, int port, ...@@ -543,19 +518,19 @@ void mv88e6xxx_adjust_link(struct dsa_switch *ds, int port,
reg |= (PORT_PCS_CTRL_RGMII_DELAY_RXCLK | reg |= (PORT_PCS_CTRL_RGMII_DELAY_RXCLK |
PORT_PCS_CTRL_RGMII_DELAY_TXCLK); PORT_PCS_CTRL_RGMII_DELAY_TXCLK);
} }
_mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_PCS_CTRL, reg); _mv88e6xxx_reg_write(ps, REG_PORT(port), PORT_PCS_CTRL, reg);
out: out:
mutex_unlock(&ps->smi_mutex); mutex_unlock(&ps->smi_mutex);
} }
static int _mv88e6xxx_stats_wait(struct dsa_switch *ds) static int _mv88e6xxx_stats_wait(struct mv88e6xxx_priv_state *ps)
{ {
int ret; int ret;
int i; int i;
for (i = 0; i < 10; i++) { for (i = 0; i < 10; i++) {
ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_STATS_OP); ret = _mv88e6xxx_reg_read(ps, REG_GLOBAL, GLOBAL_STATS_OP);
if ((ret & GLOBAL_STATS_OP_BUSY) == 0) if ((ret & GLOBAL_STATS_OP_BUSY) == 0)
return 0; return 0;
} }
...@@ -563,52 +538,54 @@ static int _mv88e6xxx_stats_wait(struct dsa_switch *ds) ...@@ -563,52 +538,54 @@ static int _mv88e6xxx_stats_wait(struct dsa_switch *ds)
return -ETIMEDOUT; return -ETIMEDOUT;
} }
static int _mv88e6xxx_stats_snapshot(struct dsa_switch *ds, int port) static int _mv88e6xxx_stats_snapshot(struct mv88e6xxx_priv_state *ps,
int port)
{ {
int ret; int ret;
if (mv88e6xxx_6320_family(ds) || mv88e6xxx_6352_family(ds)) if (mv88e6xxx_6320_family(ps) || mv88e6xxx_6352_family(ps))
port = (port + 1) << 5; port = (port + 1) << 5;
/* Snapshot the hardware statistics counters for this port. */ /* Snapshot the hardware statistics counters for this port. */
ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_STATS_OP, ret = _mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_STATS_OP,
GLOBAL_STATS_OP_CAPTURE_PORT | GLOBAL_STATS_OP_CAPTURE_PORT |
GLOBAL_STATS_OP_HIST_RX_TX | port); GLOBAL_STATS_OP_HIST_RX_TX | port);
if (ret < 0) if (ret < 0)
return ret; return ret;
/* Wait for the snapshotting to complete. */ /* Wait for the snapshotting to complete. */
ret = _mv88e6xxx_stats_wait(ds); ret = _mv88e6xxx_stats_wait(ps);
if (ret < 0) if (ret < 0)
return ret; return ret;
return 0; return 0;
} }
static void _mv88e6xxx_stats_read(struct dsa_switch *ds, int stat, u32 *val) static void _mv88e6xxx_stats_read(struct mv88e6xxx_priv_state *ps,
int stat, u32 *val)
{ {
u32 _val; u32 _val;
int ret; int ret;
*val = 0; *val = 0;
ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_STATS_OP, ret = _mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_STATS_OP,
GLOBAL_STATS_OP_READ_CAPTURED | GLOBAL_STATS_OP_READ_CAPTURED |
GLOBAL_STATS_OP_HIST_RX_TX | stat); GLOBAL_STATS_OP_HIST_RX_TX | stat);
if (ret < 0) if (ret < 0)
return; return;
ret = _mv88e6xxx_stats_wait(ds); ret = _mv88e6xxx_stats_wait(ps);
if (ret < 0) if (ret < 0)
return; return;
ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_STATS_COUNTER_32); ret = _mv88e6xxx_reg_read(ps, REG_GLOBAL, GLOBAL_STATS_COUNTER_32);
if (ret < 0) if (ret < 0)
return; return;
_val = ret << 16; _val = ret << 16;
ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_STATS_COUNTER_01); ret = _mv88e6xxx_reg_read(ps, REG_GLOBAL, GLOBAL_STATS_COUNTER_01);
if (ret < 0) if (ret < 0)
return; return;
...@@ -677,26 +654,26 @@ static struct mv88e6xxx_hw_stat mv88e6xxx_hw_stats[] = { ...@@ -677,26 +654,26 @@ static struct mv88e6xxx_hw_stat mv88e6xxx_hw_stats[] = {
{ "out_management", 4, 0x1f | GLOBAL_STATS_OP_BANK_1, BANK1, }, { "out_management", 4, 0x1f | GLOBAL_STATS_OP_BANK_1, BANK1, },
}; };
static bool mv88e6xxx_has_stat(struct dsa_switch *ds, static bool mv88e6xxx_has_stat(struct mv88e6xxx_priv_state *ps,
struct mv88e6xxx_hw_stat *stat) struct mv88e6xxx_hw_stat *stat)
{ {
switch (stat->type) { switch (stat->type) {
case BANK0: case BANK0:
return true; return true;
case BANK1: case BANK1:
return mv88e6xxx_6320_family(ds); return mv88e6xxx_6320_family(ps);
case PORT: case PORT:
return mv88e6xxx_6095_family(ds) || return mv88e6xxx_6095_family(ps) ||
mv88e6xxx_6185_family(ds) || mv88e6xxx_6185_family(ps) ||
mv88e6xxx_6097_family(ds) || mv88e6xxx_6097_family(ps) ||
mv88e6xxx_6165_family(ds) || mv88e6xxx_6165_family(ps) ||
mv88e6xxx_6351_family(ds) || mv88e6xxx_6351_family(ps) ||
mv88e6xxx_6352_family(ds); mv88e6xxx_6352_family(ps);
} }
return false; return false;
} }
static uint64_t _mv88e6xxx_get_ethtool_stat(struct dsa_switch *ds, static uint64_t _mv88e6xxx_get_ethtool_stat(struct mv88e6xxx_priv_state *ps,
struct mv88e6xxx_hw_stat *s, struct mv88e6xxx_hw_stat *s,
int port) int port)
{ {
...@@ -707,13 +684,13 @@ static uint64_t _mv88e6xxx_get_ethtool_stat(struct dsa_switch *ds, ...@@ -707,13 +684,13 @@ static uint64_t _mv88e6xxx_get_ethtool_stat(struct dsa_switch *ds,
switch (s->type) { switch (s->type) {
case PORT: case PORT:
ret = _mv88e6xxx_reg_read(ds, REG_PORT(port), s->reg); ret = _mv88e6xxx_reg_read(ps, REG_PORT(port), s->reg);
if (ret < 0) if (ret < 0)
return UINT64_MAX; return UINT64_MAX;
low = ret; low = ret;
if (s->sizeof_stat == 4) { if (s->sizeof_stat == 4) {
ret = _mv88e6xxx_reg_read(ds, REG_PORT(port), ret = _mv88e6xxx_reg_read(ps, REG_PORT(port),
s->reg + 1); s->reg + 1);
if (ret < 0) if (ret < 0)
return UINT64_MAX; return UINT64_MAX;
...@@ -722,9 +699,9 @@ static uint64_t _mv88e6xxx_get_ethtool_stat(struct dsa_switch *ds, ...@@ -722,9 +699,9 @@ static uint64_t _mv88e6xxx_get_ethtool_stat(struct dsa_switch *ds,
break; break;
case BANK0: case BANK0:
case BANK1: case BANK1:
_mv88e6xxx_stats_read(ds, s->reg, &low); _mv88e6xxx_stats_read(ps, s->reg, &low);
if (s->sizeof_stat == 8) if (s->sizeof_stat == 8)
_mv88e6xxx_stats_read(ds, s->reg + 1, &high); _mv88e6xxx_stats_read(ps, s->reg + 1, &high);
} }
value = (((u64)high) << 16) | low; value = (((u64)high) << 16) | low;
return value; return value;
...@@ -732,12 +709,13 @@ static uint64_t _mv88e6xxx_get_ethtool_stat(struct dsa_switch *ds, ...@@ -732,12 +709,13 @@ static uint64_t _mv88e6xxx_get_ethtool_stat(struct dsa_switch *ds,
void mv88e6xxx_get_strings(struct dsa_switch *ds, int port, uint8_t *data) void mv88e6xxx_get_strings(struct dsa_switch *ds, int port, uint8_t *data)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
struct mv88e6xxx_hw_stat *stat; struct mv88e6xxx_hw_stat *stat;
int i, j; int i, j;
for (i = 0, j = 0; i < ARRAY_SIZE(mv88e6xxx_hw_stats); i++) { for (i = 0, j = 0; i < ARRAY_SIZE(mv88e6xxx_hw_stats); i++) {
stat = &mv88e6xxx_hw_stats[i]; stat = &mv88e6xxx_hw_stats[i];
if (mv88e6xxx_has_stat(ds, stat)) { if (mv88e6xxx_has_stat(ps, stat)) {
memcpy(data + j * ETH_GSTRING_LEN, stat->string, memcpy(data + j * ETH_GSTRING_LEN, stat->string,
ETH_GSTRING_LEN); ETH_GSTRING_LEN);
j++; j++;
...@@ -747,12 +725,13 @@ void mv88e6xxx_get_strings(struct dsa_switch *ds, int port, uint8_t *data) ...@@ -747,12 +725,13 @@ void mv88e6xxx_get_strings(struct dsa_switch *ds, int port, uint8_t *data)
int mv88e6xxx_get_sset_count(struct dsa_switch *ds) int mv88e6xxx_get_sset_count(struct dsa_switch *ds)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
struct mv88e6xxx_hw_stat *stat; struct mv88e6xxx_hw_stat *stat;
int i, j; int i, j;
for (i = 0, j = 0; i < ARRAY_SIZE(mv88e6xxx_hw_stats); i++) { for (i = 0, j = 0; i < ARRAY_SIZE(mv88e6xxx_hw_stats); i++) {
stat = &mv88e6xxx_hw_stats[i]; stat = &mv88e6xxx_hw_stats[i];
if (mv88e6xxx_has_stat(ds, stat)) if (mv88e6xxx_has_stat(ps, stat))
j++; j++;
} }
return j; return j;
...@@ -769,15 +748,15 @@ mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds, ...@@ -769,15 +748,15 @@ mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds,
mutex_lock(&ps->smi_mutex); mutex_lock(&ps->smi_mutex);
ret = _mv88e6xxx_stats_snapshot(ds, port); ret = _mv88e6xxx_stats_snapshot(ps, port);
if (ret < 0) { if (ret < 0) {
mutex_unlock(&ps->smi_mutex); mutex_unlock(&ps->smi_mutex);
return; return;
} }
for (i = 0, j = 0; i < ARRAY_SIZE(mv88e6xxx_hw_stats); i++) { for (i = 0, j = 0; i < ARRAY_SIZE(mv88e6xxx_hw_stats); i++) {
stat = &mv88e6xxx_hw_stats[i]; stat = &mv88e6xxx_hw_stats[i];
if (mv88e6xxx_has_stat(ds, stat)) { if (mv88e6xxx_has_stat(ps, stat)) {
data[j] = _mv88e6xxx_get_ethtool_stat(ds, stat, port); data[j] = _mv88e6xxx_get_ethtool_stat(ps, stat, port);
j++; j++;
} }
} }
...@@ -793,6 +772,7 @@ int mv88e6xxx_get_regs_len(struct dsa_switch *ds, int port) ...@@ -793,6 +772,7 @@ int mv88e6xxx_get_regs_len(struct dsa_switch *ds, int port)
void mv88e6xxx_get_regs(struct dsa_switch *ds, int port, void mv88e6xxx_get_regs(struct dsa_switch *ds, int port,
struct ethtool_regs *regs, void *_p) struct ethtool_regs *regs, void *_p)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
u16 *p = _p; u16 *p = _p;
int i; int i;
...@@ -803,13 +783,13 @@ void mv88e6xxx_get_regs(struct dsa_switch *ds, int port, ...@@ -803,13 +783,13 @@ void mv88e6xxx_get_regs(struct dsa_switch *ds, int port,
for (i = 0; i < 32; i++) { for (i = 0; i < 32; i++) {
int ret; int ret;
ret = mv88e6xxx_reg_read(ds, REG_PORT(port), i); ret = mv88e6xxx_reg_read(ps, REG_PORT(port), i);
if (ret >= 0) if (ret >= 0)
p[i] = ret; p[i] = ret;
} }
} }
static int _mv88e6xxx_wait(struct dsa_switch *ds, int reg, int offset, static int _mv88e6xxx_wait(struct mv88e6xxx_priv_state *ps, int reg, int offset,
u16 mask) u16 mask)
{ {
unsigned long timeout = jiffies + HZ / 10; unsigned long timeout = jiffies + HZ / 10;
...@@ -817,7 +797,7 @@ static int _mv88e6xxx_wait(struct dsa_switch *ds, int reg, int offset, ...@@ -817,7 +797,7 @@ static int _mv88e6xxx_wait(struct dsa_switch *ds, int reg, int offset,
while (time_before(jiffies, timeout)) { while (time_before(jiffies, timeout)) {
int ret; int ret;
ret = _mv88e6xxx_reg_read(ds, reg, offset); ret = _mv88e6xxx_reg_read(ps, reg, offset);
if (ret < 0) if (ret < 0)
return ret; return ret;
if (!(ret & mask)) if (!(ret & mask))
...@@ -828,74 +808,80 @@ static int _mv88e6xxx_wait(struct dsa_switch *ds, int reg, int offset, ...@@ -828,74 +808,80 @@ static int _mv88e6xxx_wait(struct dsa_switch *ds, int reg, int offset,
return -ETIMEDOUT; return -ETIMEDOUT;
} }
static int mv88e6xxx_wait(struct dsa_switch *ds, int reg, int offset, u16 mask) static int mv88e6xxx_wait(struct mv88e6xxx_priv_state *ps, int reg,
int offset, u16 mask)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
int ret; int ret;
mutex_lock(&ps->smi_mutex); mutex_lock(&ps->smi_mutex);
ret = _mv88e6xxx_wait(ds, reg, offset, mask); ret = _mv88e6xxx_wait(ps, reg, offset, mask);
mutex_unlock(&ps->smi_mutex); mutex_unlock(&ps->smi_mutex);
return ret; return ret;
} }
static int _mv88e6xxx_phy_wait(struct dsa_switch *ds) static int _mv88e6xxx_phy_wait(struct mv88e6xxx_priv_state *ps)
{ {
return _mv88e6xxx_wait(ds, REG_GLOBAL2, GLOBAL2_SMI_OP, return _mv88e6xxx_wait(ps, REG_GLOBAL2, GLOBAL2_SMI_OP,
GLOBAL2_SMI_OP_BUSY); GLOBAL2_SMI_OP_BUSY);
} }
int mv88e6xxx_eeprom_load_wait(struct dsa_switch *ds) int mv88e6xxx_eeprom_load_wait(struct dsa_switch *ds)
{ {
return mv88e6xxx_wait(ds, REG_GLOBAL2, GLOBAL2_EEPROM_OP, struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
return mv88e6xxx_wait(ps, REG_GLOBAL2, GLOBAL2_EEPROM_OP,
GLOBAL2_EEPROM_OP_LOAD); GLOBAL2_EEPROM_OP_LOAD);
} }
int mv88e6xxx_eeprom_busy_wait(struct dsa_switch *ds) int mv88e6xxx_eeprom_busy_wait(struct dsa_switch *ds)
{ {
return mv88e6xxx_wait(ds, REG_GLOBAL2, GLOBAL2_EEPROM_OP, struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
return mv88e6xxx_wait(ps, REG_GLOBAL2, GLOBAL2_EEPROM_OP,
GLOBAL2_EEPROM_OP_BUSY); GLOBAL2_EEPROM_OP_BUSY);
} }
static int _mv88e6xxx_atu_wait(struct dsa_switch *ds) static int _mv88e6xxx_atu_wait(struct mv88e6xxx_priv_state *ps)
{ {
return _mv88e6xxx_wait(ds, REG_GLOBAL, GLOBAL_ATU_OP, return _mv88e6xxx_wait(ps, REG_GLOBAL, GLOBAL_ATU_OP,
GLOBAL_ATU_OP_BUSY); GLOBAL_ATU_OP_BUSY);
} }
static int _mv88e6xxx_phy_read_indirect(struct dsa_switch *ds, int addr, static int _mv88e6xxx_phy_read_indirect(struct mv88e6xxx_priv_state *ps,
int regnum) int addr, int regnum)
{ {
int ret; int ret;
ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_SMI_OP, ret = _mv88e6xxx_reg_write(ps, REG_GLOBAL2, GLOBAL2_SMI_OP,
GLOBAL2_SMI_OP_22_READ | (addr << 5) | GLOBAL2_SMI_OP_22_READ | (addr << 5) |
regnum); regnum);
if (ret < 0) if (ret < 0)
return ret; return ret;
ret = _mv88e6xxx_phy_wait(ds); ret = _mv88e6xxx_phy_wait(ps);
if (ret < 0) if (ret < 0)
return ret; return ret;
return _mv88e6xxx_reg_read(ds, REG_GLOBAL2, GLOBAL2_SMI_DATA); ret = _mv88e6xxx_reg_read(ps, REG_GLOBAL2, GLOBAL2_SMI_DATA);
return ret;
} }
static int _mv88e6xxx_phy_write_indirect(struct dsa_switch *ds, int addr, static int _mv88e6xxx_phy_write_indirect(struct mv88e6xxx_priv_state *ps,
int regnum, u16 val) int addr, int regnum, u16 val)
{ {
int ret; int ret;
ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_SMI_DATA, val); ret = _mv88e6xxx_reg_write(ps, REG_GLOBAL2, GLOBAL2_SMI_DATA, val);
if (ret < 0) if (ret < 0)
return ret; return ret;
ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_SMI_OP, ret = _mv88e6xxx_reg_write(ps, REG_GLOBAL2, GLOBAL2_SMI_OP,
GLOBAL2_SMI_OP_22_WRITE | (addr << 5) | GLOBAL2_SMI_OP_22_WRITE | (addr << 5) |
regnum); regnum);
return _mv88e6xxx_phy_wait(ds); return _mv88e6xxx_phy_wait(ps);
} }
int mv88e6xxx_get_eee(struct dsa_switch *ds, int port, struct ethtool_eee *e) int mv88e6xxx_get_eee(struct dsa_switch *ds, int port, struct ethtool_eee *e)
...@@ -905,14 +891,14 @@ int mv88e6xxx_get_eee(struct dsa_switch *ds, int port, struct ethtool_eee *e) ...@@ -905,14 +891,14 @@ int mv88e6xxx_get_eee(struct dsa_switch *ds, int port, struct ethtool_eee *e)
mutex_lock(&ps->smi_mutex); mutex_lock(&ps->smi_mutex);
reg = _mv88e6xxx_phy_read_indirect(ds, port, 16); reg = _mv88e6xxx_phy_read_indirect(ps, port, 16);
if (reg < 0) if (reg < 0)
goto out; goto out;
e->eee_enabled = !!(reg & 0x0200); e->eee_enabled = !!(reg & 0x0200);
e->tx_lpi_enabled = !!(reg & 0x0100); e->tx_lpi_enabled = !!(reg & 0x0100);
reg = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_STATUS); reg = _mv88e6xxx_reg_read(ps, REG_PORT(port), PORT_STATUS);
if (reg < 0) if (reg < 0)
goto out; goto out;
...@@ -933,7 +919,7 @@ int mv88e6xxx_set_eee(struct dsa_switch *ds, int port, ...@@ -933,7 +919,7 @@ int mv88e6xxx_set_eee(struct dsa_switch *ds, int port,
mutex_lock(&ps->smi_mutex); mutex_lock(&ps->smi_mutex);
ret = _mv88e6xxx_phy_read_indirect(ds, port, 16); ret = _mv88e6xxx_phy_read_indirect(ps, port, 16);
if (ret < 0) if (ret < 0)
goto out; goto out;
...@@ -943,28 +929,28 @@ int mv88e6xxx_set_eee(struct dsa_switch *ds, int port, ...@@ -943,28 +929,28 @@ int mv88e6xxx_set_eee(struct dsa_switch *ds, int port,
if (e->tx_lpi_enabled) if (e->tx_lpi_enabled)
reg |= 0x0100; reg |= 0x0100;
ret = _mv88e6xxx_phy_write_indirect(ds, port, 16, reg); ret = _mv88e6xxx_phy_write_indirect(ps, port, 16, reg);
out: out:
mutex_unlock(&ps->smi_mutex); mutex_unlock(&ps->smi_mutex);
return ret; return ret;
} }
static int _mv88e6xxx_atu_cmd(struct dsa_switch *ds, u16 fid, u16 cmd) static int _mv88e6xxx_atu_cmd(struct mv88e6xxx_priv_state *ps, u16 fid, u16 cmd)
{ {
int ret; int ret;
if (mv88e6xxx_has_fid_reg(ds)) { if (mv88e6xxx_has_fid_reg(ps)) {
ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_ATU_FID, fid); ret = _mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_ATU_FID, fid);
if (ret < 0) if (ret < 0)
return ret; return ret;
} else if (mv88e6xxx_num_databases(ds) == 256) { } else if (mv88e6xxx_num_databases(ps) == 256) {
/* ATU DBNum[7:4] are located in ATU Control 15:12 */ /* ATU DBNum[7:4] are located in ATU Control 15:12 */
ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_ATU_CONTROL); ret = _mv88e6xxx_reg_read(ps, REG_GLOBAL, GLOBAL_ATU_CONTROL);
if (ret < 0) if (ret < 0)
return ret; return ret;
ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_ATU_CONTROL, ret = _mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_ATU_CONTROL,
(ret & 0xfff) | (ret & 0xfff) |
((fid << 8) & 0xf000)); ((fid << 8) & 0xf000));
if (ret < 0) if (ret < 0)
...@@ -974,14 +960,14 @@ static int _mv88e6xxx_atu_cmd(struct dsa_switch *ds, u16 fid, u16 cmd) ...@@ -974,14 +960,14 @@ static int _mv88e6xxx_atu_cmd(struct dsa_switch *ds, u16 fid, u16 cmd)
cmd |= fid & 0xf; cmd |= fid & 0xf;
} }
ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_ATU_OP, cmd); ret = _mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_ATU_OP, cmd);
if (ret < 0) if (ret < 0)
return ret; return ret;
return _mv88e6xxx_atu_wait(ds); return _mv88e6xxx_atu_wait(ps);
} }
static int _mv88e6xxx_atu_data_write(struct dsa_switch *ds, static int _mv88e6xxx_atu_data_write(struct mv88e6xxx_priv_state *ps,
struct mv88e6xxx_atu_entry *entry) struct mv88e6xxx_atu_entry *entry)
{ {
u16 data = entry->state & GLOBAL_ATU_DATA_STATE_MASK; u16 data = entry->state & GLOBAL_ATU_DATA_STATE_MASK;
...@@ -1001,21 +987,21 @@ static int _mv88e6xxx_atu_data_write(struct dsa_switch *ds, ...@@ -1001,21 +987,21 @@ static int _mv88e6xxx_atu_data_write(struct dsa_switch *ds,
data |= (entry->portv_trunkid << shift) & mask; data |= (entry->portv_trunkid << shift) & mask;
} }
return _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_ATU_DATA, data); return _mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_ATU_DATA, data);
} }
static int _mv88e6xxx_atu_flush_move(struct dsa_switch *ds, static int _mv88e6xxx_atu_flush_move(struct mv88e6xxx_priv_state *ps,
struct mv88e6xxx_atu_entry *entry, struct mv88e6xxx_atu_entry *entry,
bool static_too) bool static_too)
{ {
int op; int op;
int err; int err;
err = _mv88e6xxx_atu_wait(ds); err = _mv88e6xxx_atu_wait(ps);
if (err) if (err)
return err; return err;
err = _mv88e6xxx_atu_data_write(ds, entry); err = _mv88e6xxx_atu_data_write(ps, entry);
if (err) if (err)
return err; return err;
...@@ -1027,21 +1013,22 @@ static int _mv88e6xxx_atu_flush_move(struct dsa_switch *ds, ...@@ -1027,21 +1013,22 @@ static int _mv88e6xxx_atu_flush_move(struct dsa_switch *ds,
GLOBAL_ATU_OP_FLUSH_MOVE_NON_STATIC; GLOBAL_ATU_OP_FLUSH_MOVE_NON_STATIC;
} }
return _mv88e6xxx_atu_cmd(ds, entry->fid, op); return _mv88e6xxx_atu_cmd(ps, entry->fid, op);
} }
static int _mv88e6xxx_atu_flush(struct dsa_switch *ds, u16 fid, bool static_too) static int _mv88e6xxx_atu_flush(struct mv88e6xxx_priv_state *ps,
u16 fid, bool static_too)
{ {
struct mv88e6xxx_atu_entry entry = { struct mv88e6xxx_atu_entry entry = {
.fid = fid, .fid = fid,
.state = 0, /* EntryState bits must be 0 */ .state = 0, /* EntryState bits must be 0 */
}; };
return _mv88e6xxx_atu_flush_move(ds, &entry, static_too); return _mv88e6xxx_atu_flush_move(ps, &entry, static_too);
} }
static int _mv88e6xxx_atu_move(struct dsa_switch *ds, u16 fid, int from_port, static int _mv88e6xxx_atu_move(struct mv88e6xxx_priv_state *ps, u16 fid,
int to_port, bool static_too) int from_port, int to_port, bool static_too)
{ {
struct mv88e6xxx_atu_entry entry = { struct mv88e6xxx_atu_entry entry = {
.trunk = false, .trunk = false,
...@@ -1055,14 +1042,14 @@ static int _mv88e6xxx_atu_move(struct dsa_switch *ds, u16 fid, int from_port, ...@@ -1055,14 +1042,14 @@ static int _mv88e6xxx_atu_move(struct dsa_switch *ds, u16 fid, int from_port,
entry.portv_trunkid = (to_port & 0x0f) << 4; entry.portv_trunkid = (to_port & 0x0f) << 4;
entry.portv_trunkid |= from_port & 0x0f; entry.portv_trunkid |= from_port & 0x0f;
return _mv88e6xxx_atu_flush_move(ds, &entry, static_too); return _mv88e6xxx_atu_flush_move(ps, &entry, static_too);
} }
static int _mv88e6xxx_atu_remove(struct dsa_switch *ds, u16 fid, int port, static int _mv88e6xxx_atu_remove(struct mv88e6xxx_priv_state *ps, u16 fid,
bool static_too) int port, bool static_too)
{ {
/* Destination port 0xF means remove the entries */ /* Destination port 0xF means remove the entries */
return _mv88e6xxx_atu_move(ds, fid, port, 0x0f, static_too); return _mv88e6xxx_atu_move(ps, fid, port, 0x0f, static_too);
} }
static const char * const mv88e6xxx_port_state_names[] = { static const char * const mv88e6xxx_port_state_names[] = {
...@@ -1072,12 +1059,14 @@ static const char * const mv88e6xxx_port_state_names[] = { ...@@ -1072,12 +1059,14 @@ static const char * const mv88e6xxx_port_state_names[] = {
[PORT_CONTROL_STATE_FORWARDING] = "Forwarding", [PORT_CONTROL_STATE_FORWARDING] = "Forwarding",
}; };
static int _mv88e6xxx_port_state(struct dsa_switch *ds, int port, u8 state) static int _mv88e6xxx_port_state(struct mv88e6xxx_priv_state *ps, int port,
u8 state)
{ {
struct dsa_switch *ds = ps->ds;
int reg, ret = 0; int reg, ret = 0;
u8 oldstate; u8 oldstate;
reg = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_CONTROL); reg = _mv88e6xxx_reg_read(ps, REG_PORT(port), PORT_CONTROL);
if (reg < 0) if (reg < 0)
return reg; return reg;
...@@ -1092,13 +1081,13 @@ static int _mv88e6xxx_port_state(struct dsa_switch *ds, int port, u8 state) ...@@ -1092,13 +1081,13 @@ static int _mv88e6xxx_port_state(struct dsa_switch *ds, int port, u8 state)
oldstate == PORT_CONTROL_STATE_FORWARDING) oldstate == PORT_CONTROL_STATE_FORWARDING)
&& (state == PORT_CONTROL_STATE_DISABLED || && (state == PORT_CONTROL_STATE_DISABLED ||
state == PORT_CONTROL_STATE_BLOCKING)) { state == PORT_CONTROL_STATE_BLOCKING)) {
ret = _mv88e6xxx_atu_remove(ds, 0, port, false); ret = _mv88e6xxx_atu_remove(ps, 0, port, false);
if (ret) if (ret)
return ret; return ret;
} }
reg = (reg & ~PORT_CONTROL_STATE_MASK) | state; reg = (reg & ~PORT_CONTROL_STATE_MASK) | state;
ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_CONTROL, ret = _mv88e6xxx_reg_write(ps, REG_PORT(port), PORT_CONTROL,
reg); reg);
if (ret) if (ret)
return ret; return ret;
...@@ -1111,11 +1100,12 @@ static int _mv88e6xxx_port_state(struct dsa_switch *ds, int port, u8 state) ...@@ -1111,11 +1100,12 @@ static int _mv88e6xxx_port_state(struct dsa_switch *ds, int port, u8 state)
return ret; return ret;
} }
static int _mv88e6xxx_port_based_vlan_map(struct dsa_switch *ds, int port) static int _mv88e6xxx_port_based_vlan_map(struct mv88e6xxx_priv_state *ps,
int port)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
struct net_device *bridge = ps->ports[port].bridge_dev; struct net_device *bridge = ps->ports[port].bridge_dev;
const u16 mask = (1 << ps->info->num_ports) - 1; const u16 mask = (1 << ps->info->num_ports) - 1;
struct dsa_switch *ds = ps->ds;
u16 output_ports = 0; u16 output_ports = 0;
int reg; int reg;
int i; int i;
...@@ -1138,14 +1128,14 @@ static int _mv88e6xxx_port_based_vlan_map(struct dsa_switch *ds, int port) ...@@ -1138,14 +1128,14 @@ static int _mv88e6xxx_port_based_vlan_map(struct dsa_switch *ds, int port)
/* prevent frames from going back out of the port they came in on */ /* prevent frames from going back out of the port they came in on */
output_ports &= ~BIT(port); output_ports &= ~BIT(port);
reg = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_BASE_VLAN); reg = _mv88e6xxx_reg_read(ps, REG_PORT(port), PORT_BASE_VLAN);
if (reg < 0) if (reg < 0)
return reg; return reg;
reg &= ~mask; reg &= ~mask;
reg |= output_ports & mask; reg |= output_ports & mask;
return _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_BASE_VLAN, reg); return _mv88e6xxx_reg_write(ps, REG_PORT(port), PORT_BASE_VLAN, reg);
} }
void mv88e6xxx_port_stp_state_set(struct dsa_switch *ds, int port, u8 state) void mv88e6xxx_port_stp_state_set(struct dsa_switch *ds, int port, u8 state)
...@@ -1178,13 +1168,14 @@ void mv88e6xxx_port_stp_state_set(struct dsa_switch *ds, int port, u8 state) ...@@ -1178,13 +1168,14 @@ void mv88e6xxx_port_stp_state_set(struct dsa_switch *ds, int port, u8 state)
schedule_work(&ps->bridge_work); schedule_work(&ps->bridge_work);
} }
static int _mv88e6xxx_port_pvid(struct dsa_switch *ds, int port, u16 *new, static int _mv88e6xxx_port_pvid(struct mv88e6xxx_priv_state *ps, int port,
u16 *old) u16 *new, u16 *old)
{ {
struct dsa_switch *ds = ps->ds;
u16 pvid; u16 pvid;
int ret; int ret;
ret = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_DEFAULT_VLAN); ret = _mv88e6xxx_reg_read(ps, REG_PORT(port), PORT_DEFAULT_VLAN);
if (ret < 0) if (ret < 0)
return ret; return ret;
...@@ -1194,7 +1185,7 @@ static int _mv88e6xxx_port_pvid(struct dsa_switch *ds, int port, u16 *new, ...@@ -1194,7 +1185,7 @@ static int _mv88e6xxx_port_pvid(struct dsa_switch *ds, int port, u16 *new,
ret &= ~PORT_DEFAULT_VLAN_MASK; ret &= ~PORT_DEFAULT_VLAN_MASK;
ret |= *new & PORT_DEFAULT_VLAN_MASK; ret |= *new & PORT_DEFAULT_VLAN_MASK;
ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), ret = _mv88e6xxx_reg_write(ps, REG_PORT(port),
PORT_DEFAULT_VLAN, ret); PORT_DEFAULT_VLAN, ret);
if (ret < 0) if (ret < 0)
return ret; return ret;
...@@ -1209,55 +1200,56 @@ static int _mv88e6xxx_port_pvid(struct dsa_switch *ds, int port, u16 *new, ...@@ -1209,55 +1200,56 @@ static int _mv88e6xxx_port_pvid(struct dsa_switch *ds, int port, u16 *new,
return 0; return 0;
} }
static int _mv88e6xxx_port_pvid_get(struct dsa_switch *ds, int port, u16 *pvid) static int _mv88e6xxx_port_pvid_get(struct mv88e6xxx_priv_state *ps,
int port, u16 *pvid)
{ {
return _mv88e6xxx_port_pvid(ds, port, NULL, pvid); return _mv88e6xxx_port_pvid(ps, port, NULL, pvid);
} }
static int _mv88e6xxx_port_pvid_set(struct dsa_switch *ds, int port, u16 pvid) static int _mv88e6xxx_port_pvid_set(struct mv88e6xxx_priv_state *ps,
int port, u16 pvid)
{ {
return _mv88e6xxx_port_pvid(ds, port, &pvid, NULL); return _mv88e6xxx_port_pvid(ps, port, &pvid, NULL);
} }
static int _mv88e6xxx_vtu_wait(struct dsa_switch *ds) static int _mv88e6xxx_vtu_wait(struct mv88e6xxx_priv_state *ps)
{ {
return _mv88e6xxx_wait(ds, REG_GLOBAL, GLOBAL_VTU_OP, return _mv88e6xxx_wait(ps, REG_GLOBAL, GLOBAL_VTU_OP,
GLOBAL_VTU_OP_BUSY); GLOBAL_VTU_OP_BUSY);
} }
static int _mv88e6xxx_vtu_cmd(struct dsa_switch *ds, u16 op) static int _mv88e6xxx_vtu_cmd(struct mv88e6xxx_priv_state *ps, u16 op)
{ {
int ret; int ret;
ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_VTU_OP, op); ret = _mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_VTU_OP, op);
if (ret < 0) if (ret < 0)
return ret; return ret;
return _mv88e6xxx_vtu_wait(ds); return _mv88e6xxx_vtu_wait(ps);
} }
static int _mv88e6xxx_vtu_stu_flush(struct dsa_switch *ds) static int _mv88e6xxx_vtu_stu_flush(struct mv88e6xxx_priv_state *ps)
{ {
int ret; int ret;
ret = _mv88e6xxx_vtu_wait(ds); ret = _mv88e6xxx_vtu_wait(ps);
if (ret < 0) if (ret < 0)
return ret; return ret;
return _mv88e6xxx_vtu_cmd(ds, GLOBAL_VTU_OP_FLUSH_ALL); return _mv88e6xxx_vtu_cmd(ps, GLOBAL_VTU_OP_FLUSH_ALL);
} }
static int _mv88e6xxx_vtu_stu_data_read(struct dsa_switch *ds, static int _mv88e6xxx_vtu_stu_data_read(struct mv88e6xxx_priv_state *ps,
struct mv88e6xxx_vtu_stu_entry *entry, struct mv88e6xxx_vtu_stu_entry *entry,
unsigned int nibble_offset) unsigned int nibble_offset)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
u16 regs[3]; u16 regs[3];
int i; int i;
int ret; int ret;
for (i = 0; i < 3; ++i) { for (i = 0; i < 3; ++i) {
ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, ret = _mv88e6xxx_reg_read(ps, REG_GLOBAL,
GLOBAL_VTU_DATA_0_3 + i); GLOBAL_VTU_DATA_0_3 + i);
if (ret < 0) if (ret < 0)
return ret; return ret;
...@@ -1275,11 +1267,10 @@ static int _mv88e6xxx_vtu_stu_data_read(struct dsa_switch *ds, ...@@ -1275,11 +1267,10 @@ static int _mv88e6xxx_vtu_stu_data_read(struct dsa_switch *ds,
return 0; return 0;
} }
static int _mv88e6xxx_vtu_stu_data_write(struct dsa_switch *ds, static int _mv88e6xxx_vtu_stu_data_write(struct mv88e6xxx_priv_state *ps,
struct mv88e6xxx_vtu_stu_entry *entry, struct mv88e6xxx_vtu_stu_entry *entry,
unsigned int nibble_offset) unsigned int nibble_offset)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
u16 regs[3] = { 0 }; u16 regs[3] = { 0 };
int i; int i;
int ret; int ret;
...@@ -1292,7 +1283,7 @@ static int _mv88e6xxx_vtu_stu_data_write(struct dsa_switch *ds, ...@@ -1292,7 +1283,7 @@ static int _mv88e6xxx_vtu_stu_data_write(struct dsa_switch *ds,
} }
for (i = 0; i < 3; ++i) { for (i = 0; i < 3; ++i) {
ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, ret = _mv88e6xxx_reg_write(ps, REG_GLOBAL,
GLOBAL_VTU_DATA_0_3 + i, regs[i]); GLOBAL_VTU_DATA_0_3 + i, regs[i]);
if (ret < 0) if (ret < 0)
return ret; return ret;
...@@ -1301,27 +1292,27 @@ static int _mv88e6xxx_vtu_stu_data_write(struct dsa_switch *ds, ...@@ -1301,27 +1292,27 @@ static int _mv88e6xxx_vtu_stu_data_write(struct dsa_switch *ds,
return 0; return 0;
} }
static int _mv88e6xxx_vtu_vid_write(struct dsa_switch *ds, u16 vid) static int _mv88e6xxx_vtu_vid_write(struct mv88e6xxx_priv_state *ps, u16 vid)
{ {
return _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_VTU_VID, return _mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_VTU_VID,
vid & GLOBAL_VTU_VID_MASK); vid & GLOBAL_VTU_VID_MASK);
} }
static int _mv88e6xxx_vtu_getnext(struct dsa_switch *ds, static int _mv88e6xxx_vtu_getnext(struct mv88e6xxx_priv_state *ps,
struct mv88e6xxx_vtu_stu_entry *entry) struct mv88e6xxx_vtu_stu_entry *entry)
{ {
struct mv88e6xxx_vtu_stu_entry next = { 0 }; struct mv88e6xxx_vtu_stu_entry next = { 0 };
int ret; int ret;
ret = _mv88e6xxx_vtu_wait(ds); ret = _mv88e6xxx_vtu_wait(ps);
if (ret < 0) if (ret < 0)
return ret; return ret;
ret = _mv88e6xxx_vtu_cmd(ds, GLOBAL_VTU_OP_VTU_GET_NEXT); ret = _mv88e6xxx_vtu_cmd(ps, GLOBAL_VTU_OP_VTU_GET_NEXT);
if (ret < 0) if (ret < 0)
return ret; return ret;
ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_VTU_VID); ret = _mv88e6xxx_reg_read(ps, REG_GLOBAL, GLOBAL_VTU_VID);
if (ret < 0) if (ret < 0)
return ret; return ret;
...@@ -1329,22 +1320,22 @@ static int _mv88e6xxx_vtu_getnext(struct dsa_switch *ds, ...@@ -1329,22 +1320,22 @@ static int _mv88e6xxx_vtu_getnext(struct dsa_switch *ds,
next.valid = !!(ret & GLOBAL_VTU_VID_VALID); next.valid = !!(ret & GLOBAL_VTU_VID_VALID);
if (next.valid) { if (next.valid) {
ret = _mv88e6xxx_vtu_stu_data_read(ds, &next, 0); ret = _mv88e6xxx_vtu_stu_data_read(ps, &next, 0);
if (ret < 0) if (ret < 0)
return ret; return ret;
if (mv88e6xxx_has_fid_reg(ds)) { if (mv88e6xxx_has_fid_reg(ps)) {
ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, ret = _mv88e6xxx_reg_read(ps, REG_GLOBAL,
GLOBAL_VTU_FID); GLOBAL_VTU_FID);
if (ret < 0) if (ret < 0)
return ret; return ret;
next.fid = ret & GLOBAL_VTU_FID_MASK; next.fid = ret & GLOBAL_VTU_FID_MASK;
} else if (mv88e6xxx_num_databases(ds) == 256) { } else if (mv88e6xxx_num_databases(ps) == 256) {
/* VTU DBNum[7:4] are located in VTU Operation 11:8, and /* VTU DBNum[7:4] are located in VTU Operation 11:8, and
* VTU DBNum[3:0] are located in VTU Operation 3:0 * VTU DBNum[3:0] are located in VTU Operation 3:0
*/ */
ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, ret = _mv88e6xxx_reg_read(ps, REG_GLOBAL,
GLOBAL_VTU_OP); GLOBAL_VTU_OP);
if (ret < 0) if (ret < 0)
return ret; return ret;
...@@ -1353,8 +1344,8 @@ static int _mv88e6xxx_vtu_getnext(struct dsa_switch *ds, ...@@ -1353,8 +1344,8 @@ static int _mv88e6xxx_vtu_getnext(struct dsa_switch *ds,
next.fid |= ret & 0xf; next.fid |= ret & 0xf;
} }
if (mv88e6xxx_has_stu(ds)) { if (mv88e6xxx_has_stu(ps)) {
ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, ret = _mv88e6xxx_reg_read(ps, REG_GLOBAL,
GLOBAL_VTU_SID); GLOBAL_VTU_SID);
if (ret < 0) if (ret < 0)
return ret; return ret;
...@@ -1378,16 +1369,16 @@ int mv88e6xxx_port_vlan_dump(struct dsa_switch *ds, int port, ...@@ -1378,16 +1369,16 @@ int mv88e6xxx_port_vlan_dump(struct dsa_switch *ds, int port,
mutex_lock(&ps->smi_mutex); mutex_lock(&ps->smi_mutex);
err = _mv88e6xxx_port_pvid_get(ds, port, &pvid); err = _mv88e6xxx_port_pvid_get(ps, port, &pvid);
if (err) if (err)
goto unlock; goto unlock;
err = _mv88e6xxx_vtu_vid_write(ds, GLOBAL_VTU_VID_MASK); err = _mv88e6xxx_vtu_vid_write(ps, GLOBAL_VTU_VID_MASK);
if (err) if (err)
goto unlock; goto unlock;
do { do {
err = _mv88e6xxx_vtu_getnext(ds, &next); err = _mv88e6xxx_vtu_getnext(ps, &next);
if (err) if (err)
break; break;
...@@ -1418,14 +1409,14 @@ int mv88e6xxx_port_vlan_dump(struct dsa_switch *ds, int port, ...@@ -1418,14 +1409,14 @@ int mv88e6xxx_port_vlan_dump(struct dsa_switch *ds, int port,
return err; return err;
} }
static int _mv88e6xxx_vtu_loadpurge(struct dsa_switch *ds, static int _mv88e6xxx_vtu_loadpurge(struct mv88e6xxx_priv_state *ps,
struct mv88e6xxx_vtu_stu_entry *entry) struct mv88e6xxx_vtu_stu_entry *entry)
{ {
u16 op = GLOBAL_VTU_OP_VTU_LOAD_PURGE; u16 op = GLOBAL_VTU_OP_VTU_LOAD_PURGE;
u16 reg = 0; u16 reg = 0;
int ret; int ret;
ret = _mv88e6xxx_vtu_wait(ds); ret = _mv88e6xxx_vtu_wait(ps);
if (ret < 0) if (ret < 0)
return ret; return ret;
...@@ -1433,23 +1424,23 @@ static int _mv88e6xxx_vtu_loadpurge(struct dsa_switch *ds, ...@@ -1433,23 +1424,23 @@ static int _mv88e6xxx_vtu_loadpurge(struct dsa_switch *ds,
goto loadpurge; goto loadpurge;
/* Write port member tags */ /* Write port member tags */
ret = _mv88e6xxx_vtu_stu_data_write(ds, entry, 0); ret = _mv88e6xxx_vtu_stu_data_write(ps, entry, 0);
if (ret < 0) if (ret < 0)
return ret; return ret;
if (mv88e6xxx_has_stu(ds)) { if (mv88e6xxx_has_stu(ps)) {
reg = entry->sid & GLOBAL_VTU_SID_MASK; reg = entry->sid & GLOBAL_VTU_SID_MASK;
ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_VTU_SID, reg); ret = _mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_VTU_SID, reg);
if (ret < 0) if (ret < 0)
return ret; return ret;
} }
if (mv88e6xxx_has_fid_reg(ds)) { if (mv88e6xxx_has_fid_reg(ps)) {
reg = entry->fid & GLOBAL_VTU_FID_MASK; reg = entry->fid & GLOBAL_VTU_FID_MASK;
ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_VTU_FID, reg); ret = _mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_VTU_FID, reg);
if (ret < 0) if (ret < 0)
return ret; return ret;
} else if (mv88e6xxx_num_databases(ds) == 256) { } else if (mv88e6xxx_num_databases(ps) == 256) {
/* VTU DBNum[7:4] are located in VTU Operation 11:8, and /* VTU DBNum[7:4] are located in VTU Operation 11:8, and
* VTU DBNum[3:0] are located in VTU Operation 3:0 * VTU DBNum[3:0] are located in VTU Operation 3:0
*/ */
...@@ -1460,46 +1451,46 @@ static int _mv88e6xxx_vtu_loadpurge(struct dsa_switch *ds, ...@@ -1460,46 +1451,46 @@ static int _mv88e6xxx_vtu_loadpurge(struct dsa_switch *ds,
reg = GLOBAL_VTU_VID_VALID; reg = GLOBAL_VTU_VID_VALID;
loadpurge: loadpurge:
reg |= entry->vid & GLOBAL_VTU_VID_MASK; reg |= entry->vid & GLOBAL_VTU_VID_MASK;
ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_VTU_VID, reg); ret = _mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_VTU_VID, reg);
if (ret < 0) if (ret < 0)
return ret; return ret;
return _mv88e6xxx_vtu_cmd(ds, op); return _mv88e6xxx_vtu_cmd(ps, op);
} }
static int _mv88e6xxx_stu_getnext(struct dsa_switch *ds, u8 sid, static int _mv88e6xxx_stu_getnext(struct mv88e6xxx_priv_state *ps, u8 sid,
struct mv88e6xxx_vtu_stu_entry *entry) struct mv88e6xxx_vtu_stu_entry *entry)
{ {
struct mv88e6xxx_vtu_stu_entry next = { 0 }; struct mv88e6xxx_vtu_stu_entry next = { 0 };
int ret; int ret;
ret = _mv88e6xxx_vtu_wait(ds); ret = _mv88e6xxx_vtu_wait(ps);
if (ret < 0) if (ret < 0)
return ret; return ret;
ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_VTU_SID, ret = _mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_VTU_SID,
sid & GLOBAL_VTU_SID_MASK); sid & GLOBAL_VTU_SID_MASK);
if (ret < 0) if (ret < 0)
return ret; return ret;
ret = _mv88e6xxx_vtu_cmd(ds, GLOBAL_VTU_OP_STU_GET_NEXT); ret = _mv88e6xxx_vtu_cmd(ps, GLOBAL_VTU_OP_STU_GET_NEXT);
if (ret < 0) if (ret < 0)
return ret; return ret;
ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_VTU_SID); ret = _mv88e6xxx_reg_read(ps, REG_GLOBAL, GLOBAL_VTU_SID);
if (ret < 0) if (ret < 0)
return ret; return ret;
next.sid = ret & GLOBAL_VTU_SID_MASK; next.sid = ret & GLOBAL_VTU_SID_MASK;
ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_VTU_VID); ret = _mv88e6xxx_reg_read(ps, REG_GLOBAL, GLOBAL_VTU_VID);
if (ret < 0) if (ret < 0)
return ret; return ret;
next.valid = !!(ret & GLOBAL_VTU_VID_VALID); next.valid = !!(ret & GLOBAL_VTU_VID_VALID);
if (next.valid) { if (next.valid) {
ret = _mv88e6xxx_vtu_stu_data_read(ds, &next, 2); ret = _mv88e6xxx_vtu_stu_data_read(ps, &next, 2);
if (ret < 0) if (ret < 0)
return ret; return ret;
} }
...@@ -1508,13 +1499,13 @@ static int _mv88e6xxx_stu_getnext(struct dsa_switch *ds, u8 sid, ...@@ -1508,13 +1499,13 @@ static int _mv88e6xxx_stu_getnext(struct dsa_switch *ds, u8 sid,
return 0; return 0;
} }
static int _mv88e6xxx_stu_loadpurge(struct dsa_switch *ds, static int _mv88e6xxx_stu_loadpurge(struct mv88e6xxx_priv_state *ps,
struct mv88e6xxx_vtu_stu_entry *entry) struct mv88e6xxx_vtu_stu_entry *entry)
{ {
u16 reg = 0; u16 reg = 0;
int ret; int ret;
ret = _mv88e6xxx_vtu_wait(ds); ret = _mv88e6xxx_vtu_wait(ps);
if (ret < 0) if (ret < 0)
return ret; return ret;
...@@ -1522,40 +1513,41 @@ static int _mv88e6xxx_stu_loadpurge(struct dsa_switch *ds, ...@@ -1522,40 +1513,41 @@ static int _mv88e6xxx_stu_loadpurge(struct dsa_switch *ds,
goto loadpurge; goto loadpurge;
/* Write port states */ /* Write port states */
ret = _mv88e6xxx_vtu_stu_data_write(ds, entry, 2); ret = _mv88e6xxx_vtu_stu_data_write(ps, entry, 2);
if (ret < 0) if (ret < 0)
return ret; return ret;
reg = GLOBAL_VTU_VID_VALID; reg = GLOBAL_VTU_VID_VALID;
loadpurge: loadpurge:
ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_VTU_VID, reg); ret = _mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_VTU_VID, reg);
if (ret < 0) if (ret < 0)
return ret; return ret;
reg = entry->sid & GLOBAL_VTU_SID_MASK; reg = entry->sid & GLOBAL_VTU_SID_MASK;
ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_VTU_SID, reg); ret = _mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_VTU_SID, reg);
if (ret < 0) if (ret < 0)
return ret; return ret;
return _mv88e6xxx_vtu_cmd(ds, GLOBAL_VTU_OP_STU_LOAD_PURGE); return _mv88e6xxx_vtu_cmd(ps, GLOBAL_VTU_OP_STU_LOAD_PURGE);
} }
static int _mv88e6xxx_port_fid(struct dsa_switch *ds, int port, u16 *new, static int _mv88e6xxx_port_fid(struct mv88e6xxx_priv_state *ps, int port,
u16 *old) u16 *new, u16 *old)
{ {
struct dsa_switch *ds = ps->ds;
u16 upper_mask; u16 upper_mask;
u16 fid; u16 fid;
int ret; int ret;
if (mv88e6xxx_num_databases(ds) == 4096) if (mv88e6xxx_num_databases(ps) == 4096)
upper_mask = 0xff; upper_mask = 0xff;
else if (mv88e6xxx_num_databases(ds) == 256) else if (mv88e6xxx_num_databases(ps) == 256)
upper_mask = 0xf; upper_mask = 0xf;
else else
return -EOPNOTSUPP; return -EOPNOTSUPP;
/* Port's default FID bits 3:0 are located in reg 0x06, offset 12 */ /* Port's default FID bits 3:0 are located in reg 0x06, offset 12 */
ret = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_BASE_VLAN); ret = _mv88e6xxx_reg_read(ps, REG_PORT(port), PORT_BASE_VLAN);
if (ret < 0) if (ret < 0)
return ret; return ret;
...@@ -1565,14 +1557,14 @@ static int _mv88e6xxx_port_fid(struct dsa_switch *ds, int port, u16 *new, ...@@ -1565,14 +1557,14 @@ static int _mv88e6xxx_port_fid(struct dsa_switch *ds, int port, u16 *new,
ret &= ~PORT_BASE_VLAN_FID_3_0_MASK; ret &= ~PORT_BASE_VLAN_FID_3_0_MASK;
ret |= (*new << 12) & PORT_BASE_VLAN_FID_3_0_MASK; ret |= (*new << 12) & PORT_BASE_VLAN_FID_3_0_MASK;
ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_BASE_VLAN, ret = _mv88e6xxx_reg_write(ps, REG_PORT(port), PORT_BASE_VLAN,
ret); ret);
if (ret < 0) if (ret < 0)
return ret; return ret;
} }
/* Port's default FID bits 11:4 are located in reg 0x05, offset 0 */ /* Port's default FID bits 11:4 are located in reg 0x05, offset 0 */
ret = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_CONTROL_1); ret = _mv88e6xxx_reg_read(ps, REG_PORT(port), PORT_CONTROL_1);
if (ret < 0) if (ret < 0)
return ret; return ret;
...@@ -1582,7 +1574,7 @@ static int _mv88e6xxx_port_fid(struct dsa_switch *ds, int port, u16 *new, ...@@ -1582,7 +1574,7 @@ static int _mv88e6xxx_port_fid(struct dsa_switch *ds, int port, u16 *new,
ret &= ~upper_mask; ret &= ~upper_mask;
ret |= (*new >> 4) & upper_mask; ret |= (*new >> 4) & upper_mask;
ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_CONTROL_1, ret = _mv88e6xxx_reg_write(ps, REG_PORT(port), PORT_CONTROL_1,
ret); ret);
if (ret < 0) if (ret < 0)
return ret; return ret;
...@@ -1596,19 +1588,20 @@ static int _mv88e6xxx_port_fid(struct dsa_switch *ds, int port, u16 *new, ...@@ -1596,19 +1588,20 @@ static int _mv88e6xxx_port_fid(struct dsa_switch *ds, int port, u16 *new,
return 0; return 0;
} }
static int _mv88e6xxx_port_fid_get(struct dsa_switch *ds, int port, u16 *fid) static int _mv88e6xxx_port_fid_get(struct mv88e6xxx_priv_state *ps,
int port, u16 *fid)
{ {
return _mv88e6xxx_port_fid(ds, port, NULL, fid); return _mv88e6xxx_port_fid(ps, port, NULL, fid);
} }
static int _mv88e6xxx_port_fid_set(struct dsa_switch *ds, int port, u16 fid) static int _mv88e6xxx_port_fid_set(struct mv88e6xxx_priv_state *ps,
int port, u16 fid)
{ {
return _mv88e6xxx_port_fid(ds, port, &fid, NULL); return _mv88e6xxx_port_fid(ps, port, &fid, NULL);
} }
static int _mv88e6xxx_fid_new(struct dsa_switch *ds, u16 *fid) static int _mv88e6xxx_fid_new(struct mv88e6xxx_priv_state *ps, u16 *fid)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
DECLARE_BITMAP(fid_bitmap, MV88E6XXX_N_FID); DECLARE_BITMAP(fid_bitmap, MV88E6XXX_N_FID);
struct mv88e6xxx_vtu_stu_entry vlan; struct mv88e6xxx_vtu_stu_entry vlan;
int i, err; int i, err;
...@@ -1617,7 +1610,7 @@ static int _mv88e6xxx_fid_new(struct dsa_switch *ds, u16 *fid) ...@@ -1617,7 +1610,7 @@ static int _mv88e6xxx_fid_new(struct dsa_switch *ds, u16 *fid)
/* Set every FID bit used by the (un)bridged ports */ /* Set every FID bit used by the (un)bridged ports */
for (i = 0; i < ps->info->num_ports; ++i) { for (i = 0; i < ps->info->num_ports; ++i) {
err = _mv88e6xxx_port_fid_get(ds, i, fid); err = _mv88e6xxx_port_fid_get(ps, i, fid);
if (err) if (err)
return err; return err;
...@@ -1625,12 +1618,12 @@ static int _mv88e6xxx_fid_new(struct dsa_switch *ds, u16 *fid) ...@@ -1625,12 +1618,12 @@ static int _mv88e6xxx_fid_new(struct dsa_switch *ds, u16 *fid)
} }
/* Set every FID bit used by the VLAN entries */ /* Set every FID bit used by the VLAN entries */
err = _mv88e6xxx_vtu_vid_write(ds, GLOBAL_VTU_VID_MASK); err = _mv88e6xxx_vtu_vid_write(ps, GLOBAL_VTU_VID_MASK);
if (err) if (err)
return err; return err;
do { do {
err = _mv88e6xxx_vtu_getnext(ds, &vlan); err = _mv88e6xxx_vtu_getnext(ps, &vlan);
if (err) if (err)
return err; return err;
...@@ -1644,24 +1637,24 @@ static int _mv88e6xxx_fid_new(struct dsa_switch *ds, u16 *fid) ...@@ -1644,24 +1637,24 @@ static int _mv88e6xxx_fid_new(struct dsa_switch *ds, u16 *fid)
* databases are not needed. Return the next positive available. * databases are not needed. Return the next positive available.
*/ */
*fid = find_next_zero_bit(fid_bitmap, MV88E6XXX_N_FID, 1); *fid = find_next_zero_bit(fid_bitmap, MV88E6XXX_N_FID, 1);
if (unlikely(*fid >= mv88e6xxx_num_databases(ds))) if (unlikely(*fid >= mv88e6xxx_num_databases(ps)))
return -ENOSPC; return -ENOSPC;
/* Clear the database */ /* Clear the database */
return _mv88e6xxx_atu_flush(ds, *fid, true); return _mv88e6xxx_atu_flush(ps, *fid, true);
} }
static int _mv88e6xxx_vtu_new(struct dsa_switch *ds, u16 vid, static int _mv88e6xxx_vtu_new(struct mv88e6xxx_priv_state *ps, u16 vid,
struct mv88e6xxx_vtu_stu_entry *entry) struct mv88e6xxx_vtu_stu_entry *entry)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); struct dsa_switch *ds = ps->ds;
struct mv88e6xxx_vtu_stu_entry vlan = { struct mv88e6xxx_vtu_stu_entry vlan = {
.valid = true, .valid = true,
.vid = vid, .vid = vid,
}; };
int i, err; int i, err;
err = _mv88e6xxx_fid_new(ds, &vlan.fid); err = _mv88e6xxx_fid_new(ps, &vlan.fid);
if (err) if (err)
return err; return err;
...@@ -1671,8 +1664,8 @@ static int _mv88e6xxx_vtu_new(struct dsa_switch *ds, u16 vid, ...@@ -1671,8 +1664,8 @@ static int _mv88e6xxx_vtu_new(struct dsa_switch *ds, u16 vid,
? GLOBAL_VTU_DATA_MEMBER_TAG_UNMODIFIED ? GLOBAL_VTU_DATA_MEMBER_TAG_UNMODIFIED
: GLOBAL_VTU_DATA_MEMBER_TAG_NON_MEMBER; : GLOBAL_VTU_DATA_MEMBER_TAG_NON_MEMBER;
if (mv88e6xxx_6097_family(ds) || mv88e6xxx_6165_family(ds) || if (mv88e6xxx_6097_family(ps) || mv88e6xxx_6165_family(ps) ||
mv88e6xxx_6351_family(ds) || mv88e6xxx_6352_family(ds)) { mv88e6xxx_6351_family(ps) || mv88e6xxx_6352_family(ps)) {
struct mv88e6xxx_vtu_stu_entry vstp; struct mv88e6xxx_vtu_stu_entry vstp;
/* Adding a VTU entry requires a valid STU entry. As VSTP is not /* Adding a VTU entry requires a valid STU entry. As VSTP is not
...@@ -1680,7 +1673,7 @@ static int _mv88e6xxx_vtu_new(struct dsa_switch *ds, u16 vid, ...@@ -1680,7 +1673,7 @@ static int _mv88e6xxx_vtu_new(struct dsa_switch *ds, u16 vid,
* entries. Thus, validate the SID 0. * entries. Thus, validate the SID 0.
*/ */
vlan.sid = 0; vlan.sid = 0;
err = _mv88e6xxx_stu_getnext(ds, GLOBAL_VTU_SID_MASK, &vstp); err = _mv88e6xxx_stu_getnext(ps, GLOBAL_VTU_SID_MASK, &vstp);
if (err) if (err)
return err; return err;
...@@ -1689,7 +1682,7 @@ static int _mv88e6xxx_vtu_new(struct dsa_switch *ds, u16 vid, ...@@ -1689,7 +1682,7 @@ static int _mv88e6xxx_vtu_new(struct dsa_switch *ds, u16 vid,
vstp.valid = true; vstp.valid = true;
vstp.sid = vlan.sid; vstp.sid = vlan.sid;
err = _mv88e6xxx_stu_loadpurge(ds, &vstp); err = _mv88e6xxx_stu_loadpurge(ps, &vstp);
if (err) if (err)
return err; return err;
} }
...@@ -1699,7 +1692,7 @@ static int _mv88e6xxx_vtu_new(struct dsa_switch *ds, u16 vid, ...@@ -1699,7 +1692,7 @@ static int _mv88e6xxx_vtu_new(struct dsa_switch *ds, u16 vid,
return 0; return 0;
} }
static int _mv88e6xxx_vtu_get(struct dsa_switch *ds, u16 vid, static int _mv88e6xxx_vtu_get(struct mv88e6xxx_priv_state *ps, u16 vid,
struct mv88e6xxx_vtu_stu_entry *entry, bool creat) struct mv88e6xxx_vtu_stu_entry *entry, bool creat)
{ {
int err; int err;
...@@ -1707,11 +1700,11 @@ static int _mv88e6xxx_vtu_get(struct dsa_switch *ds, u16 vid, ...@@ -1707,11 +1700,11 @@ static int _mv88e6xxx_vtu_get(struct dsa_switch *ds, u16 vid,
if (!vid) if (!vid)
return -EINVAL; return -EINVAL;
err = _mv88e6xxx_vtu_vid_write(ds, vid - 1); err = _mv88e6xxx_vtu_vid_write(ps, vid - 1);
if (err) if (err)
return err; return err;
err = _mv88e6xxx_vtu_getnext(ds, entry); err = _mv88e6xxx_vtu_getnext(ps, entry);
if (err) if (err)
return err; return err;
...@@ -1722,7 +1715,7 @@ static int _mv88e6xxx_vtu_get(struct dsa_switch *ds, u16 vid, ...@@ -1722,7 +1715,7 @@ static int _mv88e6xxx_vtu_get(struct dsa_switch *ds, u16 vid,
* -EOPNOTSUPP to inform bridge about an eventual software VLAN. * -EOPNOTSUPP to inform bridge about an eventual software VLAN.
*/ */
err = _mv88e6xxx_vtu_new(ds, vid, entry); err = _mv88e6xxx_vtu_new(ps, vid, entry);
} }
return err; return err;
...@@ -1740,12 +1733,12 @@ static int mv88e6xxx_port_check_hw_vlan(struct dsa_switch *ds, int port, ...@@ -1740,12 +1733,12 @@ static int mv88e6xxx_port_check_hw_vlan(struct dsa_switch *ds, int port,
mutex_lock(&ps->smi_mutex); mutex_lock(&ps->smi_mutex);
err = _mv88e6xxx_vtu_vid_write(ds, vid_begin - 1); err = _mv88e6xxx_vtu_vid_write(ps, vid_begin - 1);
if (err) if (err)
goto unlock; goto unlock;
do { do {
err = _mv88e6xxx_vtu_getnext(ds, &vlan); err = _mv88e6xxx_vtu_getnext(ps, &vlan);
if (err) if (err)
goto unlock; goto unlock;
...@@ -1799,7 +1792,7 @@ int mv88e6xxx_port_vlan_filtering(struct dsa_switch *ds, int port, ...@@ -1799,7 +1792,7 @@ int mv88e6xxx_port_vlan_filtering(struct dsa_switch *ds, int port,
mutex_lock(&ps->smi_mutex); mutex_lock(&ps->smi_mutex);
ret = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_CONTROL_2); ret = _mv88e6xxx_reg_read(ps, REG_PORT(port), PORT_CONTROL_2);
if (ret < 0) if (ret < 0)
goto unlock; goto unlock;
...@@ -1809,7 +1802,7 @@ int mv88e6xxx_port_vlan_filtering(struct dsa_switch *ds, int port, ...@@ -1809,7 +1802,7 @@ int mv88e6xxx_port_vlan_filtering(struct dsa_switch *ds, int port,
ret &= ~PORT_CONTROL_2_8021Q_MASK; ret &= ~PORT_CONTROL_2_8021Q_MASK;
ret |= new & PORT_CONTROL_2_8021Q_MASK; ret |= new & PORT_CONTROL_2_8021Q_MASK;
ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_CONTROL_2, ret = _mv88e6xxx_reg_write(ps, REG_PORT(port), PORT_CONTROL_2,
ret); ret);
if (ret < 0) if (ret < 0)
goto unlock; goto unlock;
...@@ -1846,13 +1839,13 @@ int mv88e6xxx_port_vlan_prepare(struct dsa_switch *ds, int port, ...@@ -1846,13 +1839,13 @@ int mv88e6xxx_port_vlan_prepare(struct dsa_switch *ds, int port,
return 0; return 0;
} }
static int _mv88e6xxx_port_vlan_add(struct dsa_switch *ds, int port, u16 vid, static int _mv88e6xxx_port_vlan_add(struct mv88e6xxx_priv_state *ps, int port,
bool untagged) u16 vid, bool untagged)
{ {
struct mv88e6xxx_vtu_stu_entry vlan; struct mv88e6xxx_vtu_stu_entry vlan;
int err; int err;
err = _mv88e6xxx_vtu_get(ds, vid, &vlan, true); err = _mv88e6xxx_vtu_get(ps, vid, &vlan, true);
if (err) if (err)
return err; return err;
...@@ -1860,7 +1853,7 @@ static int _mv88e6xxx_port_vlan_add(struct dsa_switch *ds, int port, u16 vid, ...@@ -1860,7 +1853,7 @@ static int _mv88e6xxx_port_vlan_add(struct dsa_switch *ds, int port, u16 vid,
GLOBAL_VTU_DATA_MEMBER_TAG_UNTAGGED : GLOBAL_VTU_DATA_MEMBER_TAG_UNTAGGED :
GLOBAL_VTU_DATA_MEMBER_TAG_TAGGED; GLOBAL_VTU_DATA_MEMBER_TAG_TAGGED;
return _mv88e6xxx_vtu_loadpurge(ds, &vlan); return _mv88e6xxx_vtu_loadpurge(ps, &vlan);
} }
void mv88e6xxx_port_vlan_add(struct dsa_switch *ds, int port, void mv88e6xxx_port_vlan_add(struct dsa_switch *ds, int port,
...@@ -1875,24 +1868,25 @@ void mv88e6xxx_port_vlan_add(struct dsa_switch *ds, int port, ...@@ -1875,24 +1868,25 @@ void mv88e6xxx_port_vlan_add(struct dsa_switch *ds, int port,
mutex_lock(&ps->smi_mutex); mutex_lock(&ps->smi_mutex);
for (vid = vlan->vid_begin; vid <= vlan->vid_end; ++vid) for (vid = vlan->vid_begin; vid <= vlan->vid_end; ++vid)
if (_mv88e6xxx_port_vlan_add(ds, port, vid, untagged)) if (_mv88e6xxx_port_vlan_add(ps, port, vid, untagged))
netdev_err(ds->ports[port], "failed to add VLAN %d%c\n", netdev_err(ds->ports[port], "failed to add VLAN %d%c\n",
vid, untagged ? 'u' : 't'); vid, untagged ? 'u' : 't');
if (pvid && _mv88e6xxx_port_pvid_set(ds, port, vlan->vid_end)) if (pvid && _mv88e6xxx_port_pvid_set(ps, port, vlan->vid_end))
netdev_err(ds->ports[port], "failed to set PVID %d\n", netdev_err(ds->ports[port], "failed to set PVID %d\n",
vlan->vid_end); vlan->vid_end);
mutex_unlock(&ps->smi_mutex); mutex_unlock(&ps->smi_mutex);
} }
static int _mv88e6xxx_port_vlan_del(struct dsa_switch *ds, int port, u16 vid) static int _mv88e6xxx_port_vlan_del(struct mv88e6xxx_priv_state *ps,
int port, u16 vid)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); struct dsa_switch *ds = ps->ds;
struct mv88e6xxx_vtu_stu_entry vlan; struct mv88e6xxx_vtu_stu_entry vlan;
int i, err; int i, err;
err = _mv88e6xxx_vtu_get(ds, vid, &vlan, false); err = _mv88e6xxx_vtu_get(ps, vid, &vlan, false);
if (err) if (err)
return err; return err;
...@@ -1914,11 +1908,11 @@ static int _mv88e6xxx_port_vlan_del(struct dsa_switch *ds, int port, u16 vid) ...@@ -1914,11 +1908,11 @@ static int _mv88e6xxx_port_vlan_del(struct dsa_switch *ds, int port, u16 vid)
} }
} }
err = _mv88e6xxx_vtu_loadpurge(ds, &vlan); err = _mv88e6xxx_vtu_loadpurge(ps, &vlan);
if (err) if (err)
return err; return err;
return _mv88e6xxx_atu_remove(ds, vlan.fid, port, false); return _mv88e6xxx_atu_remove(ps, vlan.fid, port, false);
} }
int mv88e6xxx_port_vlan_del(struct dsa_switch *ds, int port, int mv88e6xxx_port_vlan_del(struct dsa_switch *ds, int port,
...@@ -1930,17 +1924,17 @@ int mv88e6xxx_port_vlan_del(struct dsa_switch *ds, int port, ...@@ -1930,17 +1924,17 @@ int mv88e6xxx_port_vlan_del(struct dsa_switch *ds, int port,
mutex_lock(&ps->smi_mutex); mutex_lock(&ps->smi_mutex);
err = _mv88e6xxx_port_pvid_get(ds, port, &pvid); err = _mv88e6xxx_port_pvid_get(ps, port, &pvid);
if (err) if (err)
goto unlock; goto unlock;
for (vid = vlan->vid_begin; vid <= vlan->vid_end; ++vid) { for (vid = vlan->vid_begin; vid <= vlan->vid_end; ++vid) {
err = _mv88e6xxx_port_vlan_del(ds, port, vid); err = _mv88e6xxx_port_vlan_del(ps, port, vid);
if (err) if (err)
goto unlock; goto unlock;
if (vid == pvid) { if (vid == pvid) {
err = _mv88e6xxx_port_pvid_set(ds, port, 0); err = _mv88e6xxx_port_pvid_set(ps, port, 0);
if (err) if (err)
goto unlock; goto unlock;
} }
...@@ -1952,14 +1946,14 @@ int mv88e6xxx_port_vlan_del(struct dsa_switch *ds, int port, ...@@ -1952,14 +1946,14 @@ int mv88e6xxx_port_vlan_del(struct dsa_switch *ds, int port,
return err; return err;
} }
static int _mv88e6xxx_atu_mac_write(struct dsa_switch *ds, static int _mv88e6xxx_atu_mac_write(struct mv88e6xxx_priv_state *ps,
const unsigned char *addr) const unsigned char *addr)
{ {
int i, ret; int i, ret;
for (i = 0; i < 3; i++) { for (i = 0; i < 3; i++) {
ret = _mv88e6xxx_reg_write( ret = _mv88e6xxx_reg_write(
ds, REG_GLOBAL, GLOBAL_ATU_MAC_01 + i, ps, REG_GLOBAL, GLOBAL_ATU_MAC_01 + i,
(addr[i * 2] << 8) | addr[i * 2 + 1]); (addr[i * 2] << 8) | addr[i * 2 + 1]);
if (ret < 0) if (ret < 0)
return ret; return ret;
...@@ -1968,12 +1962,13 @@ static int _mv88e6xxx_atu_mac_write(struct dsa_switch *ds, ...@@ -1968,12 +1962,13 @@ static int _mv88e6xxx_atu_mac_write(struct dsa_switch *ds,
return 0; return 0;
} }
static int _mv88e6xxx_atu_mac_read(struct dsa_switch *ds, unsigned char *addr) static int _mv88e6xxx_atu_mac_read(struct mv88e6xxx_priv_state *ps,
unsigned char *addr)
{ {
int i, ret; int i, ret;
for (i = 0; i < 3; i++) { for (i = 0; i < 3; i++) {
ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, ret = _mv88e6xxx_reg_read(ps, REG_GLOBAL,
GLOBAL_ATU_MAC_01 + i); GLOBAL_ATU_MAC_01 + i);
if (ret < 0) if (ret < 0)
return ret; return ret;
...@@ -1984,27 +1979,27 @@ static int _mv88e6xxx_atu_mac_read(struct dsa_switch *ds, unsigned char *addr) ...@@ -1984,27 +1979,27 @@ static int _mv88e6xxx_atu_mac_read(struct dsa_switch *ds, unsigned char *addr)
return 0; return 0;
} }
static int _mv88e6xxx_atu_load(struct dsa_switch *ds, static int _mv88e6xxx_atu_load(struct mv88e6xxx_priv_state *ps,
struct mv88e6xxx_atu_entry *entry) struct mv88e6xxx_atu_entry *entry)
{ {
int ret; int ret;
ret = _mv88e6xxx_atu_wait(ds); ret = _mv88e6xxx_atu_wait(ps);
if (ret < 0) if (ret < 0)
return ret; return ret;
ret = _mv88e6xxx_atu_mac_write(ds, entry->mac); ret = _mv88e6xxx_atu_mac_write(ps, entry->mac);
if (ret < 0) if (ret < 0)
return ret; return ret;
ret = _mv88e6xxx_atu_data_write(ds, entry); ret = _mv88e6xxx_atu_data_write(ps, entry);
if (ret < 0) if (ret < 0)
return ret; return ret;
return _mv88e6xxx_atu_cmd(ds, entry->fid, GLOBAL_ATU_OP_LOAD_DB); return _mv88e6xxx_atu_cmd(ps, entry->fid, GLOBAL_ATU_OP_LOAD_DB);
} }
static int _mv88e6xxx_port_fdb_load(struct dsa_switch *ds, int port, static int _mv88e6xxx_port_fdb_load(struct mv88e6xxx_priv_state *ps, int port,
const unsigned char *addr, u16 vid, const unsigned char *addr, u16 vid,
u8 state) u8 state)
{ {
...@@ -2014,9 +2009,9 @@ static int _mv88e6xxx_port_fdb_load(struct dsa_switch *ds, int port, ...@@ -2014,9 +2009,9 @@ static int _mv88e6xxx_port_fdb_load(struct dsa_switch *ds, int port,
/* Null VLAN ID corresponds to the port private database */ /* Null VLAN ID corresponds to the port private database */
if (vid == 0) if (vid == 0)
err = _mv88e6xxx_port_fid_get(ds, port, &vlan.fid); err = _mv88e6xxx_port_fid_get(ps, port, &vlan.fid);
else else
err = _mv88e6xxx_vtu_get(ds, vid, &vlan, false); err = _mv88e6xxx_vtu_get(ps, vid, &vlan, false);
if (err) if (err)
return err; return err;
...@@ -2028,7 +2023,7 @@ static int _mv88e6xxx_port_fdb_load(struct dsa_switch *ds, int port, ...@@ -2028,7 +2023,7 @@ static int _mv88e6xxx_port_fdb_load(struct dsa_switch *ds, int port,
entry.portv_trunkid = BIT(port); entry.portv_trunkid = BIT(port);
} }
return _mv88e6xxx_atu_load(ds, &entry); return _mv88e6xxx_atu_load(ps, &entry);
} }
int mv88e6xxx_port_fdb_prepare(struct dsa_switch *ds, int port, int mv88e6xxx_port_fdb_prepare(struct dsa_switch *ds, int port,
...@@ -2051,7 +2046,7 @@ void mv88e6xxx_port_fdb_add(struct dsa_switch *ds, int port, ...@@ -2051,7 +2046,7 @@ void mv88e6xxx_port_fdb_add(struct dsa_switch *ds, int port,
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
mutex_lock(&ps->smi_mutex); mutex_lock(&ps->smi_mutex);
if (_mv88e6xxx_port_fdb_load(ds, port, fdb->addr, fdb->vid, state)) if (_mv88e6xxx_port_fdb_load(ps, port, fdb->addr, fdb->vid, state))
netdev_err(ds->ports[port], "failed to load MAC address\n"); netdev_err(ds->ports[port], "failed to load MAC address\n");
mutex_unlock(&ps->smi_mutex); mutex_unlock(&ps->smi_mutex);
} }
...@@ -2063,14 +2058,14 @@ int mv88e6xxx_port_fdb_del(struct dsa_switch *ds, int port, ...@@ -2063,14 +2058,14 @@ int mv88e6xxx_port_fdb_del(struct dsa_switch *ds, int port,
int ret; int ret;
mutex_lock(&ps->smi_mutex); mutex_lock(&ps->smi_mutex);
ret = _mv88e6xxx_port_fdb_load(ds, port, fdb->addr, fdb->vid, ret = _mv88e6xxx_port_fdb_load(ps, port, fdb->addr, fdb->vid,
GLOBAL_ATU_DATA_STATE_UNUSED); GLOBAL_ATU_DATA_STATE_UNUSED);
mutex_unlock(&ps->smi_mutex); mutex_unlock(&ps->smi_mutex);
return ret; return ret;
} }
static int _mv88e6xxx_atu_getnext(struct dsa_switch *ds, u16 fid, static int _mv88e6xxx_atu_getnext(struct mv88e6xxx_priv_state *ps, u16 fid,
struct mv88e6xxx_atu_entry *entry) struct mv88e6xxx_atu_entry *entry)
{ {
struct mv88e6xxx_atu_entry next = { 0 }; struct mv88e6xxx_atu_entry next = { 0 };
...@@ -2078,19 +2073,19 @@ static int _mv88e6xxx_atu_getnext(struct dsa_switch *ds, u16 fid, ...@@ -2078,19 +2073,19 @@ static int _mv88e6xxx_atu_getnext(struct dsa_switch *ds, u16 fid,
next.fid = fid; next.fid = fid;
ret = _mv88e6xxx_atu_wait(ds); ret = _mv88e6xxx_atu_wait(ps);
if (ret < 0) if (ret < 0)
return ret; return ret;
ret = _mv88e6xxx_atu_cmd(ds, fid, GLOBAL_ATU_OP_GET_NEXT_DB); ret = _mv88e6xxx_atu_cmd(ps, fid, GLOBAL_ATU_OP_GET_NEXT_DB);
if (ret < 0) if (ret < 0)
return ret; return ret;
ret = _mv88e6xxx_atu_mac_read(ds, next.mac); ret = _mv88e6xxx_atu_mac_read(ps, next.mac);
if (ret < 0) if (ret < 0)
return ret; return ret;
ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_ATU_DATA); ret = _mv88e6xxx_reg_read(ps, REG_GLOBAL, GLOBAL_ATU_DATA);
if (ret < 0) if (ret < 0)
return ret; return ret;
...@@ -2115,8 +2110,8 @@ static int _mv88e6xxx_atu_getnext(struct dsa_switch *ds, u16 fid, ...@@ -2115,8 +2110,8 @@ static int _mv88e6xxx_atu_getnext(struct dsa_switch *ds, u16 fid,
return 0; return 0;
} }
static int _mv88e6xxx_port_fdb_dump_one(struct dsa_switch *ds, u16 fid, u16 vid, static int _mv88e6xxx_port_fdb_dump_one(struct mv88e6xxx_priv_state *ps,
int port, u16 fid, u16 vid, int port,
struct switchdev_obj_port_fdb *fdb, struct switchdev_obj_port_fdb *fdb,
int (*cb)(struct switchdev_obj *obj)) int (*cb)(struct switchdev_obj *obj))
{ {
...@@ -2125,12 +2120,12 @@ static int _mv88e6xxx_port_fdb_dump_one(struct dsa_switch *ds, u16 fid, u16 vid, ...@@ -2125,12 +2120,12 @@ static int _mv88e6xxx_port_fdb_dump_one(struct dsa_switch *ds, u16 fid, u16 vid,
}; };
int err; int err;
err = _mv88e6xxx_atu_mac_write(ds, addr.mac); err = _mv88e6xxx_atu_mac_write(ps, addr.mac);
if (err) if (err)
return err; return err;
do { do {
err = _mv88e6xxx_atu_getnext(ds, fid, &addr); err = _mv88e6xxx_atu_getnext(ps, fid, &addr);
if (err) if (err)
break; break;
...@@ -2170,28 +2165,28 @@ int mv88e6xxx_port_fdb_dump(struct dsa_switch *ds, int port, ...@@ -2170,28 +2165,28 @@ int mv88e6xxx_port_fdb_dump(struct dsa_switch *ds, int port,
mutex_lock(&ps->smi_mutex); mutex_lock(&ps->smi_mutex);
/* Dump port's default Filtering Information Database (VLAN ID 0) */ /* Dump port's default Filtering Information Database (VLAN ID 0) */
err = _mv88e6xxx_port_fid_get(ds, port, &fid); err = _mv88e6xxx_port_fid_get(ps, port, &fid);
if (err) if (err)
goto unlock; goto unlock;
err = _mv88e6xxx_port_fdb_dump_one(ds, fid, 0, port, fdb, cb); err = _mv88e6xxx_port_fdb_dump_one(ps, fid, 0, port, fdb, cb);
if (err) if (err)
goto unlock; goto unlock;
/* Dump VLANs' Filtering Information Databases */ /* Dump VLANs' Filtering Information Databases */
err = _mv88e6xxx_vtu_vid_write(ds, vlan.vid); err = _mv88e6xxx_vtu_vid_write(ps, vlan.vid);
if (err) if (err)
goto unlock; goto unlock;
do { do {
err = _mv88e6xxx_vtu_getnext(ds, &vlan); err = _mv88e6xxx_vtu_getnext(ps, &vlan);
if (err) if (err)
break; break;
if (!vlan.valid) if (!vlan.valid)
break; break;
err = _mv88e6xxx_port_fdb_dump_one(ds, vlan.fid, vlan.vid, port, err = _mv88e6xxx_port_fdb_dump_one(ps, vlan.fid, vlan.vid, port,
fdb, cb); fdb, cb);
if (err) if (err)
break; break;
...@@ -2216,7 +2211,7 @@ int mv88e6xxx_port_bridge_join(struct dsa_switch *ds, int port, ...@@ -2216,7 +2211,7 @@ int mv88e6xxx_port_bridge_join(struct dsa_switch *ds, int port,
for (i = 0; i < ps->info->num_ports; ++i) { for (i = 0; i < ps->info->num_ports; ++i) {
if (ps->ports[i].bridge_dev == bridge) { if (ps->ports[i].bridge_dev == bridge) {
err = _mv88e6xxx_port_based_vlan_map(ds, i); err = _mv88e6xxx_port_based_vlan_map(ps, i);
if (err) if (err)
break; break;
} }
...@@ -2240,7 +2235,7 @@ void mv88e6xxx_port_bridge_leave(struct dsa_switch *ds, int port) ...@@ -2240,7 +2235,7 @@ void mv88e6xxx_port_bridge_leave(struct dsa_switch *ds, int port)
for (i = 0; i < ps->info->num_ports; ++i) for (i = 0; i < ps->info->num_ports; ++i)
if (i == port || ps->ports[i].bridge_dev == bridge) if (i == port || ps->ports[i].bridge_dev == bridge)
if (_mv88e6xxx_port_based_vlan_map(ds, i)) if (_mv88e6xxx_port_based_vlan_map(ps, i))
netdev_warn(ds->ports[i], "failed to remap\n"); netdev_warn(ds->ports[i], "failed to remap\n");
mutex_unlock(&ps->smi_mutex); mutex_unlock(&ps->smi_mutex);
...@@ -2259,57 +2254,58 @@ static void mv88e6xxx_bridge_work(struct work_struct *work) ...@@ -2259,57 +2254,58 @@ static void mv88e6xxx_bridge_work(struct work_struct *work)
for (port = 0; port < ps->info->num_ports; ++port) for (port = 0; port < ps->info->num_ports; ++port)
if (test_and_clear_bit(port, ps->port_state_update_mask) && if (test_and_clear_bit(port, ps->port_state_update_mask) &&
_mv88e6xxx_port_state(ds, port, ps->ports[port].state)) _mv88e6xxx_port_state(ps, port, ps->ports[port].state))
netdev_warn(ds->ports[port], "failed to update state to %s\n", netdev_warn(ds->ports[port],
"failed to update state to %s\n",
mv88e6xxx_port_state_names[ps->ports[port].state]); mv88e6xxx_port_state_names[ps->ports[port].state]);
mutex_unlock(&ps->smi_mutex); mutex_unlock(&ps->smi_mutex);
} }
static int _mv88e6xxx_phy_page_write(struct dsa_switch *ds, int port, int page, static int _mv88e6xxx_phy_page_write(struct mv88e6xxx_priv_state *ps,
int reg, int val) int port, int page, int reg, int val)
{ {
int ret; int ret;
ret = _mv88e6xxx_phy_write_indirect(ds, port, 0x16, page); ret = _mv88e6xxx_phy_write_indirect(ps, port, 0x16, page);
if (ret < 0) if (ret < 0)
goto restore_page_0; goto restore_page_0;
ret = _mv88e6xxx_phy_write_indirect(ds, port, reg, val); ret = _mv88e6xxx_phy_write_indirect(ps, port, reg, val);
restore_page_0: restore_page_0:
_mv88e6xxx_phy_write_indirect(ds, port, 0x16, 0x0); _mv88e6xxx_phy_write_indirect(ps, port, 0x16, 0x0);
return ret; return ret;
} }
static int _mv88e6xxx_phy_page_read(struct dsa_switch *ds, int port, int page, static int _mv88e6xxx_phy_page_read(struct mv88e6xxx_priv_state *ps,
int reg) int port, int page, int reg)
{ {
int ret; int ret;
ret = _mv88e6xxx_phy_write_indirect(ds, port, 0x16, page); ret = _mv88e6xxx_phy_write_indirect(ps, port, 0x16, page);
if (ret < 0) if (ret < 0)
goto restore_page_0; goto restore_page_0;
ret = _mv88e6xxx_phy_read_indirect(ds, port, reg); ret = _mv88e6xxx_phy_read_indirect(ps, port, reg);
restore_page_0: restore_page_0:
_mv88e6xxx_phy_write_indirect(ds, port, 0x16, 0x0); _mv88e6xxx_phy_write_indirect(ps, port, 0x16, 0x0);
return ret; return ret;
} }
static int mv88e6xxx_power_on_serdes(struct dsa_switch *ds) static int mv88e6xxx_power_on_serdes(struct mv88e6xxx_priv_state *ps)
{ {
int ret; int ret;
ret = _mv88e6xxx_phy_page_read(ds, REG_FIBER_SERDES, PAGE_FIBER_SERDES, ret = _mv88e6xxx_phy_page_read(ps, REG_FIBER_SERDES, PAGE_FIBER_SERDES,
MII_BMCR); MII_BMCR);
if (ret < 0) if (ret < 0)
return ret; return ret;
if (ret & BMCR_PDOWN) { if (ret & BMCR_PDOWN) {
ret &= ~BMCR_PDOWN; ret &= ~BMCR_PDOWN;
ret = _mv88e6xxx_phy_page_write(ds, REG_FIBER_SERDES, ret = _mv88e6xxx_phy_page_write(ps, REG_FIBER_SERDES,
PAGE_FIBER_SERDES, MII_BMCR, PAGE_FIBER_SERDES, MII_BMCR,
ret); ret);
} }
...@@ -2325,24 +2321,24 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port) ...@@ -2325,24 +2321,24 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
mutex_lock(&ps->smi_mutex); mutex_lock(&ps->smi_mutex);
if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) || if (mv88e6xxx_6352_family(ps) || mv88e6xxx_6351_family(ps) ||
mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) || mv88e6xxx_6165_family(ps) || mv88e6xxx_6097_family(ps) ||
mv88e6xxx_6185_family(ds) || mv88e6xxx_6095_family(ds) || mv88e6xxx_6185_family(ps) || mv88e6xxx_6095_family(ps) ||
mv88e6xxx_6065_family(ds) || mv88e6xxx_6320_family(ds)) { mv88e6xxx_6065_family(ps) || mv88e6xxx_6320_family(ps)) {
/* MAC Forcing register: don't force link, speed, /* MAC Forcing register: don't force link, speed,
* duplex or flow control state to any particular * duplex or flow control state to any particular
* values on physical ports, but force the CPU port * values on physical ports, but force the CPU port
* and all DSA ports to their maximum bandwidth and * and all DSA ports to their maximum bandwidth and
* full duplex. * full duplex.
*/ */
reg = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_PCS_CTRL); reg = _mv88e6xxx_reg_read(ps, REG_PORT(port), PORT_PCS_CTRL);
if (dsa_is_cpu_port(ds, port) || dsa_is_dsa_port(ds, port)) { if (dsa_is_cpu_port(ds, port) || dsa_is_dsa_port(ds, port)) {
reg &= ~PORT_PCS_CTRL_UNFORCED; reg &= ~PORT_PCS_CTRL_UNFORCED;
reg |= PORT_PCS_CTRL_FORCE_LINK | reg |= PORT_PCS_CTRL_FORCE_LINK |
PORT_PCS_CTRL_LINK_UP | PORT_PCS_CTRL_LINK_UP |
PORT_PCS_CTRL_DUPLEX_FULL | PORT_PCS_CTRL_DUPLEX_FULL |
PORT_PCS_CTRL_FORCE_DUPLEX; PORT_PCS_CTRL_FORCE_DUPLEX;
if (mv88e6xxx_6065_family(ds)) if (mv88e6xxx_6065_family(ps))
reg |= PORT_PCS_CTRL_100; reg |= PORT_PCS_CTRL_100;
else else
reg |= PORT_PCS_CTRL_1000; reg |= PORT_PCS_CTRL_1000;
...@@ -2350,7 +2346,7 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port) ...@@ -2350,7 +2346,7 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
reg |= PORT_PCS_CTRL_UNFORCED; reg |= PORT_PCS_CTRL_UNFORCED;
} }
ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), ret = _mv88e6xxx_reg_write(ps, REG_PORT(port),
PORT_PCS_CTRL, reg); PORT_PCS_CTRL, reg);
if (ret) if (ret)
goto abort; goto abort;
...@@ -2371,19 +2367,19 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port) ...@@ -2371,19 +2367,19 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
* forwarding of unknown unicasts and multicasts. * forwarding of unknown unicasts and multicasts.
*/ */
reg = 0; reg = 0;
if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) || if (mv88e6xxx_6352_family(ps) || mv88e6xxx_6351_family(ps) ||
mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) || mv88e6xxx_6165_family(ps) || mv88e6xxx_6097_family(ps) ||
mv88e6xxx_6095_family(ds) || mv88e6xxx_6065_family(ds) || mv88e6xxx_6095_family(ps) || mv88e6xxx_6065_family(ps) ||
mv88e6xxx_6185_family(ds) || mv88e6xxx_6320_family(ds)) mv88e6xxx_6185_family(ps) || mv88e6xxx_6320_family(ps))
reg = PORT_CONTROL_IGMP_MLD_SNOOP | reg = PORT_CONTROL_IGMP_MLD_SNOOP |
PORT_CONTROL_USE_TAG | PORT_CONTROL_USE_IP | PORT_CONTROL_USE_TAG | PORT_CONTROL_USE_IP |
PORT_CONTROL_STATE_FORWARDING; PORT_CONTROL_STATE_FORWARDING;
if (dsa_is_cpu_port(ds, port)) { if (dsa_is_cpu_port(ds, port)) {
if (mv88e6xxx_6095_family(ds) || mv88e6xxx_6185_family(ds)) if (mv88e6xxx_6095_family(ps) || mv88e6xxx_6185_family(ps))
reg |= PORT_CONTROL_DSA_TAG; reg |= PORT_CONTROL_DSA_TAG;
if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) || if (mv88e6xxx_6352_family(ps) || mv88e6xxx_6351_family(ps) ||
mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) || mv88e6xxx_6165_family(ps) || mv88e6xxx_6097_family(ps) ||
mv88e6xxx_6320_family(ds)) { mv88e6xxx_6320_family(ps)) {
if (ds->dst->tag_protocol == DSA_TAG_PROTO_EDSA) if (ds->dst->tag_protocol == DSA_TAG_PROTO_EDSA)
reg |= PORT_CONTROL_FRAME_ETHER_TYPE_DSA; reg |= PORT_CONTROL_FRAME_ETHER_TYPE_DSA;
else else
...@@ -2392,20 +2388,20 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port) ...@@ -2392,20 +2388,20 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
PORT_CONTROL_FORWARD_UNKNOWN_MC; PORT_CONTROL_FORWARD_UNKNOWN_MC;
} }
if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) || if (mv88e6xxx_6352_family(ps) || mv88e6xxx_6351_family(ps) ||
mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) || mv88e6xxx_6165_family(ps) || mv88e6xxx_6097_family(ps) ||
mv88e6xxx_6095_family(ds) || mv88e6xxx_6065_family(ds) || mv88e6xxx_6095_family(ps) || mv88e6xxx_6065_family(ps) ||
mv88e6xxx_6185_family(ds) || mv88e6xxx_6320_family(ds)) { mv88e6xxx_6185_family(ps) || mv88e6xxx_6320_family(ps)) {
if (ds->dst->tag_protocol == DSA_TAG_PROTO_EDSA) if (ds->dst->tag_protocol == DSA_TAG_PROTO_EDSA)
reg |= PORT_CONTROL_EGRESS_ADD_TAG; reg |= PORT_CONTROL_EGRESS_ADD_TAG;
} }
} }
if (dsa_is_dsa_port(ds, port)) { if (dsa_is_dsa_port(ds, port)) {
if (mv88e6xxx_6095_family(ds) || mv88e6xxx_6185_family(ds)) if (mv88e6xxx_6095_family(ps) || mv88e6xxx_6185_family(ps))
reg |= PORT_CONTROL_DSA_TAG; reg |= PORT_CONTROL_DSA_TAG;
if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) || if (mv88e6xxx_6352_family(ps) || mv88e6xxx_6351_family(ps) ||
mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) || mv88e6xxx_6165_family(ps) || mv88e6xxx_6097_family(ps) ||
mv88e6xxx_6320_family(ds)) { mv88e6xxx_6320_family(ps)) {
reg |= PORT_CONTROL_FRAME_MODE_DSA; reg |= PORT_CONTROL_FRAME_MODE_DSA;
} }
...@@ -2414,7 +2410,7 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port) ...@@ -2414,7 +2410,7 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
PORT_CONTROL_FORWARD_UNKNOWN_MC; PORT_CONTROL_FORWARD_UNKNOWN_MC;
} }
if (reg) { if (reg) {
ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), ret = _mv88e6xxx_reg_write(ps, REG_PORT(port),
PORT_CONTROL, reg); PORT_CONTROL, reg);
if (ret) if (ret)
goto abort; goto abort;
...@@ -2423,15 +2419,15 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port) ...@@ -2423,15 +2419,15 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
/* If this port is connected to a SerDes, make sure the SerDes is not /* If this port is connected to a SerDes, make sure the SerDes is not
* powered down. * powered down.
*/ */
if (mv88e6xxx_6352_family(ds)) { if (mv88e6xxx_6352_family(ps)) {
ret = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_STATUS); ret = _mv88e6xxx_reg_read(ps, REG_PORT(port), PORT_STATUS);
if (ret < 0) if (ret < 0)
goto abort; goto abort;
ret &= PORT_STATUS_CMODE_MASK; ret &= PORT_STATUS_CMODE_MASK;
if ((ret == PORT_STATUS_CMODE_100BASE_X) || if ((ret == PORT_STATUS_CMODE_100BASE_X) ||
(ret == PORT_STATUS_CMODE_1000BASE_X) || (ret == PORT_STATUS_CMODE_1000BASE_X) ||
(ret == PORT_STATUS_CMODE_SGMII)) { (ret == PORT_STATUS_CMODE_SGMII)) {
ret = mv88e6xxx_power_on_serdes(ds); ret = mv88e6xxx_power_on_serdes(ps);
if (ret < 0) if (ret < 0)
goto abort; goto abort;
} }
...@@ -2444,17 +2440,17 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port) ...@@ -2444,17 +2440,17 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
* copy of all transmitted/received frames on this port to the CPU. * copy of all transmitted/received frames on this port to the CPU.
*/ */
reg = 0; reg = 0;
if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) || if (mv88e6xxx_6352_family(ps) || mv88e6xxx_6351_family(ps) ||
mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) || mv88e6xxx_6165_family(ps) || mv88e6xxx_6097_family(ps) ||
mv88e6xxx_6095_family(ds) || mv88e6xxx_6320_family(ds) || mv88e6xxx_6095_family(ps) || mv88e6xxx_6320_family(ps) ||
mv88e6xxx_6185_family(ds)) mv88e6xxx_6185_family(ps))
reg = PORT_CONTROL_2_MAP_DA; reg = PORT_CONTROL_2_MAP_DA;
if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) || if (mv88e6xxx_6352_family(ps) || mv88e6xxx_6351_family(ps) ||
mv88e6xxx_6165_family(ds) || mv88e6xxx_6320_family(ds)) mv88e6xxx_6165_family(ps) || mv88e6xxx_6320_family(ps))
reg |= PORT_CONTROL_2_JUMBO_10240; reg |= PORT_CONTROL_2_JUMBO_10240;
if (mv88e6xxx_6095_family(ds) || mv88e6xxx_6185_family(ds)) { if (mv88e6xxx_6095_family(ps) || mv88e6xxx_6185_family(ps)) {
/* Set the upstream port this port should use */ /* Set the upstream port this port should use */
reg |= dsa_upstream_port(ds); reg |= dsa_upstream_port(ds);
/* enable forwarding of unknown multicast addresses to /* enable forwarding of unknown multicast addresses to
...@@ -2467,7 +2463,7 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port) ...@@ -2467,7 +2463,7 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
reg |= PORT_CONTROL_2_8021Q_DISABLED; reg |= PORT_CONTROL_2_8021Q_DISABLED;
if (reg) { if (reg) {
ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), ret = _mv88e6xxx_reg_write(ps, REG_PORT(port),
PORT_CONTROL_2, reg); PORT_CONTROL_2, reg);
if (ret) if (ret)
goto abort; goto abort;
...@@ -2483,24 +2479,24 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port) ...@@ -2483,24 +2479,24 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
if (dsa_is_cpu_port(ds, port)) if (dsa_is_cpu_port(ds, port))
reg = 0; reg = 0;
ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_ASSOC_VECTOR, reg); ret = _mv88e6xxx_reg_write(ps, REG_PORT(port), PORT_ASSOC_VECTOR, reg);
if (ret) if (ret)
goto abort; goto abort;
/* Egress rate control 2: disable egress rate control. */ /* Egress rate control 2: disable egress rate control. */
ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_RATE_CONTROL_2, ret = _mv88e6xxx_reg_write(ps, REG_PORT(port), PORT_RATE_CONTROL_2,
0x0000); 0x0000);
if (ret) if (ret)
goto abort; goto abort;
if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) || if (mv88e6xxx_6352_family(ps) || mv88e6xxx_6351_family(ps) ||
mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) || mv88e6xxx_6165_family(ps) || mv88e6xxx_6097_family(ps) ||
mv88e6xxx_6320_family(ds)) { mv88e6xxx_6320_family(ps)) {
/* Do not limit the period of time that this port can /* Do not limit the period of time that this port can
* be paused for by the remote end or the period of * be paused for by the remote end or the period of
* time that this port can pause the remote end. * time that this port can pause the remote end.
*/ */
ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), ret = _mv88e6xxx_reg_write(ps, REG_PORT(port),
PORT_PAUSE_CTRL, 0x0000); PORT_PAUSE_CTRL, 0x0000);
if (ret) if (ret)
goto abort; goto abort;
...@@ -2509,12 +2505,12 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port) ...@@ -2509,12 +2505,12 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
* address database entries that this port is allowed * address database entries that this port is allowed
* to use. * to use.
*/ */
ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), ret = _mv88e6xxx_reg_write(ps, REG_PORT(port),
PORT_ATU_CONTROL, 0x0000); PORT_ATU_CONTROL, 0x0000);
/* Priority Override: disable DA, SA and VTU priority /* Priority Override: disable DA, SA and VTU priority
* override. * override.
*/ */
ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), ret = _mv88e6xxx_reg_write(ps, REG_PORT(port),
PORT_PRI_OVERRIDE, 0x0000); PORT_PRI_OVERRIDE, 0x0000);
if (ret) if (ret)
goto abort; goto abort;
...@@ -2522,14 +2518,14 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port) ...@@ -2522,14 +2518,14 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
/* Port Ethertype: use the Ethertype DSA Ethertype /* Port Ethertype: use the Ethertype DSA Ethertype
* value. * value.
*/ */
ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), ret = _mv88e6xxx_reg_write(ps, REG_PORT(port),
PORT_ETH_TYPE, ETH_P_EDSA); PORT_ETH_TYPE, ETH_P_EDSA);
if (ret) if (ret)
goto abort; goto abort;
/* Tag Remap: use an identity 802.1p prio -> switch /* Tag Remap: use an identity 802.1p prio -> switch
* prio mapping. * prio mapping.
*/ */
ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), ret = _mv88e6xxx_reg_write(ps, REG_PORT(port),
PORT_TAG_REGMAP_0123, 0x3210); PORT_TAG_REGMAP_0123, 0x3210);
if (ret) if (ret)
goto abort; goto abort;
...@@ -2537,18 +2533,18 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port) ...@@ -2537,18 +2533,18 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
/* Tag Remap 2: use an identity 802.1p prio -> switch /* Tag Remap 2: use an identity 802.1p prio -> switch
* prio mapping. * prio mapping.
*/ */
ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), ret = _mv88e6xxx_reg_write(ps, REG_PORT(port),
PORT_TAG_REGMAP_4567, 0x7654); PORT_TAG_REGMAP_4567, 0x7654);
if (ret) if (ret)
goto abort; goto abort;
} }
if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) || if (mv88e6xxx_6352_family(ps) || mv88e6xxx_6351_family(ps) ||
mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) || mv88e6xxx_6165_family(ps) || mv88e6xxx_6097_family(ps) ||
mv88e6xxx_6185_family(ds) || mv88e6xxx_6095_family(ds) || mv88e6xxx_6185_family(ps) || mv88e6xxx_6095_family(ps) ||
mv88e6xxx_6320_family(ds)) { mv88e6xxx_6320_family(ps)) {
/* Rate Control: disable ingress rate limiting. */ /* Rate Control: disable ingress rate limiting. */
ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), ret = _mv88e6xxx_reg_write(ps, REG_PORT(port),
PORT_RATE_CONTROL, 0x0001); PORT_RATE_CONTROL, 0x0001);
if (ret) if (ret)
goto abort; goto abort;
...@@ -2557,7 +2553,7 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port) ...@@ -2557,7 +2553,7 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
/* Port Control 1: disable trunking, disable sending /* Port Control 1: disable trunking, disable sending
* learning messages to this port. * learning messages to this port.
*/ */
ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_CONTROL_1, 0x0000); ret = _mv88e6xxx_reg_write(ps, REG_PORT(port), PORT_CONTROL_1, 0x0000);
if (ret) if (ret)
goto abort; goto abort;
...@@ -2565,18 +2561,18 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port) ...@@ -2565,18 +2561,18 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
* database, and allow bidirectional communication between the * database, and allow bidirectional communication between the
* CPU and DSA port(s), and the other ports. * CPU and DSA port(s), and the other ports.
*/ */
ret = _mv88e6xxx_port_fid_set(ds, port, 0); ret = _mv88e6xxx_port_fid_set(ps, port, 0);
if (ret) if (ret)
goto abort; goto abort;
ret = _mv88e6xxx_port_based_vlan_map(ds, port); ret = _mv88e6xxx_port_based_vlan_map(ps, port);
if (ret) if (ret)
goto abort; goto abort;
/* Default VLAN ID and priority: don't set a default VLAN /* Default VLAN ID and priority: don't set a default VLAN
* ID, and set the default packet priority to zero. * ID, and set the default packet priority to zero.
*/ */
ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_DEFAULT_VLAN, ret = _mv88e6xxx_reg_write(ps, REG_PORT(port), PORT_DEFAULT_VLAN,
0x0000); 0x0000);
abort: abort:
mutex_unlock(&ps->smi_mutex); mutex_unlock(&ps->smi_mutex);
...@@ -2597,11 +2593,8 @@ int mv88e6xxx_setup_ports(struct dsa_switch *ds) ...@@ -2597,11 +2593,8 @@ int mv88e6xxx_setup_ports(struct dsa_switch *ds)
return 0; return 0;
} }
int mv88e6xxx_setup_common(struct dsa_switch *ds) int mv88e6xxx_setup_common(struct mv88e6xxx_priv_state *ps)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
ps->ds = ds;
mutex_init(&ps->smi_mutex); mutex_init(&ps->smi_mutex);
INIT_WORK(&ps->bridge_work, mv88e6xxx_bridge_work); INIT_WORK(&ps->bridge_work, mv88e6xxx_bridge_work);
...@@ -2620,46 +2613,46 @@ int mv88e6xxx_setup_global(struct dsa_switch *ds) ...@@ -2620,46 +2613,46 @@ int mv88e6xxx_setup_global(struct dsa_switch *ds)
* enable address learn messages to be sent to all message * enable address learn messages to be sent to all message
* ports. * ports.
*/ */
err = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_ATU_CONTROL, err = _mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_ATU_CONTROL,
0x0140 | GLOBAL_ATU_CONTROL_LEARN2ALL); 0x0140 | GLOBAL_ATU_CONTROL_LEARN2ALL);
if (err) if (err)
goto unlock; goto unlock;
/* Configure the IP ToS mapping registers. */ /* Configure the IP ToS mapping registers. */
err = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_IP_PRI_0, 0x0000); err = _mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_IP_PRI_0, 0x0000);
if (err) if (err)
goto unlock; goto unlock;
err = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_IP_PRI_1, 0x0000); err = _mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_IP_PRI_1, 0x0000);
if (err) if (err)
goto unlock; goto unlock;
err = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_IP_PRI_2, 0x5555); err = _mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_IP_PRI_2, 0x5555);
if (err) if (err)
goto unlock; goto unlock;
err = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_IP_PRI_3, 0x5555); err = _mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_IP_PRI_3, 0x5555);
if (err) if (err)
goto unlock; goto unlock;
err = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_IP_PRI_4, 0xaaaa); err = _mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_IP_PRI_4, 0xaaaa);
if (err) if (err)
goto unlock; goto unlock;
err = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_IP_PRI_5, 0xaaaa); err = _mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_IP_PRI_5, 0xaaaa);
if (err) if (err)
goto unlock; goto unlock;
err = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_IP_PRI_6, 0xffff); err = _mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_IP_PRI_6, 0xffff);
if (err) if (err)
goto unlock; goto unlock;
err = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_IP_PRI_7, 0xffff); err = _mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_IP_PRI_7, 0xffff);
if (err) if (err)
goto unlock; goto unlock;
/* Configure the IEEE 802.1p priority mapping register. */ /* Configure the IEEE 802.1p priority mapping register. */
err = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_IEEE_PRI, 0xfa41); err = _mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_IEEE_PRI, 0xfa41);
if (err) if (err)
goto unlock; goto unlock;
/* Send all frames with destination addresses matching /* Send all frames with destination addresses matching
* 01:80:c2:00:00:0x to the CPU port. * 01:80:c2:00:00:0x to the CPU port.
*/ */
err = _mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_MGMT_EN_0X, 0xffff); err = _mv88e6xxx_reg_write(ps, REG_GLOBAL2, GLOBAL2_MGMT_EN_0X, 0xffff);
if (err) if (err)
goto unlock; goto unlock;
...@@ -2668,7 +2661,7 @@ int mv88e6xxx_setup_global(struct dsa_switch *ds) ...@@ -2668,7 +2661,7 @@ int mv88e6xxx_setup_global(struct dsa_switch *ds)
* highest, and send all special multicast frames to the CPU * highest, and send all special multicast frames to the CPU
* port at the highest priority. * port at the highest priority.
*/ */
err = _mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_SWITCH_MGMT, err = _mv88e6xxx_reg_write(ps, REG_GLOBAL2, GLOBAL2_SWITCH_MGMT,
0x7 | GLOBAL2_SWITCH_MGMT_RSVD2CPU | 0x70 | 0x7 | GLOBAL2_SWITCH_MGMT_RSVD2CPU | 0x70 |
GLOBAL2_SWITCH_MGMT_FORCE_FLOW_CTRL_PRI); GLOBAL2_SWITCH_MGMT_FORCE_FLOW_CTRL_PRI);
if (err) if (err)
...@@ -2683,7 +2676,7 @@ int mv88e6xxx_setup_global(struct dsa_switch *ds) ...@@ -2683,7 +2676,7 @@ int mv88e6xxx_setup_global(struct dsa_switch *ds)
nexthop = ds->pd->rtable[i] & 0x1f; nexthop = ds->pd->rtable[i] & 0x1f;
err = _mv88e6xxx_reg_write( err = _mv88e6xxx_reg_write(
ds, REG_GLOBAL2, ps, REG_GLOBAL2,
GLOBAL2_DEVICE_MAPPING, GLOBAL2_DEVICE_MAPPING,
GLOBAL2_DEVICE_MAPPING_UPDATE | GLOBAL2_DEVICE_MAPPING_UPDATE |
(i << GLOBAL2_DEVICE_MAPPING_TARGET_SHIFT) | nexthop); (i << GLOBAL2_DEVICE_MAPPING_TARGET_SHIFT) | nexthop);
...@@ -2693,7 +2686,7 @@ int mv88e6xxx_setup_global(struct dsa_switch *ds) ...@@ -2693,7 +2686,7 @@ int mv88e6xxx_setup_global(struct dsa_switch *ds)
/* Clear all trunk masks. */ /* Clear all trunk masks. */
for (i = 0; i < 8; i++) { for (i = 0; i < 8; i++) {
err = _mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_TRUNK_MASK, err = _mv88e6xxx_reg_write(ps, REG_GLOBAL2, GLOBAL2_TRUNK_MASK,
0x8000 | 0x8000 |
(i << GLOBAL2_TRUNK_MASK_NUM_SHIFT) | (i << GLOBAL2_TRUNK_MASK_NUM_SHIFT) |
((1 << ps->info->num_ports) - 1)); ((1 << ps->info->num_ports) - 1));
...@@ -2704,7 +2697,7 @@ int mv88e6xxx_setup_global(struct dsa_switch *ds) ...@@ -2704,7 +2697,7 @@ int mv88e6xxx_setup_global(struct dsa_switch *ds)
/* Clear all trunk mappings. */ /* Clear all trunk mappings. */
for (i = 0; i < 16; i++) { for (i = 0; i < 16; i++) {
err = _mv88e6xxx_reg_write( err = _mv88e6xxx_reg_write(
ds, REG_GLOBAL2, ps, REG_GLOBAL2,
GLOBAL2_TRUNK_MAPPING, GLOBAL2_TRUNK_MAPPING,
GLOBAL2_TRUNK_MAPPING_UPDATE | GLOBAL2_TRUNK_MAPPING_UPDATE |
(i << GLOBAL2_TRUNK_MAPPING_ID_SHIFT)); (i << GLOBAL2_TRUNK_MAPPING_ID_SHIFT));
...@@ -2712,13 +2705,13 @@ int mv88e6xxx_setup_global(struct dsa_switch *ds) ...@@ -2712,13 +2705,13 @@ int mv88e6xxx_setup_global(struct dsa_switch *ds)
goto unlock; goto unlock;
} }
if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) || if (mv88e6xxx_6352_family(ps) || mv88e6xxx_6351_family(ps) ||
mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) || mv88e6xxx_6165_family(ps) || mv88e6xxx_6097_family(ps) ||
mv88e6xxx_6320_family(ds)) { mv88e6xxx_6320_family(ps)) {
/* Send all frames with destination addresses matching /* Send all frames with destination addresses matching
* 01:80:c2:00:00:2x to the CPU port. * 01:80:c2:00:00:2x to the CPU port.
*/ */
err = _mv88e6xxx_reg_write(ds, REG_GLOBAL2, err = _mv88e6xxx_reg_write(ps, REG_GLOBAL2,
GLOBAL2_MGMT_EN_2X, 0xffff); GLOBAL2_MGMT_EN_2X, 0xffff);
if (err) if (err)
goto unlock; goto unlock;
...@@ -2726,14 +2719,14 @@ int mv88e6xxx_setup_global(struct dsa_switch *ds) ...@@ -2726,14 +2719,14 @@ int mv88e6xxx_setup_global(struct dsa_switch *ds)
/* Initialise cross-chip port VLAN table to reset /* Initialise cross-chip port VLAN table to reset
* defaults. * defaults.
*/ */
err = _mv88e6xxx_reg_write(ds, REG_GLOBAL2, err = _mv88e6xxx_reg_write(ps, REG_GLOBAL2,
GLOBAL2_PVT_ADDR, 0x9000); GLOBAL2_PVT_ADDR, 0x9000);
if (err) if (err)
goto unlock; goto unlock;
/* Clear the priority override table. */ /* Clear the priority override table. */
for (i = 0; i < 16; i++) { for (i = 0; i < 16; i++) {
err = _mv88e6xxx_reg_write(ds, REG_GLOBAL2, err = _mv88e6xxx_reg_write(ps, REG_GLOBAL2,
GLOBAL2_PRIO_OVERRIDE, GLOBAL2_PRIO_OVERRIDE,
0x8000 | (i << 8)); 0x8000 | (i << 8));
if (err) if (err)
...@@ -2741,16 +2734,16 @@ int mv88e6xxx_setup_global(struct dsa_switch *ds) ...@@ -2741,16 +2734,16 @@ int mv88e6xxx_setup_global(struct dsa_switch *ds)
} }
} }
if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) || if (mv88e6xxx_6352_family(ps) || mv88e6xxx_6351_family(ps) ||
mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) || mv88e6xxx_6165_family(ps) || mv88e6xxx_6097_family(ps) ||
mv88e6xxx_6185_family(ds) || mv88e6xxx_6095_family(ds) || mv88e6xxx_6185_family(ps) || mv88e6xxx_6095_family(ps) ||
mv88e6xxx_6320_family(ds)) { mv88e6xxx_6320_family(ps)) {
/* Disable ingress rate limiting by resetting all /* Disable ingress rate limiting by resetting all
* ingress rate limit registers to their initial * ingress rate limit registers to their initial
* state. * state.
*/ */
for (i = 0; i < ps->info->num_ports; i++) { for (i = 0; i < ps->info->num_ports; i++) {
err = _mv88e6xxx_reg_write(ds, REG_GLOBAL2, err = _mv88e6xxx_reg_write(ps, REG_GLOBAL2,
GLOBAL2_INGRESS_OP, GLOBAL2_INGRESS_OP,
0x9000 | (i << 8)); 0x9000 | (i << 8));
if (err) if (err)
...@@ -2759,34 +2752,33 @@ int mv88e6xxx_setup_global(struct dsa_switch *ds) ...@@ -2759,34 +2752,33 @@ int mv88e6xxx_setup_global(struct dsa_switch *ds)
} }
/* Clear the statistics counters for all ports */ /* Clear the statistics counters for all ports */
err = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_STATS_OP, err = _mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_STATS_OP,
GLOBAL_STATS_OP_FLUSH_ALL); GLOBAL_STATS_OP_FLUSH_ALL);
if (err) if (err)
goto unlock; goto unlock;
/* Wait for the flush to complete. */ /* Wait for the flush to complete. */
err = _mv88e6xxx_stats_wait(ds); err = _mv88e6xxx_stats_wait(ps);
if (err < 0) if (err < 0)
goto unlock; goto unlock;
/* Clear all ATU entries */ /* Clear all ATU entries */
err = _mv88e6xxx_atu_flush(ds, 0, true); err = _mv88e6xxx_atu_flush(ps, 0, true);
if (err < 0) if (err < 0)
goto unlock; goto unlock;
/* Clear all the VTU and STU entries */ /* Clear all the VTU and STU entries */
err = _mv88e6xxx_vtu_stu_flush(ds); err = _mv88e6xxx_vtu_stu_flush(ps);
unlock: unlock:
mutex_unlock(&ps->smi_mutex); mutex_unlock(&ps->smi_mutex);
return err; return err;
} }
int mv88e6xxx_switch_reset(struct dsa_switch *ds, bool ppu_active) int mv88e6xxx_switch_reset(struct mv88e6xxx_priv_state *ps, bool ppu_active)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
u16 is_reset = (ppu_active ? 0x8800 : 0xc800); u16 is_reset = (ppu_active ? 0x8800 : 0xc800);
struct gpio_desc *gpiod = ds->pd->reset; struct gpio_desc *gpiod = ps->ds->pd->reset;
unsigned long timeout; unsigned long timeout;
int ret; int ret;
int i; int i;
...@@ -2795,11 +2787,11 @@ int mv88e6xxx_switch_reset(struct dsa_switch *ds, bool ppu_active) ...@@ -2795,11 +2787,11 @@ int mv88e6xxx_switch_reset(struct dsa_switch *ds, bool ppu_active)
/* Set all ports to the disabled state. */ /* Set all ports to the disabled state. */
for (i = 0; i < ps->info->num_ports; i++) { for (i = 0; i < ps->info->num_ports; i++) {
ret = _mv88e6xxx_reg_read(ds, REG_PORT(i), PORT_CONTROL); ret = _mv88e6xxx_reg_read(ps, REG_PORT(i), PORT_CONTROL);
if (ret < 0) if (ret < 0)
goto unlock; goto unlock;
ret = _mv88e6xxx_reg_write(ds, REG_PORT(i), PORT_CONTROL, ret = _mv88e6xxx_reg_write(ps, REG_PORT(i), PORT_CONTROL,
ret & 0xfffc); ret & 0xfffc);
if (ret) if (ret)
goto unlock; goto unlock;
...@@ -2821,16 +2813,16 @@ int mv88e6xxx_switch_reset(struct dsa_switch *ds, bool ppu_active) ...@@ -2821,16 +2813,16 @@ int mv88e6xxx_switch_reset(struct dsa_switch *ds, bool ppu_active)
* through global registers 0x18 and 0x19. * through global registers 0x18 and 0x19.
*/ */
if (ppu_active) if (ppu_active)
ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, 0x04, 0xc000); ret = _mv88e6xxx_reg_write(ps, REG_GLOBAL, 0x04, 0xc000);
else else
ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, 0x04, 0xc400); ret = _mv88e6xxx_reg_write(ps, REG_GLOBAL, 0x04, 0xc400);
if (ret) if (ret)
goto unlock; goto unlock;
/* Wait up to one second for reset to complete. */ /* Wait up to one second for reset to complete. */
timeout = jiffies + 1 * HZ; timeout = jiffies + 1 * HZ;
while (time_before(jiffies, timeout)) { while (time_before(jiffies, timeout)) {
ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, 0x00); ret = _mv88e6xxx_reg_read(ps, REG_GLOBAL, 0x00);
if (ret < 0) if (ret < 0)
goto unlock; goto unlock;
...@@ -2854,7 +2846,7 @@ int mv88e6xxx_phy_page_read(struct dsa_switch *ds, int port, int page, int reg) ...@@ -2854,7 +2846,7 @@ int mv88e6xxx_phy_page_read(struct dsa_switch *ds, int port, int page, int reg)
int ret; int ret;
mutex_lock(&ps->smi_mutex); mutex_lock(&ps->smi_mutex);
ret = _mv88e6xxx_phy_page_read(ds, port, page, reg); ret = _mv88e6xxx_phy_page_read(ps, port, page, reg);
mutex_unlock(&ps->smi_mutex); mutex_unlock(&ps->smi_mutex);
return ret; return ret;
...@@ -2867,16 +2859,15 @@ int mv88e6xxx_phy_page_write(struct dsa_switch *ds, int port, int page, ...@@ -2867,16 +2859,15 @@ int mv88e6xxx_phy_page_write(struct dsa_switch *ds, int port, int page,
int ret; int ret;
mutex_lock(&ps->smi_mutex); mutex_lock(&ps->smi_mutex);
ret = _mv88e6xxx_phy_page_write(ds, port, page, reg, val); ret = _mv88e6xxx_phy_page_write(ps, port, page, reg, val);
mutex_unlock(&ps->smi_mutex); mutex_unlock(&ps->smi_mutex);
return ret; return ret;
} }
static int mv88e6xxx_port_to_phy_addr(struct dsa_switch *ds, int port) static int mv88e6xxx_port_to_phy_addr(struct mv88e6xxx_priv_state *ps,
int port)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
if (port >= 0 && port < ps->info->num_ports) if (port >= 0 && port < ps->info->num_ports)
return port; return port;
return -EINVAL; return -EINVAL;
...@@ -2886,14 +2877,14 @@ int ...@@ -2886,14 +2877,14 @@ int
mv88e6xxx_phy_read(struct dsa_switch *ds, int port, int regnum) mv88e6xxx_phy_read(struct dsa_switch *ds, int port, int regnum)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
int addr = mv88e6xxx_port_to_phy_addr(ds, port); int addr = mv88e6xxx_port_to_phy_addr(ps, port);
int ret; int ret;
if (addr < 0) if (addr < 0)
return addr; return 0xffff;
mutex_lock(&ps->smi_mutex); mutex_lock(&ps->smi_mutex);
ret = _mv88e6xxx_phy_read(ds, addr, regnum); ret = _mv88e6xxx_phy_read(ps, addr, regnum);
mutex_unlock(&ps->smi_mutex); mutex_unlock(&ps->smi_mutex);
return ret; return ret;
} }
...@@ -2902,14 +2893,14 @@ int ...@@ -2902,14 +2893,14 @@ int
mv88e6xxx_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val) mv88e6xxx_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
int addr = mv88e6xxx_port_to_phy_addr(ds, port); int addr = mv88e6xxx_port_to_phy_addr(ps, port);
int ret; int ret;
if (addr < 0) if (addr < 0)
return addr; return 0xffff;
mutex_lock(&ps->smi_mutex); mutex_lock(&ps->smi_mutex);
ret = _mv88e6xxx_phy_write(ds, addr, regnum, val); ret = _mv88e6xxx_phy_write(ps, addr, regnum, val);
mutex_unlock(&ps->smi_mutex); mutex_unlock(&ps->smi_mutex);
return ret; return ret;
} }
...@@ -2918,14 +2909,14 @@ int ...@@ -2918,14 +2909,14 @@ int
mv88e6xxx_phy_read_indirect(struct dsa_switch *ds, int port, int regnum) mv88e6xxx_phy_read_indirect(struct dsa_switch *ds, int port, int regnum)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
int addr = mv88e6xxx_port_to_phy_addr(ds, port); int addr = mv88e6xxx_port_to_phy_addr(ps, port);
int ret; int ret;
if (addr < 0) if (addr < 0)
return addr; return 0xffff;
mutex_lock(&ps->smi_mutex); mutex_lock(&ps->smi_mutex);
ret = _mv88e6xxx_phy_read_indirect(ds, addr, regnum); ret = _mv88e6xxx_phy_read_indirect(ps, addr, regnum);
mutex_unlock(&ps->smi_mutex); mutex_unlock(&ps->smi_mutex);
return ret; return ret;
} }
...@@ -2935,14 +2926,14 @@ mv88e6xxx_phy_write_indirect(struct dsa_switch *ds, int port, int regnum, ...@@ -2935,14 +2926,14 @@ mv88e6xxx_phy_write_indirect(struct dsa_switch *ds, int port, int regnum,
u16 val) u16 val)
{ {
struct mv88e6xxx_priv_state *ps = ds_to_priv(ds); struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
int addr = mv88e6xxx_port_to_phy_addr(ds, port); int addr = mv88e6xxx_port_to_phy_addr(ps, port);
int ret; int ret;
if (addr < 0) if (addr < 0)
return addr; return addr;
mutex_lock(&ps->smi_mutex); mutex_lock(&ps->smi_mutex);
ret = _mv88e6xxx_phy_write_indirect(ds, addr, regnum, val); ret = _mv88e6xxx_phy_write_indirect(ps, addr, regnum, val);
mutex_unlock(&ps->smi_mutex); mutex_unlock(&ps->smi_mutex);
return ret; return ret;
} }
...@@ -2959,44 +2950,45 @@ static int mv88e61xx_get_temp(struct dsa_switch *ds, int *temp) ...@@ -2959,44 +2950,45 @@ static int mv88e61xx_get_temp(struct dsa_switch *ds, int *temp)
mutex_lock(&ps->smi_mutex); mutex_lock(&ps->smi_mutex);
ret = _mv88e6xxx_phy_write(ds, 0x0, 0x16, 0x6); ret = _mv88e6xxx_phy_write(ps, 0x0, 0x16, 0x6);
if (ret < 0) if (ret < 0)
goto error; goto error;
/* Enable temperature sensor */ /* Enable temperature sensor */
ret = _mv88e6xxx_phy_read(ds, 0x0, 0x1a); ret = _mv88e6xxx_phy_read(ps, 0x0, 0x1a);
if (ret < 0) if (ret < 0)
goto error; goto error;
ret = _mv88e6xxx_phy_write(ds, 0x0, 0x1a, ret | (1 << 5)); ret = _mv88e6xxx_phy_write(ps, 0x0, 0x1a, ret | (1 << 5));
if (ret < 0) if (ret < 0)
goto error; goto error;
/* Wait for temperature to stabilize */ /* Wait for temperature to stabilize */
usleep_range(10000, 12000); usleep_range(10000, 12000);
val = _mv88e6xxx_phy_read(ds, 0x0, 0x1a); val = _mv88e6xxx_phy_read(ps, 0x0, 0x1a);
if (val < 0) { if (val < 0) {
ret = val; ret = val;
goto error; goto error;
} }
/* Disable temperature sensor */ /* Disable temperature sensor */
ret = _mv88e6xxx_phy_write(ds, 0x0, 0x1a, ret & ~(1 << 5)); ret = _mv88e6xxx_phy_write(ps, 0x0, 0x1a, ret & ~(1 << 5));
if (ret < 0) if (ret < 0)
goto error; goto error;
*temp = ((val & 0x1f) - 5) * 5; *temp = ((val & 0x1f) - 5) * 5;
error: error:
_mv88e6xxx_phy_write(ds, 0x0, 0x16, 0x0); _mv88e6xxx_phy_write(ps, 0x0, 0x16, 0x0);
mutex_unlock(&ps->smi_mutex); mutex_unlock(&ps->smi_mutex);
return ret; return ret;
} }
static int mv88e63xx_get_temp(struct dsa_switch *ds, int *temp) static int mv88e63xx_get_temp(struct dsa_switch *ds, int *temp)
{ {
int phy = mv88e6xxx_6320_family(ds) ? 3 : 0; struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
int phy = mv88e6xxx_6320_family(ps) ? 3 : 0;
int ret; int ret;
*temp = 0; *temp = 0;
...@@ -3012,7 +3004,9 @@ static int mv88e63xx_get_temp(struct dsa_switch *ds, int *temp) ...@@ -3012,7 +3004,9 @@ static int mv88e63xx_get_temp(struct dsa_switch *ds, int *temp)
int mv88e6xxx_get_temp(struct dsa_switch *ds, int *temp) int mv88e6xxx_get_temp(struct dsa_switch *ds, int *temp)
{ {
if (mv88e6xxx_6320_family(ds) || mv88e6xxx_6352_family(ds)) struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
if (mv88e6xxx_6320_family(ps) || mv88e6xxx_6352_family(ps))
return mv88e63xx_get_temp(ds, temp); return mv88e63xx_get_temp(ds, temp);
return mv88e61xx_get_temp(ds, temp); return mv88e61xx_get_temp(ds, temp);
...@@ -3020,10 +3014,11 @@ int mv88e6xxx_get_temp(struct dsa_switch *ds, int *temp) ...@@ -3020,10 +3014,11 @@ int mv88e6xxx_get_temp(struct dsa_switch *ds, int *temp)
int mv88e6xxx_get_temp_limit(struct dsa_switch *ds, int *temp) int mv88e6xxx_get_temp_limit(struct dsa_switch *ds, int *temp)
{ {
int phy = mv88e6xxx_6320_family(ds) ? 3 : 0; struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
int phy = mv88e6xxx_6320_family(ps) ? 3 : 0;
int ret; int ret;
if (!mv88e6xxx_6320_family(ds) && !mv88e6xxx_6352_family(ds)) if (!mv88e6xxx_6320_family(ps) && !mv88e6xxx_6352_family(ps))
return -EOPNOTSUPP; return -EOPNOTSUPP;
*temp = 0; *temp = 0;
...@@ -3039,10 +3034,11 @@ int mv88e6xxx_get_temp_limit(struct dsa_switch *ds, int *temp) ...@@ -3039,10 +3034,11 @@ int mv88e6xxx_get_temp_limit(struct dsa_switch *ds, int *temp)
int mv88e6xxx_set_temp_limit(struct dsa_switch *ds, int temp) int mv88e6xxx_set_temp_limit(struct dsa_switch *ds, int temp)
{ {
int phy = mv88e6xxx_6320_family(ds) ? 3 : 0; struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
int phy = mv88e6xxx_6320_family(ps) ? 3 : 0;
int ret; int ret;
if (!mv88e6xxx_6320_family(ds) && !mv88e6xxx_6352_family(ds)) if (!mv88e6xxx_6320_family(ps) && !mv88e6xxx_6352_family(ps))
return -EOPNOTSUPP; return -EOPNOTSUPP;
ret = mv88e6xxx_phy_page_read(ds, phy, 6, 26); ret = mv88e6xxx_phy_page_read(ds, phy, 6, 26);
...@@ -3055,10 +3051,11 @@ int mv88e6xxx_set_temp_limit(struct dsa_switch *ds, int temp) ...@@ -3055,10 +3051,11 @@ int mv88e6xxx_set_temp_limit(struct dsa_switch *ds, int temp)
int mv88e6xxx_get_temp_alarm(struct dsa_switch *ds, bool *alarm) int mv88e6xxx_get_temp_alarm(struct dsa_switch *ds, bool *alarm)
{ {
int phy = mv88e6xxx_6320_family(ds) ? 3 : 0; struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
int phy = mv88e6xxx_6320_family(ps) ? 3 : 0;
int ret; int ret;
if (!mv88e6xxx_6320_family(ds) && !mv88e6xxx_6352_family(ds)) if (!mv88e6xxx_6320_family(ps) && !mv88e6xxx_6352_family(ps))
return -EOPNOTSUPP; return -EOPNOTSUPP;
*alarm = false; *alarm = false;
......
...@@ -388,6 +388,9 @@ struct mv88e6xxx_priv_state { ...@@ -388,6 +388,9 @@ struct mv88e6xxx_priv_state {
/* The dsa_switch this private structure is related to */ /* The dsa_switch this private structure is related to */
struct dsa_switch *ds; struct dsa_switch *ds;
/* The device this structure is associated to */
struct device *dev;
/* When using multi-chip addressing, this mutex protects /* When using multi-chip addressing, this mutex protects
* access to the indirect access registers. (In single-chip * access to the indirect access registers. (In single-chip
* mode, this mutex is effectively useless.) * mode, this mutex is effectively useless.)
...@@ -446,17 +449,18 @@ struct mv88e6xxx_hw_stat { ...@@ -446,17 +449,18 @@ struct mv88e6xxx_hw_stat {
enum stat_type type; enum stat_type type;
}; };
int mv88e6xxx_switch_reset(struct dsa_switch *ds, bool ppu_active); int mv88e6xxx_switch_reset(struct mv88e6xxx_priv_state *ps, bool ppu_active);
const char *mv88e6xxx_drv_probe(struct device *dsa_dev, struct device *host_dev, const char *mv88e6xxx_drv_probe(struct device *dsa_dev, struct device *host_dev,
int sw_addr, void **priv, int sw_addr, void **priv,
const struct mv88e6xxx_info *table, const struct mv88e6xxx_info *table,
unsigned int num); unsigned int num);
int mv88e6xxx_setup_ports(struct dsa_switch *ds); int mv88e6xxx_setup_ports(struct dsa_switch *ds);
int mv88e6xxx_setup_common(struct dsa_switch *ds); int mv88e6xxx_setup_common(struct mv88e6xxx_priv_state *ps);
int mv88e6xxx_setup_global(struct dsa_switch *ds); int mv88e6xxx_setup_global(struct dsa_switch *ds);
int mv88e6xxx_reg_read(struct dsa_switch *ds, int addr, int reg); int mv88e6xxx_reg_read(struct mv88e6xxx_priv_state *ps, int addr, int reg);
int mv88e6xxx_reg_write(struct dsa_switch *ds, int addr, int reg, u16 val); int mv88e6xxx_reg_write(struct mv88e6xxx_priv_state *ps, int addr,
int reg, u16 val);
int mv88e6xxx_set_addr_direct(struct dsa_switch *ds, u8 *addr); int mv88e6xxx_set_addr_direct(struct dsa_switch *ds, u8 *addr);
int mv88e6xxx_set_addr_indirect(struct dsa_switch *ds, u8 *addr); int mv88e6xxx_set_addr_indirect(struct dsa_switch *ds, u8 *addr);
int mv88e6xxx_phy_read(struct dsa_switch *ds, int port, int regnum); int mv88e6xxx_phy_read(struct dsa_switch *ds, int port, int regnum);
...@@ -464,7 +468,7 @@ int mv88e6xxx_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val); ...@@ -464,7 +468,7 @@ int mv88e6xxx_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val);
int mv88e6xxx_phy_read_indirect(struct dsa_switch *ds, int port, int regnum); int mv88e6xxx_phy_read_indirect(struct dsa_switch *ds, int port, int regnum);
int mv88e6xxx_phy_write_indirect(struct dsa_switch *ds, int port, int regnum, int mv88e6xxx_phy_write_indirect(struct dsa_switch *ds, int port, int regnum,
u16 val); u16 val);
void mv88e6xxx_ppu_state_init(struct dsa_switch *ds); void mv88e6xxx_ppu_state_init(struct mv88e6xxx_priv_state *ps);
int mv88e6xxx_phy_read_ppu(struct dsa_switch *ds, int addr, int regnum); int mv88e6xxx_phy_read_ppu(struct dsa_switch *ds, int addr, int regnum);
int mv88e6xxx_phy_write_ppu(struct dsa_switch *ds, int addr, int mv88e6xxx_phy_write_ppu(struct dsa_switch *ds, int addr,
int regnum, u16 val); int regnum, u16 val);
......
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