Commit 16acc0cd authored by Zach Brown's avatar Zach Brown Committed by Linus Torvalds

[PATCH] x86_64: align per-cpu section to configured cache bytes

Align the start of the per-cpu section to the configured number of bytes in a
cache line.  This stops a BUG_ON() from triggering in load_module() when
DEFINE_PER_CPU() is used in a module and the section isn't cacheline-aligned.
Rusty also found this and sent a patch in a while ago
(http://lkml.org/lkml/2004/10/19/17), I don't know what came of that.
Signed-off-by: default avatarZach Brown <zach.brown@oracle.com>
Signed-off-by: default avatarAndi Kleen <ak@suse.de>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent a1002a48
...@@ -173,7 +173,7 @@ SECTIONS ...@@ -173,7 +173,7 @@ SECTIONS
__initramfs_start = .; __initramfs_start = .;
.init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) { *(.init.ramfs) } .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) { *(.init.ramfs) }
__initramfs_end = .; __initramfs_end = .;
. = ALIGN(32); . = ALIGN(CONFIG_X86_L1_CACHE_BYTES);
__per_cpu_start = .; __per_cpu_start = .;
.data.percpu : AT(ADDR(.data.percpu) - LOAD_OFFSET) { *(.data.percpu) } .data.percpu : AT(ADDR(.data.percpu) - LOAD_OFFSET) { *(.data.percpu) }
__per_cpu_end = .; __per_cpu_end = .;
......
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