Commit 17f3f99f authored by Russell King's avatar Russell King

ARM: l2c: write auxctrl register before unlocking

We should write the auxillary control register before unlocking: the
write may be necessary to enable non-secure access to the lock
registers.
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 3b8bad57
...@@ -92,10 +92,10 @@ static void l2c_enable(void __iomem *base, u32 aux, unsigned num_lock) ...@@ -92,10 +92,10 @@ static void l2c_enable(void __iomem *base, u32 aux, unsigned num_lock)
{ {
unsigned long flags; unsigned long flags;
l2c_unlock(base, num_lock);
writel_relaxed(aux, base + L2X0_AUX_CTRL); writel_relaxed(aux, base + L2X0_AUX_CTRL);
l2c_unlock(base, num_lock);
local_irq_save(flags); local_irq_save(flags);
__l2c_op_way(base + L2X0_INV_WAY); __l2c_op_way(base + L2X0_INV_WAY);
writel_relaxed(0, base + sync_reg_offset); writel_relaxed(0, base + sync_reg_offset);
...@@ -368,12 +368,12 @@ static void l2x0_unlock(u32 cache_id) ...@@ -368,12 +368,12 @@ static void l2x0_unlock(u32 cache_id)
static void l2x0_enable(void __iomem *base, u32 aux, unsigned num_lock) static void l2x0_enable(void __iomem *base, u32 aux, unsigned num_lock)
{ {
/* Make sure that I&D is not locked down when starting */
l2x0_unlock(readl_relaxed(base + L2X0_CACHE_ID));
/* l2x0 controller is disabled */ /* l2x0 controller is disabled */
writel_relaxed(aux, base + L2X0_AUX_CTRL); writel_relaxed(aux, base + L2X0_AUX_CTRL);
/* Make sure that I&D is not locked down when starting */
l2x0_unlock(readl_relaxed(base + L2X0_CACHE_ID));
l2x0_inv_all(); l2x0_inv_all();
/* enable L2X0 */ /* enable L2X0 */
......
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