Commit 1a5fe3ca authored by Archit Taneja's avatar Archit Taneja Committed by Benoit Cousson

ARM: dts: omap4+: Add DMM bindings

Add Dynamic Memory Manager (DMM) bindings for OMAP4 and OMAP5 and DRA7x devices.
DMM only requires address and irq information.

Add documentation for the DMM bindings.

Originally worked on by Andy Gross <andygro@gmail.com>

Cc: Andy Gross <andygro@gmail.com>
Signed-off-by: default avatarArchit Taneja <archit@ti.com>
Signed-off-by: default avatarBenoit Cousson <bcousson@baylibre.com>
parent 51724dbb
OMAP Dynamic Memory Manager (DMM) bindings
The dynamic memory manager (DMM) is a module located immediately in front of the
SDRAM controllers (called EMIFs on OMAP). DMM manages various aspects of memory
accesses such as priority generation amongst initiators, configuration of SDRAM
interleaving, optimizing transfer of 2D block objects, and provide MMU-like page
translation for initiators which need contiguous dma bus addresses.
Required properties:
- compatible: Should contain "ti,omap4-dmm" for OMAP4 family
Should contain "ti,omap5-dmm" for OMAP5 and DRA7x family
- reg: Contains DMM register address range (base address and length)
- interrupts: Should contain an interrupt-specifier for DMM_IRQ.
- ti,hwmods: Name of the hwmod associated to DMM, which is typically "dmm"
Example:
dmm@4e000000 {
compatible = "ti,omap4-dmm";
reg = <0x4e000000 0x800>;
ti,hwmods = "dmm";
};
...@@ -464,6 +464,13 @@ wdt2: wdt@4ae14000 { ...@@ -464,6 +464,13 @@ wdt2: wdt@4ae14000 {
ti,hwmods = "wd_timer2"; ti,hwmods = "wd_timer2";
}; };
dmm@4e000000 {
compatible = "ti,omap5-dmm";
reg = <0x4e000000 0x800>;
interrupts = <0 113 0x4>;
ti,hwmods = "dmm";
};
i2c1: i2c@48070000 { i2c1: i2c@48070000 {
compatible = "ti,omap4-i2c"; compatible = "ti,omap4-i2c";
reg = <0x48070000 0x100>; reg = <0x48070000 0x100>;
......
...@@ -554,6 +554,13 @@ keypad: keypad@4a31c000 { ...@@ -554,6 +554,13 @@ keypad: keypad@4a31c000 {
ti,hwmods = "kbd"; ti,hwmods = "kbd";
}; };
dmm@4e000000 {
compatible = "ti,omap4-dmm";
reg = <0x4e000000 0x800>;
interrupts = <0 113 0x4>;
ti,hwmods = "dmm";
};
emif1: emif@4c000000 { emif1: emif@4c000000 {
compatible = "ti,emif-4d"; compatible = "ti,emif-4d";
reg = <0x4c000000 0x100>; reg = <0x4c000000 0x100>;
......
...@@ -683,6 +683,13 @@ wdt2: wdt@4ae14000 { ...@@ -683,6 +683,13 @@ wdt2: wdt@4ae14000 {
ti,hwmods = "wd_timer2"; ti,hwmods = "wd_timer2";
}; };
dmm@4e000000 {
compatible = "ti,omap5-dmm";
reg = <0x4e000000 0x800>;
interrupts = <0 113 0x4>;
ti,hwmods = "dmm";
};
emif1: emif@4c000000 { emif1: emif@4c000000 {
compatible = "ti,emif-4d5"; compatible = "ti,emif-4d5";
ti,hwmods = "emif1"; ti,hwmods = "emif1";
......
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