Commit 1b4bd5c4 authored by Chris Wilson's avatar Chris Wilson

drm/i915: Limit the for_each_set_bit() to the valid range

Let static analyzers (smatch) know that we are not going to wander off
the end of the array by providing a tight upper bound:

drivers/gpu/drm/i915/intel_display.c:9532 hsw_get_transcoder_state() error: buffer overflow 'dev_priv->__info.trans_offsets' 6 <= 31

References: 0716931a ("drm/i915/icl: fix transcoder state readout")
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Madhav Chauhan <madhav.chauhan@intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190116155421.7660-1-chris@chris-wilson.co.uk
parent c4aa2eca
...@@ -9526,7 +9526,9 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc, ...@@ -9526,7 +9526,9 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
* XXX: Do intel_display_power_get_if_enabled before reading this (for * XXX: Do intel_display_power_get_if_enabled before reading this (for
* consistency and less surprising code; it's in always on power). * consistency and less surprising code; it's in always on power).
*/ */
for_each_set_bit(panel_transcoder, &panel_transcoder_mask, 32) { for_each_set_bit(panel_transcoder,
&panel_transcoder_mask,
ARRAY_SIZE(INTEL_INFO(dev_priv)->trans_offsets)) {
enum pipe trans_pipe; enum pipe trans_pipe;
tmp = I915_READ(TRANS_DDI_FUNC_CTL(panel_transcoder)); tmp = I915_READ(TRANS_DDI_FUNC_CTL(panel_transcoder));
......
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