Commit 1b556783 authored by Jesse Brandeburg's avatar Jesse Brandeburg Committed by Jeff Kirsher

igb: implement 580 MDI setting support

In order for igb to support MDI setting support via
ethtool this code is needed to allow setting the MDI state
via software.

This is in regards to the related ethtool patch
Signed-off-by: default avatarJesse Brandeburg <jesse.brandeburg@intel.com>
Tested-by: Aaron Brown aaron.f.brown@intel.com
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent e86fd891
...@@ -464,6 +464,32 @@ s32 igb_copper_link_setup_82580(struct e1000_hw *hw) ...@@ -464,6 +464,32 @@ s32 igb_copper_link_setup_82580(struct e1000_hw *hw)
phy_data |= I82580_CFG_ENABLE_DOWNSHIFT; phy_data |= I82580_CFG_ENABLE_DOWNSHIFT;
ret_val = phy->ops.write_reg(hw, I82580_CFG_REG, phy_data); ret_val = phy->ops.write_reg(hw, I82580_CFG_REG, phy_data);
if (ret_val)
goto out;
/* Set MDI/MDIX mode */
ret_val = phy->ops.read_reg(hw, I82580_PHY_CTRL_2, &phy_data);
if (ret_val)
goto out;
phy_data &= ~I82580_PHY_CTRL2_MDIX_CFG_MASK;
/*
* Options:
* 0 - Auto (default)
* 1 - MDI mode
* 2 - MDI-X mode
*/
switch (hw->phy.mdix) {
case 1:
break;
case 2:
phy_data |= I82580_PHY_CTRL2_MANUAL_MDIX;
break;
case 0:
default:
phy_data |= I82580_PHY_CTRL2_AUTO_MDI_MDIX;
break;
}
ret_val = hw->phy.ops.write_reg(hw, I82580_PHY_CTRL_2, phy_data);
out: out:
return ret_val; return ret_val;
...@@ -2246,8 +2272,7 @@ s32 igb_phy_force_speed_duplex_82580(struct e1000_hw *hw) ...@@ -2246,8 +2272,7 @@ s32 igb_phy_force_speed_duplex_82580(struct e1000_hw *hw)
if (ret_val) if (ret_val)
goto out; goto out;
phy_data &= ~I82580_PHY_CTRL2_AUTO_MDIX; phy_data &= ~I82580_PHY_CTRL2_MDIX_CFG_MASK;
phy_data &= ~I82580_PHY_CTRL2_FORCE_MDI_MDIX;
ret_val = phy->ops.write_reg(hw, I82580_PHY_CTRL_2, phy_data); ret_val = phy->ops.write_reg(hw, I82580_PHY_CTRL_2, phy_data);
if (ret_val) if (ret_val)
......
...@@ -111,8 +111,9 @@ s32 igb_check_polarity_m88(struct e1000_hw *hw); ...@@ -111,8 +111,9 @@ s32 igb_check_polarity_m88(struct e1000_hw *hw);
#define I82580_PHY_STATUS2_SPEED_100MBPS 0x0100 #define I82580_PHY_STATUS2_SPEED_100MBPS 0x0100
/* I82580 PHY Control 2 */ /* I82580 PHY Control 2 */
#define I82580_PHY_CTRL2_AUTO_MDIX 0x0400 #define I82580_PHY_CTRL2_MANUAL_MDIX 0x0200
#define I82580_PHY_CTRL2_FORCE_MDI_MDIX 0x0200 #define I82580_PHY_CTRL2_AUTO_MDI_MDIX 0x0400
#define I82580_PHY_CTRL2_MDIX_CFG_MASK 0x0600
/* I82580 PHY Diagnostics Status */ /* I82580 PHY Diagnostics Status */
#define I82580_DSTATUS_CABLE_LENGTH 0x03FC #define I82580_DSTATUS_CABLE_LENGTH 0x03FC
......
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