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Commit 1bd2e5ae authored by Olof Johansson's avatar Olof Johansson Committed by Paul Mackerras
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[POWERPC] Add PMC type to cputable 

Add cputable entries for which type of PMC implementation the processor
has.

I've only filled in the current 64-bit processors, the unfilled default
value will have same behaviour as before so it can be done over time
as needed.

Also tidy up the dummy_perf implementation a bit, aggregating it into
one function with ifdefs instead of several.
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
parent c69b767a
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Showing with 33 additions and 26 deletions
arch/powerpc/kernel/cputable.c
View file @ 1bd2e5ae
...@@ -86,6 +86,7 @@ static struct cpu_spec cpu_specs[] = { ...@@ -86,6 +86,7 @@ static struct cpu_spec cpu_specs[] = {
.icache_bsize = 128, .icache_bsize = 128,
.dcache_bsize = 128, .dcache_bsize = 128,
.num_pmcs = 8, .num_pmcs = 8,
.pmc_type = PPC_PMC_IBM,
.oprofile_cpu_type = "ppc64/power3", .oprofile_cpu_type = "ppc64/power3",
.oprofile_type = PPC_OPROFILE_RS64, .oprofile_type = PPC_OPROFILE_RS64,
.platform = "power3", .platform = "power3",
...@@ -99,6 +100,7 @@ static struct cpu_spec cpu_specs[] = { ...@@ -99,6 +100,7 @@ static struct cpu_spec cpu_specs[] = {
.icache_bsize = 128, .icache_bsize = 128,
.dcache_bsize = 128, .dcache_bsize = 128,
.num_pmcs = 8, .num_pmcs = 8,
.pmc_type = PPC_PMC_IBM,
.oprofile_cpu_type = "ppc64/power3", .oprofile_cpu_type = "ppc64/power3",
.oprofile_type = PPC_OPROFILE_RS64, .oprofile_type = PPC_OPROFILE_RS64,
.platform = "power3", .platform = "power3",
...@@ -112,6 +114,7 @@ static struct cpu_spec cpu_specs[] = { ...@@ -112,6 +114,7 @@ static struct cpu_spec cpu_specs[] = {
.icache_bsize = 128, .icache_bsize = 128,
.dcache_bsize = 128, .dcache_bsize = 128,
.num_pmcs = 8, .num_pmcs = 8,
.pmc_type = PPC_PMC_IBM,
.oprofile_cpu_type = "ppc64/rs64", .oprofile_cpu_type = "ppc64/rs64",
.oprofile_type = PPC_OPROFILE_RS64, .oprofile_type = PPC_OPROFILE_RS64,
.platform = "rs64", .platform = "rs64",
...@@ -125,6 +128,7 @@ static struct cpu_spec cpu_specs[] = { ...@@ -125,6 +128,7 @@ static struct cpu_spec cpu_specs[] = {
.icache_bsize = 128, .icache_bsize = 128,
.dcache_bsize = 128, .dcache_bsize = 128,
.num_pmcs = 8, .num_pmcs = 8,
.pmc_type = PPC_PMC_IBM,
.oprofile_cpu_type = "ppc64/rs64", .oprofile_cpu_type = "ppc64/rs64",
.oprofile_type = PPC_OPROFILE_RS64, .oprofile_type = PPC_OPROFILE_RS64,
.platform = "rs64", .platform = "rs64",
...@@ -138,6 +142,7 @@ static struct cpu_spec cpu_specs[] = { ...@@ -138,6 +142,7 @@ static struct cpu_spec cpu_specs[] = {
.icache_bsize = 128, .icache_bsize = 128,
.dcache_bsize = 128, .dcache_bsize = 128,
.num_pmcs = 8, .num_pmcs = 8,
.pmc_type = PPC_PMC_IBM,
.oprofile_cpu_type = "ppc64/rs64", .oprofile_cpu_type = "ppc64/rs64",
.oprofile_type = PPC_OPROFILE_RS64, .oprofile_type = PPC_OPROFILE_RS64,
.platform = "rs64", .platform = "rs64",
...@@ -151,6 +156,7 @@ static struct cpu_spec cpu_specs[] = { ...@@ -151,6 +156,7 @@ static struct cpu_spec cpu_specs[] = {
.icache_bsize = 128, .icache_bsize = 128,
.dcache_bsize = 128, .dcache_bsize = 128,
.num_pmcs = 8, .num_pmcs = 8,
.pmc_type = PPC_PMC_IBM,
.oprofile_cpu_type = "ppc64/rs64", .oprofile_cpu_type = "ppc64/rs64",
.oprofile_type = PPC_OPROFILE_RS64, .oprofile_type = PPC_OPROFILE_RS64,
.platform = "rs64", .platform = "rs64",
...@@ -164,6 +170,7 @@ static struct cpu_spec cpu_specs[] = { ...@@ -164,6 +170,7 @@ static struct cpu_spec cpu_specs[] = {
.icache_bsize = 128, .icache_bsize = 128,
.dcache_bsize = 128, .dcache_bsize = 128,
.num_pmcs = 8, .num_pmcs = 8,
.pmc_type = PPC_PMC_IBM,
.oprofile_cpu_type = "ppc64/power4", .oprofile_cpu_type = "ppc64/power4",
.oprofile_type = PPC_OPROFILE_POWER4, .oprofile_type = PPC_OPROFILE_POWER4,
.platform = "power4", .platform = "power4",
...@@ -177,6 +184,7 @@ static struct cpu_spec cpu_specs[] = { ...@@ -177,6 +184,7 @@ static struct cpu_spec cpu_specs[] = {
.icache_bsize = 128, .icache_bsize = 128,
.dcache_bsize = 128, .dcache_bsize = 128,
.num_pmcs = 8, .num_pmcs = 8,
.pmc_type = PPC_PMC_IBM,
.oprofile_cpu_type = "ppc64/power4", .oprofile_cpu_type = "ppc64/power4",
.oprofile_type = PPC_OPROFILE_POWER4, .oprofile_type = PPC_OPROFILE_POWER4,
.platform = "power4", .platform = "power4",
...@@ -191,6 +199,7 @@ static struct cpu_spec cpu_specs[] = { ...@@ -191,6 +199,7 @@ static struct cpu_spec cpu_specs[] = {
.icache_bsize = 128, .icache_bsize = 128,
.dcache_bsize = 128, .dcache_bsize = 128,
.num_pmcs = 8, .num_pmcs = 8,
.pmc_type = PPC_PMC_IBM,
.cpu_setup = __setup_cpu_ppc970, .cpu_setup = __setup_cpu_ppc970,
.cpu_restore = __restore_cpu_ppc970, .cpu_restore = __restore_cpu_ppc970,
.oprofile_cpu_type = "ppc64/970", .oprofile_cpu_type = "ppc64/970",
...@@ -207,6 +216,7 @@ static struct cpu_spec cpu_specs[] = { ...@@ -207,6 +216,7 @@ static struct cpu_spec cpu_specs[] = {
.icache_bsize = 128, .icache_bsize = 128,
.dcache_bsize = 128, .dcache_bsize = 128,
.num_pmcs = 8, .num_pmcs = 8,
.pmc_type = PPC_PMC_IBM,
.cpu_setup = __setup_cpu_ppc970, .cpu_setup = __setup_cpu_ppc970,
.cpu_restore = __restore_cpu_ppc970, .cpu_restore = __restore_cpu_ppc970,
.oprofile_cpu_type = "ppc64/970", .oprofile_cpu_type = "ppc64/970",
...@@ -239,6 +249,7 @@ static struct cpu_spec cpu_specs[] = { ...@@ -239,6 +249,7 @@ static struct cpu_spec cpu_specs[] = {
.icache_bsize = 128, .icache_bsize = 128,
.dcache_bsize = 128, .dcache_bsize = 128,
.num_pmcs = 8, .num_pmcs = 8,
.pmc_type = PPC_PMC_IBM,
.cpu_setup = __setup_cpu_ppc970, .cpu_setup = __setup_cpu_ppc970,
.oprofile_cpu_type = "ppc64/970", .oprofile_cpu_type = "ppc64/970",
.oprofile_type = PPC_OPROFILE_POWER4, .oprofile_type = PPC_OPROFILE_POWER4,
...@@ -253,6 +264,7 @@ static struct cpu_spec cpu_specs[] = { ...@@ -253,6 +264,7 @@ static struct cpu_spec cpu_specs[] = {
.icache_bsize = 128, .icache_bsize = 128,
.dcache_bsize = 128, .dcache_bsize = 128,
.num_pmcs = 6, .num_pmcs = 6,
.pmc_type = PPC_PMC_IBM,
.oprofile_cpu_type = "ppc64/power5", .oprofile_cpu_type = "ppc64/power5",
.oprofile_type = PPC_OPROFILE_POWER4, .oprofile_type = PPC_OPROFILE_POWER4,
/* SIHV / SIPR bits are implemented on POWER4+ (GQ) /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
...@@ -271,6 +283,7 @@ static struct cpu_spec cpu_specs[] = { ...@@ -271,6 +283,7 @@ static struct cpu_spec cpu_specs[] = {
.icache_bsize = 128, .icache_bsize = 128,
.dcache_bsize = 128, .dcache_bsize = 128,
.num_pmcs = 6, .num_pmcs = 6,
.pmc_type = PPC_PMC_IBM,
.oprofile_cpu_type = "ppc64/power5+", .oprofile_cpu_type = "ppc64/power5+",
.oprofile_type = PPC_OPROFILE_POWER4, .oprofile_type = PPC_OPROFILE_POWER4,
.oprofile_mmcra_sihv = MMCRA_SIHV, .oprofile_mmcra_sihv = MMCRA_SIHV,
...@@ -321,6 +334,7 @@ static struct cpu_spec cpu_specs[] = { ...@@ -321,6 +334,7 @@ static struct cpu_spec cpu_specs[] = {
.icache_bsize = 128, .icache_bsize = 128,
.dcache_bsize = 128, .dcache_bsize = 128,
.num_pmcs = 6, .num_pmcs = 6,
.pmc_type = PPC_PMC_IBM,
.oprofile_cpu_type = "ppc64/power6", .oprofile_cpu_type = "ppc64/power6",
.oprofile_type = PPC_OPROFILE_POWER4, .oprofile_type = PPC_OPROFILE_POWER4,
.oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
...@@ -340,6 +354,7 @@ static struct cpu_spec cpu_specs[] = { ...@@ -340,6 +354,7 @@ static struct cpu_spec cpu_specs[] = {
.icache_bsize = 128, .icache_bsize = 128,
.dcache_bsize = 128, .dcache_bsize = 128,
.num_pmcs = 4, .num_pmcs = 4,
.pmc_type = PPC_PMC_IBM,
.oprofile_cpu_type = "ppc64/cell-be", .oprofile_cpu_type = "ppc64/cell-be",
.oprofile_type = PPC_OPROFILE_CELL, .oprofile_type = PPC_OPROFILE_CELL,
.platform = "ppc-cell-be", .platform = "ppc-cell-be",
...@@ -353,6 +368,7 @@ static struct cpu_spec cpu_specs[] = { ...@@ -353,6 +368,7 @@ static struct cpu_spec cpu_specs[] = {
.icache_bsize = 64, .icache_bsize = 64,
.dcache_bsize = 64, .dcache_bsize = 64,
.num_pmcs = 6, .num_pmcs = 6,
.pmc_type = PPC_PMC_PA6T,
.platform = "pa6t", .platform = "pa6t",
}, },
{ /* default match */ { /* default match */
...@@ -364,6 +380,7 @@ static struct cpu_spec cpu_specs[] = { ...@@ -364,6 +380,7 @@ static struct cpu_spec cpu_specs[] = {
.icache_bsize = 128, .icache_bsize = 128,
.dcache_bsize = 128, .dcache_bsize = 128,
.num_pmcs = 6, .num_pmcs = 6,
.pmc_type = PPC_PMC_IBM,
.platform = "power4", .platform = "power4",
} }
#endif /* CONFIG_PPC64 */ #endif /* CONFIG_PPC64 */
......
arch/powerpc/kernel/pmc.c
View file @ 1bd2e5ae
...@@ -19,38 +19,21 @@ ...@@ -19,38 +19,21 @@
#include <asm/processor.h> #include <asm/processor.h>
#include <asm/pmc.h> #include <asm/pmc.h>
#if defined(CONFIG_FSL_BOOKE) && !defined(CONFIG_E200) #ifndef MMCR0_PMA0
static void dummy_perf(struct pt_regs *regs) #define MMCR0_PMA0 0
{
unsigned int pmgc0 = mfpmr(PMRN_PMGC0);
pmgc0 &= ~PMGC0_PMIE;
mtpmr(PMRN_PMGC0, pmgc0);
}
#elif defined(CONFIG_PPC64) || defined(CONFIG_6xx)
#ifndef MMCR0_PMAO
#define MMCR0_PMAO 0
#endif #endif
/* Ensure exceptions are disabled */
static void dummy_perf(struct pt_regs *regs) static void dummy_perf(struct pt_regs *regs)
{ {
unsigned int mmcr0 = mfspr(SPRN_MMCR0); #if defined(CONFIG_FSL_BOOKE) && !defined(CONFIG_E200)
mtpmr(PMRN_PMGC0, mfpmr(PMRN_PMGC0) & ~PMGC0_PMIE);
mmcr0 &= ~(MMCR0_PMXE|MMCR0_PMAO); #elif defined(CONFIG_PPC64) || defined(CONFIG_6xx)
mtspr(SPRN_MMCR0, mmcr0); mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~(MMCR0_PMXE|MMCR0_PMA0));
}
#else #else
/* Ensure exceptions are disabled */ mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~MMCR0_PMXE);
static void dummy_perf(struct pt_regs *regs)
{
unsigned int mmcr0 = mfspr(SPRN_MMCR0);
mmcr0 &= ~(MMCR0_PMXE);
mtspr(SPRN_MMCR0, mmcr0);
}
#endif #endif
}
static DEFINE_SPINLOCK(pmc_owner_lock); static DEFINE_SPINLOCK(pmc_owner_lock);
static void *pmc_owner_caller; /* mostly for debugging */ static void *pmc_owner_caller; /* mostly for debugging */
......
include/asm-powerpc/cputable.h
View file @ 1bd2e5ae
...@@ -50,6 +50,12 @@ enum powerpc_oprofile_type { ...@@ -50,6 +50,12 @@ enum powerpc_oprofile_type {
PPC_OPROFILE_CELL = 5, PPC_OPROFILE_CELL = 5,
}; };
enum powerpc_pmc_type {
PPC_PMC_DEFAULT = 0,
PPC_PMC_IBM = 1,
PPC_PMC_PA6T = 2,
};
struct cpu_spec { struct cpu_spec {
/* CPU is matched via (PVR & pvr_mask) == pvr_value */ /* CPU is matched via (PVR & pvr_mask) == pvr_value */
unsigned int pvr_mask; unsigned int pvr_mask;
...@@ -65,6 +71,7 @@ struct cpu_spec { ...@@ -65,6 +71,7 @@ struct cpu_spec {
/* number of performance monitor counters */ /* number of performance monitor counters */
unsigned int num_pmcs; unsigned int num_pmcs;
enum powerpc_pmc_type pmc_type;
/* this is called to initialize various CPU bits like L1 cache, /* this is called to initialize various CPU bits like L1 cache,
* BHT, SPD, etc... from head.S before branching to identify_machine * BHT, SPD, etc... from head.S before branching to identify_machine
......
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