Commit 1bd8e27f authored by Claudiu Beznea's avatar Claudiu Beznea Committed by Stephen Boyd

clk: at91: clk-sam9x60-pll: fix return value check

sam9x60_frac_pll_compute_mul_frac() can't return zero. Remove the check
against zero to reflect this.

Fixes: 43b1bb4a ("clk: at91: clk-sam9x60-pll: re-factor to support plls with multiple outputs")
Reported-by: default avatarDan Carpenter <error27@gmail.com>
Signed-off-by: default avatarClaudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230227105931.2812412-1-claudiu.beznea@microchip.comSigned-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 7e626a08
......@@ -668,7 +668,7 @@ sam9x60_clk_register_frac_pll(struct regmap *regmap, spinlock_t *lock,
ret = sam9x60_frac_pll_compute_mul_frac(&frac->core, FCORE_MIN,
parent_rate, true);
if (ret <= 0) {
if (ret < 0) {
hw = ERR_PTR(ret);
goto free;
}
......
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