Commit 1bef84af authored by Dave Airlie's avatar Dave Airlie

Merge tag 'drm-intel-next-fixes-2023-05-04-1' of...

Merge tag 'drm-intel-next-fixes-2023-05-04-1' of git://anongit.freedesktop.org/drm/drm-intel into drm-next

Add missing GPU transcoder masks for MTL and fix DSI power on sequence
for Nextbook Ares 8A. Fix GuC version corner case.
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ZFOskabVuN45dNaA@jlahtine-mobl.ger.corp.intel.com
parents f4c41a7f c8c2969b
...@@ -1140,7 +1140,7 @@ static void gen11_dsi_powerup_panel(struct intel_encoder *encoder) ...@@ -1140,7 +1140,7 @@ static void gen11_dsi_powerup_panel(struct intel_encoder *encoder)
/* panel power on related mipi dsi vbt sequences */ /* panel power on related mipi dsi vbt sequences */
intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_POWER_ON); intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_POWER_ON);
intel_dsi_msleep(intel_dsi, intel_dsi->panel_on_delay); msleep(intel_dsi->panel_on_delay);
intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DEASSERT_RESET); intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DEASSERT_RESET);
intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_INIT_OTP); intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_INIT_OTP);
intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DISPLAY_ON); intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DISPLAY_ON);
......
...@@ -763,17 +763,6 @@ void intel_dsi_vbt_exec_sequence(struct intel_dsi *intel_dsi, ...@@ -763,17 +763,6 @@ void intel_dsi_vbt_exec_sequence(struct intel_dsi *intel_dsi,
gpiod_set_value_cansleep(intel_dsi->gpio_backlight, 0); gpiod_set_value_cansleep(intel_dsi->gpio_backlight, 0);
} }
void intel_dsi_msleep(struct intel_dsi *intel_dsi, int msec)
{
struct intel_connector *connector = intel_dsi->attached_connector;
/* For v3 VBTs in vid-mode the delays are part of the VBT sequences */
if (is_vid_mode(intel_dsi) && connector->panel.vbt.dsi.seq_version >= 3)
return;
msleep(msec);
}
void intel_dsi_log_params(struct intel_dsi *intel_dsi) void intel_dsi_log_params(struct intel_dsi *intel_dsi)
{ {
struct drm_i915_private *i915 = to_i915(intel_dsi->base.base.dev); struct drm_i915_private *i915 = to_i915(intel_dsi->base.base.dev);
......
...@@ -16,7 +16,6 @@ void intel_dsi_vbt_gpio_init(struct intel_dsi *intel_dsi, bool panel_is_on); ...@@ -16,7 +16,6 @@ void intel_dsi_vbt_gpio_init(struct intel_dsi *intel_dsi, bool panel_is_on);
void intel_dsi_vbt_gpio_cleanup(struct intel_dsi *intel_dsi); void intel_dsi_vbt_gpio_cleanup(struct intel_dsi *intel_dsi);
void intel_dsi_vbt_exec_sequence(struct intel_dsi *intel_dsi, void intel_dsi_vbt_exec_sequence(struct intel_dsi *intel_dsi,
enum mipi_seq seq_id); enum mipi_seq seq_id);
void intel_dsi_msleep(struct intel_dsi *intel_dsi, int msec);
void intel_dsi_log_params(struct intel_dsi *intel_dsi); void intel_dsi_log_params(struct intel_dsi *intel_dsi);
#endif /* __INTEL_DSI_VBT_H__ */ #endif /* __INTEL_DSI_VBT_H__ */
...@@ -737,7 +737,6 @@ static void intel_dsi_pre_enable(struct intel_atomic_state *state, ...@@ -737,7 +737,6 @@ static void intel_dsi_pre_enable(struct intel_atomic_state *state,
{ {
struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder); struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
struct intel_connector *connector = to_intel_connector(conn_state->connector);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe; enum pipe pipe = crtc->pipe;
enum port port; enum port port;
...@@ -779,21 +778,10 @@ static void intel_dsi_pre_enable(struct intel_atomic_state *state, ...@@ -779,21 +778,10 @@ static void intel_dsi_pre_enable(struct intel_atomic_state *state,
if (!IS_GEMINILAKE(dev_priv)) if (!IS_GEMINILAKE(dev_priv))
intel_dsi_prepare(encoder, pipe_config); intel_dsi_prepare(encoder, pipe_config);
/* Give the panel time to power-on and then deassert its reset */
intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_POWER_ON); intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_POWER_ON);
/*
* Give the panel time to power-on and then deassert its reset.
* Depending on the VBT MIPI sequences version the deassert-seq
* may contain the necessary delay, intel_dsi_msleep() will skip
* the delay in that case. If there is no deassert-seq, then an
* unconditional msleep is used to give the panel time to power-on.
*/
if (connector->panel.vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET]) {
intel_dsi_msleep(intel_dsi, intel_dsi->panel_on_delay);
intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DEASSERT_RESET);
} else {
msleep(intel_dsi->panel_on_delay); msleep(intel_dsi->panel_on_delay);
} intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DEASSERT_RESET);
if (IS_GEMINILAKE(dev_priv)) { if (IS_GEMINILAKE(dev_priv)) {
glk_cold_boot = glk_dsi_enable_io(encoder); glk_cold_boot = glk_dsi_enable_io(encoder);
...@@ -827,7 +815,7 @@ static void intel_dsi_pre_enable(struct intel_atomic_state *state, ...@@ -827,7 +815,7 @@ static void intel_dsi_pre_enable(struct intel_atomic_state *state,
msleep(20); /* XXX */ msleep(20); /* XXX */
for_each_dsi_port(port, intel_dsi->ports) for_each_dsi_port(port, intel_dsi->ports)
dpi_send_cmd(intel_dsi, TURN_ON, false, port); dpi_send_cmd(intel_dsi, TURN_ON, false, port);
intel_dsi_msleep(intel_dsi, 100); msleep(100);
intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DISPLAY_ON); intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DISPLAY_ON);
...@@ -949,7 +937,7 @@ static void intel_dsi_post_disable(struct intel_atomic_state *state, ...@@ -949,7 +937,7 @@ static void intel_dsi_post_disable(struct intel_atomic_state *state,
/* Assert reset */ /* Assert reset */
intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_ASSERT_RESET); intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_ASSERT_RESET);
intel_dsi_msleep(intel_dsi, intel_dsi->panel_off_delay); msleep(intel_dsi->panel_off_delay);
intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_POWER_OFF); intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_POWER_OFF);
intel_dsi->panel_power_off_time = ktime_get_boottime(); intel_dsi->panel_power_off_time = ktime_get_boottime();
......
...@@ -635,9 +635,10 @@ static bool is_ver_8bit(struct intel_uc_fw_ver *ver) ...@@ -635,9 +635,10 @@ static bool is_ver_8bit(struct intel_uc_fw_ver *ver)
return ver->major < 0xFF && ver->minor < 0xFF && ver->patch < 0xFF; return ver->major < 0xFF && ver->minor < 0xFF && ver->patch < 0xFF;
} }
static bool guc_check_version_range(struct intel_uc_fw *uc_fw) static int guc_check_version_range(struct intel_uc_fw *uc_fw)
{ {
struct intel_guc *guc = container_of(uc_fw, struct intel_guc, fw); struct intel_guc *guc = container_of(uc_fw, struct intel_guc, fw);
struct intel_gt *gt = __uc_fw_to_gt(uc_fw);
/* /*
* GuC version number components are defined as being 8-bits. * GuC version number components are defined as being 8-bits.
...@@ -646,24 +647,24 @@ static bool guc_check_version_range(struct intel_uc_fw *uc_fw) ...@@ -646,24 +647,24 @@ static bool guc_check_version_range(struct intel_uc_fw *uc_fw)
*/ */
if (!is_ver_8bit(&uc_fw->file_selected.ver)) { if (!is_ver_8bit(&uc_fw->file_selected.ver)) {
gt_warn(__uc_fw_to_gt(uc_fw), "%s firmware: invalid file version: 0x%02X:%02X:%02X\n", gt_warn(gt, "%s firmware: invalid file version: 0x%02X:%02X:%02X\n",
intel_uc_fw_type_repr(uc_fw->type), intel_uc_fw_type_repr(uc_fw->type),
uc_fw->file_selected.ver.major, uc_fw->file_selected.ver.major,
uc_fw->file_selected.ver.minor, uc_fw->file_selected.ver.minor,
uc_fw->file_selected.ver.patch); uc_fw->file_selected.ver.patch);
return false; return -EINVAL;
} }
if (!is_ver_8bit(&guc->submission_version)) { if (!is_ver_8bit(&guc->submission_version)) {
gt_warn(__uc_fw_to_gt(uc_fw), "%s firmware: invalid submit version: 0x%02X:%02X:%02X\n", gt_warn(gt, "%s firmware: invalid submit version: 0x%02X:%02X:%02X\n",
intel_uc_fw_type_repr(uc_fw->type), intel_uc_fw_type_repr(uc_fw->type),
guc->submission_version.major, guc->submission_version.major,
guc->submission_version.minor, guc->submission_version.minor,
guc->submission_version.patch); guc->submission_version.patch);
return false; return -EINVAL;
} }
return true; return i915_inject_probe_error(gt->i915, -EINVAL);
} }
static int check_fw_header(struct intel_gt *gt, static int check_fw_header(struct intel_gt *gt,
...@@ -772,8 +773,11 @@ int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw) ...@@ -772,8 +773,11 @@ int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw)
if (err) if (err)
goto fail; goto fail;
if (uc_fw->type == INTEL_UC_FW_TYPE_GUC && !guc_check_version_range(uc_fw)) if (uc_fw->type == INTEL_UC_FW_TYPE_GUC) {
err = guc_check_version_range(uc_fw);
if (err)
goto fail; goto fail;
}
if (uc_fw->file_wanted.ver.major && uc_fw->file_selected.ver.major) { if (uc_fw->file_wanted.ver.major && uc_fw->file_selected.ver.major) {
/* Check the file's major version was as it claimed */ /* Check the file's major version was as it claimed */
......
...@@ -1134,6 +1134,8 @@ static const struct intel_gt_definition xelpmp_extra_gt[] = { ...@@ -1134,6 +1134,8 @@ static const struct intel_gt_definition xelpmp_extra_gt[] = {
static const struct intel_device_info mtl_info = { static const struct intel_device_info mtl_info = {
XE_HP_FEATURES, XE_HP_FEATURES,
XE_LPDP_FEATURES, XE_LPDP_FEATURES,
.__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
BIT(TRANSCODER_C) | BIT(TRANSCODER_D),
/* /*
* Real graphics IP version will be obtained from hardware GMD_ID * Real graphics IP version will be obtained from hardware GMD_ID
* register. Value provided here is just for sanity checking. * register. Value provided here is just for sanity checking.
......
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