Commit 1c2a0de3 authored by Magnus Damm's avatar Magnus Damm Committed by Simon Horman

arm64: dts: renesas: r8a77995: Enable IPMMU devices

Remove 'status = "disabled"' to make sure all IPMMU devices are enabled
in DT on the r8a77995 SoC.
Signed-off-by: default avatarMagnus Damm <damm+renesas@opensource.se>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
[simon: rebased]
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 344aa8f3
...@@ -409,7 +409,6 @@ ipmmu_ds0: mmu@e6740000 { ...@@ -409,7 +409,6 @@ ipmmu_ds0: mmu@e6740000 {
reg = <0 0xe6740000 0 0x1000>; reg = <0 0xe6740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 0>; renesas,ipmmu-main = <&ipmmu_mm 0>;
#iommu-cells = <1>; #iommu-cells = <1>;
status = "disabled";
}; };
ipmmu_ds1: mmu@e7740000 { ipmmu_ds1: mmu@e7740000 {
...@@ -417,7 +416,6 @@ ipmmu_ds1: mmu@e7740000 { ...@@ -417,7 +416,6 @@ ipmmu_ds1: mmu@e7740000 {
reg = <0 0xe7740000 0 0x1000>; reg = <0 0xe7740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 1>; renesas,ipmmu-main = <&ipmmu_mm 1>;
#iommu-cells = <1>; #iommu-cells = <1>;
status = "disabled";
}; };
ipmmu_hc: mmu@e6570000 { ipmmu_hc: mmu@e6570000 {
...@@ -425,7 +423,6 @@ ipmmu_hc: mmu@e6570000 { ...@@ -425,7 +423,6 @@ ipmmu_hc: mmu@e6570000 {
reg = <0 0xe6570000 0 0x1000>; reg = <0 0xe6570000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 2>; renesas,ipmmu-main = <&ipmmu_mm 2>;
#iommu-cells = <1>; #iommu-cells = <1>;
status = "disabled";
}; };
ipmmu_mm: mmu@e67b0000 { ipmmu_mm: mmu@e67b0000 {
...@@ -434,7 +431,6 @@ ipmmu_mm: mmu@e67b0000 { ...@@ -434,7 +431,6 @@ ipmmu_mm: mmu@e67b0000 {
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>; #iommu-cells = <1>;
status = "disabled";
}; };
ipmmu_mp: mmu@ec670000 { ipmmu_mp: mmu@ec670000 {
...@@ -442,7 +438,6 @@ ipmmu_mp: mmu@ec670000 { ...@@ -442,7 +438,6 @@ ipmmu_mp: mmu@ec670000 {
reg = <0 0xec670000 0 0x1000>; reg = <0 0xec670000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 4>; renesas,ipmmu-main = <&ipmmu_mm 4>;
#iommu-cells = <1>; #iommu-cells = <1>;
status = "disabled";
}; };
ipmmu_pv0: mmu@fd800000 { ipmmu_pv0: mmu@fd800000 {
...@@ -450,7 +445,6 @@ ipmmu_pv0: mmu@fd800000 { ...@@ -450,7 +445,6 @@ ipmmu_pv0: mmu@fd800000 {
reg = <0 0xfd800000 0 0x1000>; reg = <0 0xfd800000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 6>; renesas,ipmmu-main = <&ipmmu_mm 6>;
#iommu-cells = <1>; #iommu-cells = <1>;
status = "disabled";
}; };
ipmmu_rt: mmu@ffc80000 { ipmmu_rt: mmu@ffc80000 {
...@@ -458,7 +452,6 @@ ipmmu_rt: mmu@ffc80000 { ...@@ -458,7 +452,6 @@ ipmmu_rt: mmu@ffc80000 {
reg = <0 0xffc80000 0 0x1000>; reg = <0 0xffc80000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 10>; renesas,ipmmu-main = <&ipmmu_mm 10>;
#iommu-cells = <1>; #iommu-cells = <1>;
status = "disabled";
}; };
ipmmu_vc0: mmu@fe6b0000 { ipmmu_vc0: mmu@fe6b0000 {
...@@ -466,7 +459,6 @@ ipmmu_vc0: mmu@fe6b0000 { ...@@ -466,7 +459,6 @@ ipmmu_vc0: mmu@fe6b0000 {
reg = <0 0xfe6b0000 0 0x1000>; reg = <0 0xfe6b0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 12>; renesas,ipmmu-main = <&ipmmu_mm 12>;
#iommu-cells = <1>; #iommu-cells = <1>;
status = "disabled";
}; };
ipmmu_vi0: mmu@febd0000 { ipmmu_vi0: mmu@febd0000 {
...@@ -474,7 +466,6 @@ ipmmu_vi0: mmu@febd0000 { ...@@ -474,7 +466,6 @@ ipmmu_vi0: mmu@febd0000 {
reg = <0 0xfebd0000 0 0x1000>; reg = <0 0xfebd0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 14>; renesas,ipmmu-main = <&ipmmu_mm 14>;
#iommu-cells = <1>; #iommu-cells = <1>;
status = "disabled";
}; };
ipmmu_vp0: mmu@fe990000 { ipmmu_vp0: mmu@fe990000 {
...@@ -482,7 +473,6 @@ ipmmu_vp0: mmu@fe990000 { ...@@ -482,7 +473,6 @@ ipmmu_vp0: mmu@fe990000 {
reg = <0 0xfe990000 0 0x1000>; reg = <0 0xfe990000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 16>; renesas,ipmmu-main = <&ipmmu_mm 16>;
#iommu-cells = <1>; #iommu-cells = <1>;
status = "disabled";
}; };
avb: ethernet@e6800000 { avb: ethernet@e6800000 {
......
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