Commit 1edf907a authored by Viresh Kumar's avatar Viresh Kumar Committed by Ralf Baechle

MIPS: cevt-bcm1480: Migrate to new 'set-state' interface

Migrate cevt-bcm1480 driver to the new 'set-state' interface provided by
clockevents core, the earlier 'set-mode' interface is marked obsolete
now.

This also enables us to implement callbacks for new states of clockevent
devices, for example: ONESHOT_STOPPED.

Read operation on R_SCD_TIMER_CFG and R_SCD_TIMER_INIT registers isn't
performed now for many modes as there returned values aren't used.
Signed-off-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: linux-mips@linux-mips.org
Cc: linaro-kernel@lists.linaro.org
Cc: Thomas Gleixner <tglx@linutronix.de>
Patchwork: https://patchwork.linux-mips.org/patch/10602/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent c87cbe06
...@@ -40,8 +40,8 @@ ...@@ -40,8 +40,8 @@
* The general purpose timer ticks at 1MHz independent if * The general purpose timer ticks at 1MHz independent if
* the rest of the system * the rest of the system
*/ */
static void sibyte_set_mode(enum clock_event_mode mode,
struct clock_event_device *evt) static int sibyte_set_periodic(struct clock_event_device *evt)
{ {
unsigned int cpu = smp_processor_id(); unsigned int cpu = smp_processor_id();
void __iomem *cfg, *init; void __iomem *cfg, *init;
...@@ -49,24 +49,22 @@ static void sibyte_set_mode(enum clock_event_mode mode, ...@@ -49,24 +49,22 @@ static void sibyte_set_mode(enum clock_event_mode mode,
cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)); init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT));
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
__raw_writeq(0, cfg); __raw_writeq(0, cfg);
__raw_writeq((V_SCD_TIMER_FREQ / HZ) - 1, init); __raw_writeq((V_SCD_TIMER_FREQ / HZ) - 1, init);
__raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, cfg);
cfg); return 0;
break; }
static int sibyte_shutdown(struct clock_event_device *evt)
{
unsigned int cpu = smp_processor_id();
void __iomem *cfg;
cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
case CLOCK_EVT_MODE_ONESHOT:
/* Stop the timer until we actually program a shot */ /* Stop the timer until we actually program a shot */
case CLOCK_EVT_MODE_SHUTDOWN:
__raw_writeq(0, cfg); __raw_writeq(0, cfg);
break; return 0;
case CLOCK_EVT_MODE_UNUSED: /* shuddup gcc */
case CLOCK_EVT_MODE_RESUME:
;
}
} }
static int sibyte_next_event(unsigned long delta, struct clock_event_device *cd) static int sibyte_next_event(unsigned long delta, struct clock_event_device *cd)
...@@ -91,7 +89,7 @@ static irqreturn_t sibyte_counter_handler(int irq, void *dev_id) ...@@ -91,7 +89,7 @@ static irqreturn_t sibyte_counter_handler(int irq, void *dev_id)
void __iomem *cfg; void __iomem *cfg;
unsigned long tmode; unsigned long tmode;
if (cd->mode == CLOCK_EVT_MODE_PERIODIC) if (clockevent_state_periodic(cd))
tmode = M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS; tmode = M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS;
else else
tmode = 0; tmode = 0;
...@@ -130,7 +128,9 @@ void sb1480_clockevent_init(void) ...@@ -130,7 +128,9 @@ void sb1480_clockevent_init(void)
cd->irq = irq; cd->irq = irq;
cd->cpumask = cpumask_of(cpu); cd->cpumask = cpumask_of(cpu);
cd->set_next_event = sibyte_next_event; cd->set_next_event = sibyte_next_event;
cd->set_mode = sibyte_set_mode; cd->set_state_shutdown = sibyte_shutdown;
cd->set_state_periodic = sibyte_set_periodic;
cd->set_state_oneshot = sibyte_shutdown;
clockevents_register_device(cd); clockevents_register_device(cd);
bcm1480_mask_irq(cpu, irq); bcm1480_mask_irq(cpu, irq);
......
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