Commit 1fe13d83 authored by Kaihua Zhong's avatar Kaihua Zhong Committed by Lee Jones

mfd: Fix a few spelling mistakes in PMIC header file comments

Fix four comment typos in MFD PMIC header files.
Reported-by: default avatark2ci <kernel-bot@kylinos.cn>
Signed-off-by: default avatarKaihua Zhong <zhongkaihua@kylinos.cn>
Reviewed-by: default avatarRandy Dunlap <rdunlap@infradead.org>
Link: https://lore.kernel.org/r/20231129015526.3302865-1-zhongkaihua@kylinos.cnSigned-off-by: default avatarLee Jones <lee@kernel.org>
parent fd58bb8c
...@@ -405,7 +405,7 @@ enum max77693_haptic_reg { ...@@ -405,7 +405,7 @@ enum max77693_haptic_reg {
MAX77693_HAPTIC_REG_END, MAX77693_HAPTIC_REG_END,
}; };
/* max77693-pmic LSCNFG configuraton register */ /* max77693-pmic LSCNFG configuration register */
#define MAX77693_PMIC_LOW_SYS_MASK 0x80 #define MAX77693_PMIC_LOW_SYS_MASK 0x80
#define MAX77693_PMIC_LOW_SYS_SHIFT 7 #define MAX77693_PMIC_LOW_SYS_SHIFT 7
......
...@@ -198,7 +198,7 @@ enum max77843_irq_muic { ...@@ -198,7 +198,7 @@ enum max77843_irq_muic {
#define MAX77843_MCONFIG_MEN_MASK BIT(MCONFIG_MEN_SHIFT) #define MAX77843_MCONFIG_MEN_MASK BIT(MCONFIG_MEN_SHIFT)
#define MAX77843_MCONFIG_PDIV_MASK (0x3 << MCONFIG_PDIV_SHIFT) #define MAX77843_MCONFIG_PDIV_MASK (0x3 << MCONFIG_PDIV_SHIFT)
/* Max77843 charger insterrupts */ /* Max77843 charger interrupts */
#define MAX77843_CHG_BYP_I BIT(0) #define MAX77843_CHG_BYP_I BIT(0)
#define MAX77843_CHG_BATP_I BIT(2) #define MAX77843_CHG_BATP_I BIT(2)
#define MAX77843_CHG_BAT_I BIT(3) #define MAX77843_CHG_BAT_I BIT(3)
......
...@@ -10,7 +10,7 @@ ...@@ -10,7 +10,7 @@
#ifndef __SI476X_PLATFORM_H__ #ifndef __SI476X_PLATFORM_H__
#define __SI476X_PLATFORM_H__ #define __SI476X_PLATFORM_H__
/* It is possible to select one of the four adresses using pins A0 /* It is possible to select one of the four addresses using pins A0
* and A1 on SI476x */ * and A1 on SI476x */
#define SI476X_I2C_ADDR_1 0x60 #define SI476X_I2C_ADDR_1 0x60
#define SI476X_I2C_ADDR_2 0x61 #define SI476X_I2C_ADDR_2 0x61
......
...@@ -749,7 +749,7 @@ ...@@ -749,7 +749,7 @@
#define VDDCTRL_ST_SHIFT 0 #define VDDCTRL_ST_SHIFT 0
/*Register VDDCTRL_OP (0x28) bit definitios */ /*Register VDDCTRL_OP (0x28) bit definitions */
#define VDDCTRL_OP_CMD_MASK 0x80 #define VDDCTRL_OP_CMD_MASK 0x80
#define VDDCTRL_OP_CMD_SHIFT 7 #define VDDCTRL_OP_CMD_SHIFT 7
#define VDDCTRL_OP_SEL_MASK 0x7F #define VDDCTRL_OP_SEL_MASK 0x7F
......
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