Commit 217dc618 authored by Pali Rohár's avatar Pali Rohár Committed by Gregory CLEMENT

ARM: dts: kirkwood: Add definitions for PCIe legacy INTx interrupts

Add definitions for PCIe legacy INTx interrupts.

This is required for example in a scenario where a driver requests only
one of the legacy interrupts (INTA). Without this, the driver would be
notified on events on all 4 (INTA, INTB, INTC, INTD), even if it
requested only one of them.
Signed-off-by: default avatarPali Rohár <pali@kernel.org>
Signed-off-by: default avatarMarek Behún <kabel@kernel.org>
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@bootlin.com>
parent 2d528eda
...@@ -26,12 +26,22 @@ pcie0: pcie@1,0 { ...@@ -26,12 +26,22 @@ pcie0: pcie@1,0 {
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>; 0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-names = "intx";
interrupt-map = <0 0 0 0 &intc 9>; interrupts = <9>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc 0>,
<0 0 0 2 &pcie_intc 1>,
<0 0 0 3 &pcie_intc 2>,
<0 0 0 4 &pcie_intc 3>;
marvell,pcie-port = <0>; marvell,pcie-port = <0>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gate_clk 2>; clocks = <&gate_clk 2>;
status = "disabled"; status = "disabled";
pcie_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
}; };
}; };
......
...@@ -26,12 +26,22 @@ pcie0: pcie@1,0 { ...@@ -26,12 +26,22 @@ pcie0: pcie@1,0 {
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>; 0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-names = "intx";
interrupt-map = <0 0 0 0 &intc 9>; interrupts = <9>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc 0>,
<0 0 0 2 &pcie_intc 1>,
<0 0 0 3 &pcie_intc 2>,
<0 0 0 4 &pcie_intc 3>;
marvell,pcie-port = <0>; marvell,pcie-port = <0>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gate_clk 2>; clocks = <&gate_clk 2>;
status = "disabled"; status = "disabled";
pcie_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
}; };
}; };
......
...@@ -30,12 +30,22 @@ pcie0: pcie@1,0 { ...@@ -30,12 +30,22 @@ pcie0: pcie@1,0 {
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>; 0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-names = "intx";
interrupt-map = <0 0 0 0 &intc 9>; interrupts = <9>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie0_intc 0>,
<0 0 0 2 &pcie0_intc 1>,
<0 0 0 3 &pcie0_intc 2>,
<0 0 0 4 &pcie0_intc 3>;
marvell,pcie-port = <0>; marvell,pcie-port = <0>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gate_clk 2>; clocks = <&gate_clk 2>;
status = "disabled"; status = "disabled";
pcie0_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
pcie1: pcie@2,0 { pcie1: pcie@2,0 {
...@@ -48,12 +58,22 @@ pcie1: pcie@2,0 { ...@@ -48,12 +58,22 @@ pcie1: pcie@2,0 {
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
0x81000000 0 0 0x81000000 0x2 0 1 0>; 0x81000000 0 0 0x81000000 0x2 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-names = "intx";
interrupt-map = <0 0 0 0 &intc 10>; interrupts = <10>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie1_intc 0>,
<0 0 0 2 &pcie1_intc 1>,
<0 0 0 3 &pcie1_intc 2>,
<0 0 0 4 &pcie1_intc 3>;
marvell,pcie-port = <1>; marvell,pcie-port = <1>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gate_clk 18>; clocks = <&gate_clk 18>;
status = "disabled"; status = "disabled";
pcie1_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
}; };
}; };
......
...@@ -26,12 +26,22 @@ pcie0: pcie@1,0 { ...@@ -26,12 +26,22 @@ pcie0: pcie@1,0 {
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>; 0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-names = "intx";
interrupt-map = <0 0 0 0 &intc 9>; interrupts = <9>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc 0>,
<0 0 0 2 &pcie_intc 1>,
<0 0 0 3 &pcie_intc 2>,
<0 0 0 4 &pcie_intc 3>;
marvell,pcie-port = <0>; marvell,pcie-port = <0>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gate_clk 2>; clocks = <&gate_clk 2>;
status = "disabled"; status = "disabled";
pcie_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
}; };
}; };
......
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