Commit 22f35046 authored by Daniel Cotey's avatar Daniel Cotey Committed by Greg Kroah-Hartman

Staging: silicom: bp_mod.h: checkpatch tab and space cleanup

seventh chunk of bp_mod.h's cleanup
Signed-off-by: default avatarDaniel Cotey <puff65537@bansheeslibrary.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 0118f42a
...@@ -373,33 +373,33 @@ static inline unsigned int jiffies_to_msecs(const unsigned long j) ...@@ -373,33 +373,33 @@ static inline unsigned int jiffies_to_msecs(const unsigned long j)
#define PEGF5_IF_SERIES(pid) \ #define PEGF5_IF_SERIES(pid) \
((pid == SILICOM_PEG2BPFI5_SSID) || \ ((pid == SILICOM_PEG2BPFI5_SSID) || \
(pid==SILICOM_PEG2BPFI5LX_SSID)|| \ (pid == SILICOM_PEG2BPFI5LX_SSID) || \
(pid==SILICOM_PEG4BPFI6_SSID)|| \ (pid == SILICOM_PEG4BPFI6_SSID) || \
(pid==SILICOM_PEG4BPFI6LX_SSID)|| \ (pid == SILICOM_PEG4BPFI6LX_SSID) || \
(pid==SILICOM_PEG4BPFI6ZX_SSID)|| \ (pid == SILICOM_PEG4BPFI6ZX_SSID) || \
(pid==SILICOM_PEG2BPFI6_SSID)|| \ (pid == SILICOM_PEG2BPFI6_SSID) || \
(pid==SILICOM_PEG2BPFI6LX_SSID)|| \ (pid == SILICOM_PEG2BPFI6LX_SSID) || \
(pid==SILICOM_PEG2BPFI6ZX_SSID)|| \ (pid == SILICOM_PEG2BPFI6ZX_SSID) || \
(pid==SILICOM_PEG2BPFI6FLXM_SSID)|| \ (pid == SILICOM_PEG2BPFI6FLXM_SSID) || \
(pid==SILICOM_PEG2DBFI6_SSID)|| \ (pid == SILICOM_PEG2DBFI6_SSID) || \
(pid==SILICOM_PEG2DBFI6LX_SSID)|| \ (pid == SILICOM_PEG2DBFI6LX_SSID) || \
(pid==SILICOM_PEG2DBFI6ZX_SSID)|| \ (pid == SILICOM_PEG2DBFI6ZX_SSID) || \
(pid==SILICOM_PEG4BPI6FC_SSID)|| \ (pid == SILICOM_PEG4BPI6FC_SSID) || \
(pid==SILICOM_PEG4BPFI6FCLX_SSID)|| \ (pid == SILICOM_PEG4BPFI6FCLX_SSID) || \
(pid==SILICOM_PEG4BPI6FC_SSID)|| \ (pid == SILICOM_PEG4BPI6FC_SSID) || \
(pid==SILICOM_M1EG2BPFI6_SSID)|| \ (pid == SILICOM_M1EG2BPFI6_SSID) || \
(pid==SILICOM_M1EG2BPFI6LX_SSID)|| \ (pid == SILICOM_M1EG2BPFI6LX_SSID) || \
(pid==SILICOM_M1EG2BPFI6ZX_SSID)|| \ (pid == SILICOM_M1EG2BPFI6ZX_SSID) || \
(pid==SILICOM_M1EG4BPFI6_SSID)|| \ (pid == SILICOM_M1EG4BPFI6_SSID) || \
(pid==SILICOM_M1EG4BPFI6LX_SSID)|| \ (pid == SILICOM_M1EG4BPFI6LX_SSID) || \
(pid==SILICOM_M1EG4BPFI6ZX_SSID)|| \ (pid == SILICOM_M1EG4BPFI6ZX_SSID) || \
(pid==SILICOM_M2EG2BPFI6_SSID)|| \ (pid == SILICOM_M2EG2BPFI6_SSID) || \
(pid==SILICOM_M2EG2BPFI6LX_SSID)|| \ (pid == SILICOM_M2EG2BPFI6LX_SSID) || \
(pid==SILICOM_M2EG2BPFI6ZX_SSID)|| \ (pid == SILICOM_M2EG2BPFI6ZX_SSID) || \
(pid==SILICOM_M2EG4BPFI6_SSID)|| \ (pid == SILICOM_M2EG4BPFI6_SSID) || \
(pid==SILICOM_M2EG4BPFI6LX_SSID)|| \ (pid == SILICOM_M2EG4BPFI6LX_SSID) || \
(pid==SILICOM_M2EG4BPFI6ZX_SSID)|| \ (pid == SILICOM_M2EG4BPFI6ZX_SSID) || \
(pid==SILICOM_PEG4BPFI6FCZX_SSID)) (pid == SILICOM_PEG4BPFI6FCZX_SSID))
#define PEG5_IF_SERIES(pid) \ #define PEG5_IF_SERIES(pid) \
((pid==SILICOM_PEG4BPI6_SSID)|| \ ((pid==SILICOM_PEG4BPI6_SSID)|| \
......
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