Commit 24a768cf authored by Christopher Pau's avatar Christopher Pau Committed by Jeff Kirsher

i40e: limit GLLAN_TXPRE_QDIS to QINDX 0-127

Prevent writing to reserved bits, queue index is 0-127

Change-ID: Ic923e1c92012a265983414acd8f547c4bdac2e34
Signed-off-by: default avatarChristopher Pau <christopher.pau@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 3efbbb20
......@@ -669,8 +669,10 @@ void i40e_pre_tx_queue_cfg(struct i40e_hw *hw, u32 queue, bool enable)
u32 reg_block = 0;
u32 reg_val;
if (abs_queue_idx >= 128)
if (abs_queue_idx >= 128) {
reg_block = abs_queue_idx / 128;
abs_queue_idx %= 128;
}
reg_val = rd32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block));
reg_val &= ~I40E_GLLAN_TXPRE_QDIS_QINDX_MASK;
......
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