Commit 2596e07a authored by Arnd Bergmann's avatar Arnd Bergmann Committed by Mark Brown

regmap: fix documentation to match code

The regmap binding talks about one thing, which is register
endianess, and it gets almost every aspect of it wrong.

This replaces the current text of the file with a version
that makes more sense and that matches what we implement
now.
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
Fixes: a06c488d ("regmap: Add explict native endian flag to DT bindings")
Fixes: 275876e2 ("regmap: Add the DT binding documentation for endianness")
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent d25263d9
Device-Tree binding for regmap Devicetree binding for regmap
The endianness mode of CPU & Device scenarios:
Index Device Endianness properties
---------------------------------------------------
1 BE 'big-endian'
2 LE 'little-endian'
3 Native 'native-endian'
For one device driver, which will run in different scenarios above
on different SoCs using the devicetree, we need one way to simplify
this.
Optional properties: Optional properties:
- {big,little,native}-endian: these are boolean properties, if absent
then the implementation will choose a default based on the device
being controlled. These properties are for register values and all
the buffers only. Native endian means that the CPU and device have
the same endianness.
Examples: little-endian,
Scenario 1 : CPU in LE mode & device in LE mode. big-endian,
dev: dev@40031000 { native-endian: See common-properties.txt for a definition
compatible = "name";
reg = <0x40031000 0x1000>;
...
};
Scenario 2 : CPU in LE mode & device in BE mode. Note:
dev: dev@40031000 { Regmap defaults to little-endian register access on MMIO based
compatible = "name"; devices, this is by far the most common setting. On CPU
reg = <0x40031000 0x1000>; architectures that typically run big-endian operating systems
... (e.g. PowerPC), registers can be defined as big-endian and must
big-endian; be marked that way in the devicetree.
};
Scenario 3 : CPU in BE mode & device in BE mode. On SoCs that can be operated in both big-endian and little-endian
dev: dev@40031000 { modes, with a single hardware switch controlling both the endianess
compatible = "name"; of the CPU and a byteswap for MMIO registers (e.g. many Broadcom MIPS
reg = <0x40031000 0x1000>; chips), "native-endian" is used to allow using the same device tree
... blob in both cases.
};
Scenario 4 : CPU in BE mode & device in LE mode. Examples:
Scenario 1 : a register set in big-endian mode.
dev: dev@40031000 { dev: dev@40031000 {
compatible = "name"; compatible = "syscon";
reg = <0x40031000 0x1000>; reg = <0x40031000 0x1000>;
big-endian;
... ...
little-endian;
}; };
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