Commit 25ef8072 authored by Simon Guo's avatar Simon Guo Committed by Greg Kroah-Hartman

STAGING: Fix pcl818.c coding style issue: code indent should use tabs where possible

Correct one coding style problem(detected by checkpatch.pl) in pcl818.c.
- code indent should use tabs where possible
It is fixed by reformatting the comment block to usual comment style.

And with the reformatting, following coding style problem is also fixed:
- please, no space before tabs
Signed-off-by: default avatarSimon Guo <wei.guo.simon@gmail.com>
Reviewed-by: default avatarIan Abbott <abbotti@mev.co.uk>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent d0e9ed58
/* /*
comedi/drivers/pcl818.c * comedi/drivers/pcl818.c
*
Author: Michal Dobes <dobes@tesnet.cz> * Driver: pcl818
* Description: Advantech PCL-818 cards, PCL-718
hardware driver for Advantech cards: * Author: Michal Dobes <dobes@tesnet.cz>
card: PCL-818L, PCL-818H, PCL-818HD, PCL-818HG, PCL-818, PCL-718 * Devices: [Advantech] PCL-818L (pcl818l), PCL-818H (pcl818h),
driver: pcl818l, pcl818h, pcl818hd, pcl818hg, pcl818, pcl718 * PCL-818HD (pcl818hd), PCL-818HG (pcl818hg), PCL-818 (pcl818),
*/ * PCL-718 (pcl718)
/* * Status: works
Driver: pcl818 *
Description: Advantech PCL-818 cards, PCL-718 * All cards have 16 SE/8 DIFF ADCs, one or two DACs, 16 DI and 16 DO.
Author: Michal Dobes <dobes@tesnet.cz> * Differences are only at maximal sample speed, range list and FIFO
Devices: [Advantech] PCL-818L (pcl818l), PCL-818H (pcl818h), * support.
PCL-818HD (pcl818hd), PCL-818HG (pcl818hg), PCL-818 (pcl818), * The driver support AI mode 0, 1, 3 other subdevices (AO, DI, DO) support
PCL-718 (pcl718) * only mode 0. If DMA/FIFO/INT are disabled then AI support only mode 0.
Status: works * PCL-818HD and PCL-818HG support 1kword FIFO. Driver support this FIFO
* but this code is untested.
All cards have 16 SE/8 DIFF ADCs, one or two DACs, 16 DI and 16 DO. * A word or two about DMA. Driver support DMA operations at two ways:
Differences are only at maximal sample speed, range list and FIFO * 1) DMA uses two buffers and after one is filled then is generated
support. * INT and DMA restart with second buffer. With this mode I'm unable run
The driver support AI mode 0, 1, 3 other subdevices (AO, DI, DO) support * more that 80Ksamples/secs without data dropouts on K6/233.
only mode 0. If DMA/FIFO/INT are disabled then AI support only mode 0. * 2) DMA uses one buffer and run in autoinit mode and the data are
PCL-818HD and PCL-818HG support 1kword FIFO. Driver support this FIFO * from DMA buffer moved on the fly with 2kHz interrupts from RTC.
but this code is untested. * This mode is used if the interrupt 8 is available for allocation.
A word or two about DMA. Driver support DMA operations at two ways: * If not, then first DMA mode is used. With this I can run at
1) DMA uses two buffers and after one is filled then is generated * full speed one card (100ksamples/secs) or two cards with
INT and DMA restart with second buffer. With this mode I'm unable run * 60ksamples/secs each (more is problem on account of ISA limitations).
more that 80Ksamples/secs without data dropouts on K6/233. * To use this mode you must have compiled kernel with disabled
2) DMA uses one buffer and run in autoinit mode and the data are * "Enhanced Real Time Clock Support".
from DMA buffer moved on the fly with 2kHz interrupts from RTC. * Maybe you can have problems if you use xntpd or similar.
This mode is used if the interrupt 8 is available for allocation. * If you've data dropouts with DMA mode 2 then:
If not, then first DMA mode is used. With this I can run at * a) disable IDE DMA
full speed one card (100ksamples/secs) or two cards with * b) switch text mode console to fb.
60ksamples/secs each (more is problem on account of ISA limitations). *
To use this mode you must have compiled kernel with disabled * Options for PCL-818L:
"Enhanced Real Time Clock Support". * [0] - IO Base
Maybe you can have problems if you use xntpd or similar. * [1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7)
If you've data dropouts with DMA mode 2 then: * [2] - DMA (0=disable, 1, 3)
a) disable IDE DMA * [3] - 0, 10=10MHz clock for 8254
b) switch text mode console to fb. * 1= 1MHz clock for 8254
* [4] - 0, 5=A/D input -5V.. +5V
Options for PCL-818L: * 1, 10=A/D input -10V..+10V
[0] - IO Base * [5] - 0, 5=D/A output 0-5V (internal reference -5V)
[1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7) * 1, 10=D/A output 0-10V (internal reference -10V)
[2] - DMA (0=disable, 1, 3) * 2 =D/A output unknown (external reference)
[3] - 0, 10=10MHz clock for 8254 *
1= 1MHz clock for 8254 * Options for PCL-818, PCL-818H:
[4] - 0, 5=A/D input -5V.. +5V * [0] - IO Base
1, 10=A/D input -10V..+10V * [1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7)
[5] - 0, 5=D/A output 0-5V (internal reference -5V) * [2] - DMA (0=disable, 1, 3)
1, 10=D/A output 0-10V (internal reference -10V) * [3] - 0, 10=10MHz clock for 8254
2 =D/A output unknown (external reference) * 1= 1MHz clock for 8254
* [4] - 0, 5=D/A output 0-5V (internal reference -5V)
Options for PCL-818, PCL-818H: * 1, 10=D/A output 0-10V (internal reference -10V)
[0] - IO Base * 2 =D/A output unknown (external reference)
[1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7) *
[2] - DMA (0=disable, 1, 3) * Options for PCL-818HD, PCL-818HG:
[3] - 0, 10=10MHz clock for 8254 * [0] - IO Base
1= 1MHz clock for 8254 * [1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7)
[4] - 0, 5=D/A output 0-5V (internal reference -5V) * [2] - DMA/FIFO (-1=use FIFO, 0=disable both FIFO and DMA,
1, 10=D/A output 0-10V (internal reference -10V) * 1=use DMA ch 1, 3=use DMA ch 3)
2 =D/A output unknown (external reference) * [3] - 0, 10=10MHz clock for 8254
* 1= 1MHz clock for 8254
Options for PCL-818HD, PCL-818HG: * [4] - 0, 5=D/A output 0-5V (internal reference -5V)
[0] - IO Base * 1, 10=D/A output 0-10V (internal reference -10V)
[1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7) * 2 =D/A output unknown (external reference)
[2] - DMA/FIFO (-1=use FIFO, 0=disable both FIFO and DMA, *
1=use DMA ch 1, 3=use DMA ch 3) * Options for PCL-718:
[3] - 0, 10=10MHz clock for 8254 * [0] - IO Base
1= 1MHz clock for 8254 * [1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7)
[4] - 0, 5=D/A output 0-5V (internal reference -5V) * [2] - DMA (0=disable, 1, 3)
1, 10=D/A output 0-10V (internal reference -10V) * [3] - 0, 10=10MHz clock for 8254
2 =D/A output unknown (external reference) * 1= 1MHz clock for 8254
* [4] - 0=A/D Range is +/-10V
Options for PCL-718: * 1= +/-5V
[0] - IO Base * 2= +/-2.5V
[1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7) * 3= +/-1V
[2] - DMA (0=disable, 1, 3) * 4= +/-0.5V
[3] - 0, 10=10MHz clock for 8254 * 5= user defined bipolar
1= 1MHz clock for 8254 * 6= 0-10V
[4] - 0=A/D Range is +/-10V * 7= 0-5V
1= +/-5V * 8= 0-2V
2= +/-2.5V * 9= 0-1V
3= +/-1V * 10= user defined unipolar
4= +/-0.5V * [5] - 0, 5=D/A outputs 0-5V (internal reference -5V)
5= user defined bipolar * 1, 10=D/A outputs 0-10V (internal reference -10V)
6= 0-10V * 2=D/A outputs unknown (external reference)
7= 0-5V * [6] - 0, 60=max 60kHz A/D sampling
8= 0-2V * 1,100=max 100kHz A/D sampling (PCL-718 with Option 001 installed)
9= 0-1V *
10= user defined unipolar */
[5] - 0, 5=D/A outputs 0-5V (internal reference -5V)
1, 10=D/A outputs 0-10V (internal reference -10V)
2=D/A outputs unknown (external reference)
[6] - 0, 60=max 60kHz A/D sampling
1,100=max 100kHz A/D sampling (PCL-718 with Option 001 installed)
*/
#include <linux/module.h> #include <linux/module.h>
#include <linux/gfp.h> #include <linux/gfp.h>
......
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