Commit 27741d92 authored by Nicolas Pitre's avatar Nicolas Pitre Committed by Russell King

[PATCH] 996/1: GraphicsClient irq code

Updated the IRQ code to the new model.
also removed some dead code.

Not tested (the tree is too broken to compile) but this should still 
be better than totally wrong and obsolete code.
parent e51b59f6
...@@ -32,67 +32,62 @@ ...@@ -32,67 +32,62 @@
* Handlers for GraphicsClient's external IRQ logic * Handlers for GraphicsClient's external IRQ logic
*/ */
static void ADS_IRQ_demux( int irq, void *dev_id, struct pt_regs *regs ) static void
gc_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
{ {
int i; unsigned int mask;
while ((mask = ADS_INT_ST1 | (ADS_INT_ST2 << 8))) {
/* clear the parent IRQ */
GEDR = GPIO_GPIO0;
while( (irq = ADS_INT_ST1 | (ADS_INT_ST2 << 8)) ){ irq = ADS_EXT_IRQ(0);
for( i = 0; i < 16; i++ ) desc = irq_desc + irq;
if( irq & (1<<i) )
do_IRQ( ADS_EXT_IRQ(i), regs ); do {
if (mask & 1)
desc->handle(irq, desc, regs);
mask >>= 1;
irq++;
desc++;
} while (mask);
} }
} }
static struct irqaction ADS_ext_irq = { static void gc_mask_irq1(unsigned int irq)
name: "ADS_ext_IRQ",
handler: ADS_IRQ_demux,
flags: SA_INTERRUPT
};
static void ADS_mask_and_ack_irq0(unsigned int irq)
{ {
int mask = (1 << (irq - ADS_EXT_IRQ(0))); int mask = (1 << (irq - ADS_EXT_IRQ(0)));
ADS_INT_EN1 &= ~mask; ADS_INT_EN1 &= ~mask;
ADS_INT_ST1 = mask; ADS_INT_ST1 = mask;
} }
static void ADS_mask_irq0(unsigned int irq) static void gc_unmask_irq1(unsigned int irq)
{
ADS_INT_ST1 = (1 << (irq - ADS_EXT_IRQ(0)));
}
static void ADS_unmask_irq0(unsigned int irq)
{ {
ADS_INT_EN1 |= (1 << (irq - ADS_EXT_IRQ(0))); ADS_INT_EN1 |= (1 << (irq - ADS_EXT_IRQ(0)));
} }
static struct irqchip ADS0_chip = { static struct irqchip gc_irq1_chip = {
ack: ADS_mask_and_ack_irq0, ack: gc_mask_irq1,
mask: ADS_mask_irq0, mask: gc_mask_irq1,
unmask: ADS_unmask_irq0, unmask: gc_unmask_irq1,
}; };
static void ADS_mask_and_ack_irq1(unsigned int irq) static void gc_mask_irq2(unsigned int irq)
{ {
int mask = (1 << (irq - ADS_EXT_IRQ(8))); int mask = (1 << (irq - ADS_EXT_IRQ(8)));
ADS_INT_EN2 &= ~mask; ADS_INT_EN2 &= ~mask;
ADS_INT_ST2 = mask; ADS_INT_ST2 = mask;
} }
static void ADS_mask_irq1(unsigned int irq) static void gc_unmask_irq2(unsigned int irq)
{
ADS_INT_ST2 = (1 << (irq - ADS_EXT_IRQ(8)));
}
static void ADS_unmask_irq1(unsigned int irq)
{ {
ADS_INT_EN2 |= (1 << (irq - ADS_EXT_IRQ(8))); ADS_INT_EN2 |= (1 << (irq - ADS_EXT_IRQ(8)));
} }
static struct irqchip ADS1_chip = { static struct irqchip gc_irq2_chip = {
ack: ADS_mask_and_ack_irq1, ack: gc_mask_irq2,
mask: ADS_mask_irq1, mask: gc_mask_irq2,
unmask: ADS_unmask_irq1, unmask: gc_unmask_irq2,
}; };
static void __init graphicsclient_init_irq(void) static void __init graphicsclient_init_irq(void)
...@@ -105,22 +100,23 @@ static void __init graphicsclient_init_irq(void) ...@@ -105,22 +100,23 @@ static void __init graphicsclient_init_irq(void)
/* disable all IRQs */ /* disable all IRQs */
ADS_INT_EN1 = 0; ADS_INT_EN1 = 0;
ADS_INT_EN2 = 0; ADS_INT_EN2 = 0;
/* clear all IRQs */ /* clear all IRQs */
ADS_INT_ST1 = 0xff; ADS_INT_ST1 = 0xff;
ADS_INT_ST2 = 0xff; ADS_INT_ST2 = 0xff;
for (irq = ADS_EXT_IRQ(0); irq <= ADS_EXT_IRQ(7); irq++) { for (irq = ADS_EXT_IRQ(0); irq <= ADS_EXT_IRQ(7); irq++) {
set_irq_chip(irq, &ADS0_chip); set_irq_chip(irq, &gc_irq1_chip);
set_irq_handler(irq, do_level_IRQ); set_irq_handler(irq, do_level_IRQ);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
} }
for (irq = ADS_EXT_IRQ(8); irq <= ADS_EXT_IRQ(15); irq++) { for (irq = ADS_EXT_IRQ(8); irq <= ADS_EXT_IRQ(15); irq++) {
set_irq_chip(irq, &ADS1_chip); set_irq_chip(irq, &gc_irq2_chip);
set_irq_handler(irq, do_level_IRQ); set_irq_handler(irq, do_level_IRQ);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
} }
set_GPIO_IRQ_edge(GPIO_GPIO0, GPIO_FALLING_EDGE); set_irq_type(IRQ_GPIO0, IRQT_FALLING);
setup_arm_irq( IRQ_GPIO0, &ADS_ext_irq ); set_irq_chained_handler(IRQ_GPIO0, gc_irq_handler);
} }
...@@ -148,111 +144,6 @@ static struct map_desc graphicsclient_io_desc[] __initdata = { ...@@ -148,111 +144,6 @@ static struct map_desc graphicsclient_io_desc[] __initdata = {
LAST_DESC LAST_DESC
}; };
static struct gc_uart_ctrl_data_t gc_uart_ctrl_data[] = {
{ GPIO_GC_UART0_CTS, 0, NULL,NULL },
{ GPIO_GC_UART1_CTS, 0, NULL,NULL },
{ GPIO_GC_UART2_CTS, 0, NULL,NULL }
};
#error Old code. Someone needs to decide what to do with this
#if 0
static void
graphicsclient_cts_intr(int irq, void *dev_id, struct pt_regs *regs)
{
struct gc_uart_ctrl_data_t * uart_data = (struct gc_uart_ctrl_data_t *)dev_id;
int cts = !(GPLR & uart_data->cts_gpio);
/* NOTE: I supose that we will no get any interrupt
if the GPIO is not changed, so maybe
the cts_prev_state can be removed ... */
if (cts != uart_data->cts_prev_state) {
uart_data->cts_prev_state = cts;
uart_handle_cts_change(uart_data->info, cts);
}
}
static int
graphicsclient_register_cts_intr(int gpio, int irq,
struct gc_uart_ctrl_data_t *uart_data)
{
int ret = 0;
set_GPIO_IRQ_edge(gpio, GPIO_BOTH_EDGES);
ret = request_irq(irq, graphicsclient_cts_intr,
0, "GC RS232 CTS", uart_data);
if (ret) {
printk(KERN_ERR "uart_open: failed to register CTS irq (%d)\n",
ret);
free_irq(irq, uart_data);
}
return ret;
}
static int
graphicsclient_uart_open(struct uart_port *port, struct uart_info *info)
{
int ret = 0;
if (port->mapbase == _Ser1UTCR0) {
Ser1SDCR0 |= SDCR0_UART;
/* Set RTS Output */
GPSR = GPIO_GC_UART0_RTS;
gc_uart_ctrl_data[0].cts_prev_state = 0;
gc_uart_ctrl_data[0].info = info;
gc_uart_ctrl_data[0].port = port;
/* register uart0 CTS irq */
ret = graphicsclient_register_cts_intr(GPIO_GC_UART0_CTS,
IRQ_GC_UART0_CTS,
&gc_uart_ctrl_data[0]);
} else if (port->mapbase == _Ser2UTCR0) {
Ser2UTCR4 = Ser2HSCR0 = 0;
/* Set RTS Output */
GPSR = GPIO_GC_UART1_RTS;
gc_uart_ctrl_data[1].cts_prev_state = 0;
gc_uart_ctrl_data[1].info = info;
gc_uart_ctrl_data[1].port = port;
/* register uart1 CTS irq */
ret = graphicsclient_register_cts_intr(GPIO_GC_UART1_CTS,
IRQ_GC_UART1_CTS,
&gc_uart_ctrl_data[1]);
} else if (port->mapbase == _Ser3UTCR0) {
/* Set RTS Output */
GPSR = GPIO_GC_UART2_RTS;
gc_uart_ctrl_data[2].cts_prev_state = 0;
gc_uart_ctrl_data[2].info = info;
gc_uart_ctrl_data[2].port = port;
/* register uart2 CTS irq */
ret = graphicsclient_register_cts_intr(GPIO_GC_UART2_CTS,
IRQ_GC_UART2_CTS,
&gc_uart_ctrl_data[2]);
}
return ret;
}
static int
graphicsclient_uart_close(struct uart_port *port, struct uart_info *info)
{
if (port->mapbase == _Ser1UTCR0) {
free_irq(IRQ_GC_UART0_CTS, &gc_uart_ctrl_data[0]);
} else if (port->mapbase == _Ser2UTCR0) {
free_irq(IRQ_GC_UART1_CTS, &gc_uart_ctrl_data[1]);
} else if (port->mapbase == _Ser3UTCR0) {
free_irq(IRQ_GC_UART2_CTS, &gc_uart_ctrl_data[2]);
}
return 0;
}
#endif
static u_int graphicsclient_get_mctrl(struct uart_port *port) static u_int graphicsclient_get_mctrl(struct uart_port *port)
{ {
u_int result = TIOCM_CD | TIOCM_DSR; u_int result = TIOCM_CD | TIOCM_DSR;
......
...@@ -76,15 +76,6 @@ ...@@ -76,15 +76,6 @@
#define IRQ_GC_UART1_CTS IRQ_GPIO16 #define IRQ_GC_UART1_CTS IRQ_GPIO16
#define IRQ_GC_UART2_CTS IRQ_GPIO17 #define IRQ_GC_UART2_CTS IRQ_GPIO17
#ifndef __ASSEMBLY__
struct gc_uart_ctrl_data_t {
int cts_gpio;
int cts_prev_state;
struct uart_info *info;
struct uart_port *port;
};
#endif /* __ASSEMBLY__ */
/* LEDs */ /* LEDs */
#define ADS_LED0 GPIO_GPIO20 /* on-board D22 */ #define ADS_LED0 GPIO_GPIO20 /* on-board D22 */
......
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