Commit 2804ba4e authored by Jisheng Zhang's avatar Jisheng Zhang Committed by David S. Miller

net: mvneta: Try to get named core clock first

Some platforms may provide more than one clk for the mvneta IP, for
example Marvell BG4CT provides one clk for the mac core, and one
clk for the AXI bus logic.

To support for more than one clock, we'll need to distinguish between
the clock by name. Change clock probing to first try to get "core"
clock before falling back to unnamed clock.
Signed-off-by: default avatarJisheng Zhang <jszhang@marvell.com>
Acked-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 0e03f563
......@@ -3604,6 +3604,8 @@ static int mvneta_probe(struct platform_device *pdev)
pp->indir[0] = rxq_def;
pp->clk = devm_clk_get(&pdev->dev, "core");
if (IS_ERR(pp->clk))
pp->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(pp->clk)) {
err = PTR_ERR(pp->clk);
......
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