mlx5_core: Adjust hca_cap.uar_page_sz to conform to Connect-IB spec

Sparse reported an endianness bug in the assignment to hca_cap.uar_page_sz.

Fix the declaration of this field to be __be16 (which is what is in
the firmware spec), renaming the field to log_uar_pg_size to conform
to the spec, which fixes the endianness bug reported by sparse.
Reported-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Moshe Lazer <moshel@mellanox.com>
Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com>
Signed-off-by: Roland Dreier <roland@purestorage.com>

drivers/net/ethernet/mellanox/mlx5/core/main.c

@@ -212,7 +212,7 @@ static int handle_hca_cap(struct mlx5_core_dev *dev)
 		set_ctx->hca_cap.log_max_qp = dev->profile->log_max_qp;
 
 	memset(&set_out, 0, sizeof(set_out));
-	set_ctx->hca_cap.uar_page_sz = cpu_to_be16(PAGE_SHIFT - 12);
+	set_ctx->hca_cap.log_uar_page_sz = cpu_to_be16(PAGE_SHIFT - 12);
 	set_ctx->hdr.opcode = cpu_to_be16(MLX5_CMD_OP_SET_HCA_CAP);
 	err = mlx5_cmd_exec(dev, set_ctx, sizeof(*set_ctx),
 				 &set_out, sizeof(set_out));

include/linux/mlx5/device.h

@@ -317,8 +317,8 @@ struct mlx5_hca_cap {
 	u8	log_max_pd;
 	u8	rsvd25;
 	u8	log_max_xrcd;
-	u8	rsvd26[40];
-	__be32  uar_page_sz;
+	u8	rsvd26[42];
+	__be16  log_uar_page_sz;
 	u8	rsvd27[28];
 	u8	log_msx_atomic_size_qp;
 	u8	rsvd28[2];