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Commit 29277173 authored by Andrew Morton's avatar Andrew Morton Committed by Linus Torvalds
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[PATCH] sn: code pruning - a couple of adds due to the clean up 

From: Pat Gefre <pfg@sgi.com>

Mostly code pruning - a couple of adds due to the clean up
parent e9b19b04
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Inline Side-by-side
Showing with 63 additions and 439 deletions
arch/ia64/sn/io/sn2/klconflib.c
View file @ 29277173
......@@ -30,6 +30,7 @@
#define DBG(x...)
#endif /* DEBUG_KLGRAPH */
lboard_t *root_lboard[MAX_COMPACT_NODES];
u64 klgraph_addr[MAX_COMPACT_NODES];
static int hasmetarouter;
......
arch/ia64/sn/io/sn2/ml_iograph.c
View file @ 29277173
......@@ -489,70 +489,6 @@ io_init_xswitch_widgets(vertex_hdl_t xswitchv, cnodeid_t cnode)
}
}
/*
* For each PCI bridge connected to the xswitch, add a link from the
* board's klconfig info to the bridge's hwgraph vertex. This lets
* the FRU analyzer find the bridge without traversing the hardware
* graph and risking hangs.
*/
static void
io_link_xswitch_widgets(vertex_hdl_t xswitchv, cnodeid_t cnodeid)
{
xwidgetnum_t widgetnum;
char pathname[128];
vertex_hdl_t vhdl;
nasid_t nasid, peer_nasid;
lboard_t *board;
/* And its connected hub's nasids */
nasid = COMPACT_TO_NASID_NODEID(cnodeid);
peer_nasid = NODEPDA(cnodeid)->xbow_peer;
/*
* Look for paths matching "<widgetnum>/pci" under xswitchv.
* For every widget, init. its lboard's hwgraph link. If the
* board has a PCI bridge, point the link to it.
*/
for (widgetnum = HUB_WIDGET_ID_MIN; widgetnum <= HUB_WIDGET_ID_MAX;
widgetnum++) {
sprintf(pathname, "%d", widgetnum);
if (hwgraph_traverse(xswitchv, pathname, &vhdl) !=
GRAPH_SUCCESS)
continue;
board = find_lboard_module((lboard_t *)KL_CONFIG_INFO(nasid),
NODEPDA(cnodeid)->geoid);
if (board == NULL && peer_nasid != INVALID_NASID) {
/*
* Try to find the board on our peer
*/
board = find_lboard_module(
(lboard_t *)KL_CONFIG_INFO(peer_nasid),
NODEPDA(cnodeid)->geoid);
}
if (board == NULL) {
printk(KERN_WARNING "Could not find PROM info for vertex 0x%p, "
"FRU analyzer may fail",
(void *)vhdl);
return;
}
/* Check both buses */
sprintf(pathname, "%d/"EDGE_LBL_PCIX_0, widgetnum);
if (hwgraph_traverse(xswitchv, pathname, &vhdl) == GRAPH_SUCCESS)
board->brd_graph_link = vhdl;
else {
sprintf(pathname, "%d/"EDGE_LBL_PCIX_1, widgetnum);
if (hwgraph_traverse(xswitchv, pathname, &vhdl) == GRAPH_SUCCESS)
board->brd_graph_link = vhdl;
else
board->brd_graph_link = GRAPH_VERTEX_NONE;
}
}
}
/*
* Initialize all I/O on the specified node.
*/
......@@ -724,7 +660,6 @@ io_init_node(cnodeid_t cnodeid)
/* Now both nodes can safely inititialize widgets */
io_init_xswitch_widgets(switchv, cnodeid);
io_link_xswitch_widgets(switchv, cnodeid);
DBG("\nio_init_node: DONE INITIALIZED ALL I/O FOR CNODEID %d\n\n", cnodeid);
}
......
arch/ia64/sn/io/sn2/shub_intr.c
View file @ 29277173
......@@ -61,7 +61,6 @@ do_hub_intr_alloc(vertex_hdl_t dev,
iopaddr_t xtalk_addr;
struct xtalk_intr_s *xtalk_info;
xwidget_info_t xwidget_info;
ilvl_t intr_swlevel = 0;
cpu = intr_heuristic(dev, -1, &vector);
if (cpu == CPU_NONE) {
......@@ -94,7 +93,6 @@ do_hub_intr_alloc(vertex_hdl_t dev,
xtalk_info->xi_target = xwidget_info_masterid_get(xwidget_info);
}
intr_hdl->i_swlevel = intr_swlevel;
intr_hdl->i_cpuid = cpu;
intr_hdl->i_bit = vector;
intr_hdl->i_flags |= HUB_INTR_IS_ALLOCED;
......
arch/ia64/sn/kernel/setup.c
View file @ 29277173
......@@ -69,6 +69,8 @@ u64 sn_partition_serial_number;
short physical_node_map[MAX_PHYSNODE_ID];
int numionodes;
/*
* This is the address of the RRegs in the HSpace of the global
* master. It is used by a hack in serial.c (serial_[in|out],
......@@ -302,6 +304,7 @@ void
sn_init_pdas(char **cmdline_p)
{
cnodeid_t cnode;
void scan_for_ionodes(void);
/*
* Make sure that the PDA fits entirely in the same page as the
......@@ -314,6 +317,9 @@ sn_init_pdas(char **cmdline_p)
for (cnode=0; cnode<numnodes; cnode++)
pda->cnodeid_to_nasid_table[cnode] = pxm_to_nasid(nid_to_pxm_map[cnode]);
numionodes = numnodes;
scan_for_ionodes();
/*
* Allocate & initalize the nodepda for each node.
*/
......@@ -415,3 +421,33 @@ sn_cpu_init(void)
bte_init_cpu();
}
/*
* Scan klconfig for ionodes. Add the nasids to the
* physical_node_map and the pda and increment numionodes.
*/
void
scan_for_ionodes(void) {
int nasid = 0;
lboard_t *brd;
/* Setup ionodes with memory */
for (nasid = 0; nasid < MAX_PHYSNODE_ID; nasid +=2) {
u64 klgraph_header;
cnodeid_t cnodeid;
if (physical_node_map[nasid] == -1)
continue;
klgraph_header = cnodeid = -1;
klgraph_header = ia64_sn_get_klconfig_addr(nasid);
if (klgraph_header <= 0)
BUG(); /* All nodes must have klconfig tables! */
cnodeid = nasid_to_cnodeid(nasid);
root_lboard[cnodeid] = (lboard_t *)
NODE_OFFSET_TO_LBOARD( (nasid),
((kl_config_hdr_t *)(klgraph_header))->
ch_board_info);
}
}
include/asm-ia64/sn/ioerror_handling.h
View file @ 29277173
......@@ -203,12 +203,6 @@ enum error_priority_e {
typedef uint64_t error_priority_t;
/* Error state interfaces */
#if defined(CONFIG_SGI_IO_ERROR_HANDLING)
extern error_return_code_t error_state_set(vertex_hdl_t,error_state_t);
extern error_state_t error_state_get(vertex_hdl_t);
#endif
/* Error action interfaces */
extern error_return_code_t error_action_set(vertex_hdl_t,
......@@ -231,42 +225,6 @@ hwgraph_info_get_LBL(v, INFO_LBL_ERROR_SKIP_ENV, (arbitrary_info_t *)&l)
#define v_error_skip_env_clear(v) \
hwgraph_info_remove_LBL(v, INFO_LBL_ERROR_SKIP_ENV, 0)
/* REFERENCED */
#if defined(CONFIG_SGI_IO_ERROR_HANDLING)
inline static int
error_skip_point_mark(vertex_hdl_t v)
{
label_t *error_env = NULL;
int code = 0;
/* Check if we have a valid hwgraph vertex */
#ifdef LATER
if (!dev_is_vertex(v))
return(code);
#endif
/* There is no error jump buffer for this device vertex. Allocate
* one.
*/
if (v_error_skip_env_get(v, error_env) != GRAPH_SUCCESS) {
error_env = kmalloc(sizeof(label_t), GFP_KERNEL);
/* Unable to allocate memory for jum buffer. This should
* be a very rare occurrence.
*/
if (!error_env)
return(-1);
memset(error_env, 0, sizeof(label_t));
/* Store the jump buffer information on the vertex.*/
if (v_error_skip_env_set(v, error_env, 0) != GRAPH_SUCCESS)
return(-2);
}
ASSERT(v_error_skip_env_get(v, error_env) == GRAPH_SUCCESS);
code = setjmp(*error_env);
return(code);
}
#endif /* CONFIG_SGI_IO_ERROR_HANDLING */
typedef uint64_t counter_t;
extern counter_t error_retry_count_get(vertex_hdl_t);
......
include/asm-ia64/sn/klconfig.h
View file @ 29277173
This diff is collapsed.
include/asm-ia64/sn/pci/pci_defs.h
View file @ 29277173
......@@ -275,16 +275,6 @@ extern void pci_write(void * address, int data, int type);
#define CFG1_DEVICE_SHIFT 11
#define CFG1_BUS_SHIFT 16
#ifdef CONFIG_SGI_IP32
/* Definitions related to IP32 PCI Bridge policy
* XXX- should probaly be moved to a mace-specific header
*/
#define PCI_CONFIG_BITS 0xfe0085ff
#define PCI_CONTROL_MRMRA_ENABLE 0x00000800
#define PCI_FIRST_IO_ADDR 0x1000
#define PCI_IO_MAP_INCR 0x1000
#endif /* CONFIG_SGI_IP32 */
/*
* Class codes
*/
......
include/asm-ia64/sn/sn2/shub.h
View file @ 29277173
/*
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
......
include/asm-ia64/sn/sn2/sn_private.h
View file @ 29277173
......@@ -153,7 +153,6 @@ struct hub_dmamap_s {
*/
struct hub_intr_s {
struct xtalk_intr_s i_xtalk_info; /* standard crosstalk intr info */
ilvl_t i_swlevel; /* software level for blocking intr */
cpuid_t i_cpuid; /* which cpu */
int i_bit; /* which bit */
int i_flags;
......
include/asm-ia64/sn/xtalk/xbow_info.h
View file @ 29277173
......@@ -11,24 +11,6 @@
#include <linux/types.h>
#define XBOW_PERF_MODES 0x03
#define XBOW_PERF_COUNTERS 0x02
#define XBOW_MONITOR_NONE 0x00
#define XBOW_MONITOR_SRC_LINK 0x01
#define XBOW_MONITOR_DEST_LINK 0x02
#define XBOW_MONITOR_INP_PKT 0x03
#define XBOW_MONITOR_MULTIPLEX 0x04
#define XBOW_LINK_MULTIPLEX 0x20
#define XBOW_PERF_TIMEOUT 4
#define XBOW_STATS_TIMEOUT HZ
typedef struct xbow_perf_link {
uint64_t xlp_cumulative[XBOW_PERF_MODES];
unsigned char xlp_link_alive;
} xbow_perf_link_t;
typedef struct xbow_link_status {
uint64_t rx_err_count;
......@@ -36,32 +18,4 @@ typedef struct xbow_link_status {
} xbow_link_status_t;
typedef struct xbow_perf {
uint32_t xp_current;
unsigned char xp_link;
unsigned char xp_mode;
unsigned char xp_curlink;
unsigned char xp_curmode;
volatile uint32_t *xp_perf_reg;
} xbow_perf_t;
extern void xbow_update_perf_counters(vertex_hdl_t);
extern xbow_perf_link_t *xbow_get_perf_counters(vertex_hdl_t);
extern int xbow_enable_perf_counter(vertex_hdl_t, int, int, int);
#define XBOWIOC_PERF_ENABLE 1
#define XBOWIOC_PERF_DISABLE 2
#define XBOWIOC_PERF_GET 3
#define XBOWIOC_LLP_ERROR_ENABLE 4
#define XBOWIOC_LLP_ERROR_DISABLE 5
#define XBOWIOC_LLP_ERROR_GET 6
struct xbow_perfarg_t {
int link;
int mode;
int counter;
};
#endif /* _ASM_SN_XTALK_XBOW_INFO_H */
#endif /* _ASM_IA64_SN_XTALK_XBOW_INFO_H */
include/asm-ia64/sn/xtalk/xtalk_private.h
View file @ 29277173
......@@ -51,12 +51,6 @@ struct xtalk_intr_s {
/*
* Xtalk interrupt handler structure access functions
*/
#define xtalk_intr_arg(xt) ((xt)->xi_sfarg)
#define xwidget_hwid_is_sn0_xswitch(_hwid) \
(((_hwid)->part_num == XBOW_WIDGET_PART_NUM ) && \
((_hwid)->mfg_num == XBOW_WIDGET_MFGR_NUM ))
#define xwidget_hwid_is_sn1_xswitch(_hwid) \
(((_hwid)->part_num == XXBOW_WIDGET_PART_NUM || \
(_hwid)->part_num == PXBOW_WIDGET_PART_NUM) && \
......
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