drm/amd/powerplay: add global PowerPlay mutex.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drivers/gpu/drm/amd/powerplay/amd_powerplay.c

@@ -341,8 +341,9 @@ static int pp_dpm_force_performance_level(void *handle,
 		return 0;
 	}
 
+	mutex_lock(&pp_handle->pp_lock);
 	hwmgr->hwmgr_func->force_dpm_level(hwmgr, level);
-
+	mutex_unlock(&pp_handle->pp_lock);
 	return 0;
 }
 
@@ -352,6 +353,7 @@ static enum amd_dpm_forced_level pp_dpm_get_performance_level(
 	struct pp_hwmgr  *hwmgr;
 	struct pp_instance *pp_handle = (struct pp_instance *)handle;
 	int ret = 0;
+	enum amd_dpm_forced_level level;
 
 	ret = pp_check(pp_handle);
 
@@ -359,8 +361,10 @@ static enum amd_dpm_forced_level pp_dpm_get_performance_level(
 		return ret;
 
 	hwmgr = pp_handle->hwmgr;
-
-	return hwmgr->dpm_level;
+	mutex_lock(&pp_handle->pp_lock);
+	level = hwmgr->dpm_level;
+	mutex_unlock(&pp_handle->pp_lock);
+	return level;
 }
 
 static int pp_dpm_get_sclk(void *handle, bool low)
@@ -380,8 +384,10 @@ static int pp_dpm_get_sclk(void *handle, bool low)
 		pr_info("%s was not implemented.\n", __func__);
 		return 0;
 	}
-
-	return hwmgr->hwmgr_func->get_sclk(hwmgr, low);
+	mutex_lock(&pp_handle->pp_lock);
+	ret = hwmgr->hwmgr_func->get_sclk(hwmgr, low);
+	mutex_unlock(&pp_handle->pp_lock);
+	return ret;
 }
 
 static int pp_dpm_get_mclk(void *handle, bool low)
@@ -401,8 +407,10 @@ static int pp_dpm_get_mclk(void *handle, bool low)
 		pr_info("%s was not implemented.\n", __func__);
 		return 0;
 	}
-
-	return hwmgr->hwmgr_func->get_mclk(hwmgr, low);
+	mutex_lock(&pp_handle->pp_lock);
+	ret = hwmgr->hwmgr_func->get_mclk(hwmgr, low);
+	mutex_unlock(&pp_handle->pp_lock);
+	return ret;
 }
 
 static int pp_dpm_powergate_vce(void *handle, bool gate)
@@ -422,8 +430,10 @@ static int pp_dpm_powergate_vce(void *handle, bool gate)
 		pr_info("%s was not implemented.\n", __func__);
 		return 0;
 	}
-
-	return hwmgr->hwmgr_func->powergate_vce(hwmgr, gate);
+	mutex_lock(&pp_handle->pp_lock);
+	ret = hwmgr->hwmgr_func->powergate_vce(hwmgr, gate);
+	mutex_unlock(&pp_handle->pp_lock);
+	return ret;
 }
 
 static int pp_dpm_powergate_uvd(void *handle, bool gate)
@@ -443,8 +453,10 @@ static int pp_dpm_powergate_uvd(void *handle, bool gate)
 		pr_info("%s was not implemented.\n", __func__);
 		return 0;
 	}
-
-	return hwmgr->hwmgr_func->powergate_uvd(hwmgr, gate);
+	mutex_lock(&pp_handle->pp_lock);
+	ret = hwmgr->hwmgr_func->powergate_uvd(hwmgr, gate);
+	mutex_unlock(&pp_handle->pp_lock);
+	return ret;
 }
 
 static enum PP_StateUILabel power_state_convert(enum amd_pm_state_type  state)
@@ -472,7 +484,7 @@ static int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_event event_id,
 
 	if (ret != 0)
 		return ret;
-
+	mutex_lock(&pp_handle->pp_lock);
 	switch (event_id) {
 	case AMD_PP_EVENT_DISPLAY_CONFIG_CHANGE:
 		ret = pem_handle_event(pp_handle->eventmgr, event_id, &data);
@@ -498,6 +510,7 @@ static int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_event event_id,
 	default:
 		break;
 	}
+	mutex_unlock(&pp_handle->pp_lock);
 	return ret;
 }
 
@@ -507,6 +520,7 @@ static enum amd_pm_state_type pp_dpm_get_current_power_state(void *handle)
 	struct pp_power_state *state;
 	struct pp_instance *pp_handle = (struct pp_instance *)handle;
 	int ret = 0;
+	enum amd_pm_state_type pm_type;
 
 	ret = pp_check(pp_handle);
 
@@ -518,21 +532,26 @@ static enum amd_pm_state_type pp_dpm_get_current_power_state(void *handle)
 	if (hwmgr->current_ps == NULL)
 		return -EINVAL;
 
+	mutex_lock(&pp_handle->pp_lock);
+
 	state = hwmgr->current_ps;
 
 	switch (state->classification.ui_label) {
 	case PP_StateUILabel_Battery:
-		return POWER_STATE_TYPE_BATTERY;
+		pm_type = POWER_STATE_TYPE_BATTERY;
 	case PP_StateUILabel_Balanced:
-		return POWER_STATE_TYPE_BALANCED;
+		pm_type = POWER_STATE_TYPE_BALANCED;
 	case PP_StateUILabel_Performance:
-		return POWER_STATE_TYPE_PERFORMANCE;
+		pm_type = POWER_STATE_TYPE_PERFORMANCE;
 	default:
 		if (state->classification.flags & PP_StateClassificationFlag_Boot)
-			return  POWER_STATE_TYPE_INTERNAL_BOOT;
+			pm_type = POWER_STATE_TYPE_INTERNAL_BOOT;
 		else
-			return POWER_STATE_TYPE_DEFAULT;
+			pm_type = POWER_STATE_TYPE_DEFAULT;
 	}
+	mutex_unlock(&pp_handle->pp_lock);
+
+	return pm_type;
 }
 
 static int pp_dpm_set_fan_control_mode(void *handle, uint32_t mode)
@@ -552,8 +571,10 @@ static int pp_dpm_set_fan_control_mode(void *handle, uint32_t mode)
 		pr_info("%s was not implemented.\n", __func__);
 		return 0;
 	}
-
-	return hwmgr->hwmgr_func->set_fan_control_mode(hwmgr, mode);
+	mutex_lock(&pp_handle->pp_lock);
+	ret = hwmgr->hwmgr_func->set_fan_control_mode(hwmgr, mode);
+	mutex_unlock(&pp_handle->pp_lock);
+	return ret;
 }
 
 static int pp_dpm_get_fan_control_mode(void *handle)
@@ -573,8 +594,10 @@ static int pp_dpm_get_fan_control_mode(void *handle)
 		pr_info("%s was not implemented.\n", __func__);
 		return 0;
 	}
-
-	return hwmgr->hwmgr_func->get_fan_control_mode(hwmgr);
+	mutex_lock(&pp_handle->pp_lock);
+	ret = hwmgr->hwmgr_func->get_fan_control_mode(hwmgr);
+	mutex_unlock(&pp_handle->pp_lock);
+	return ret;
 }
 
 static int pp_dpm_set_fan_speed_percent(void *handle, uint32_t percent)
@@ -594,8 +617,10 @@ static int pp_dpm_set_fan_speed_percent(void *handle, uint32_t percent)
 		pr_info("%s was not implemented.\n", __func__);
 		return 0;
 	}
-
-	return hwmgr->hwmgr_func->set_fan_speed_percent(hwmgr, percent);
+	mutex_lock(&pp_handle->pp_lock);
+	ret = hwmgr->hwmgr_func->set_fan_speed_percent(hwmgr, percent);
+	mutex_unlock(&pp_handle->pp_lock);
+	return ret;
 }
 
 static int pp_dpm_get_fan_speed_percent(void *handle, uint32_t *speed)
@@ -616,7 +641,10 @@ static int pp_dpm_get_fan_speed_percent(void *handle, uint32_t *speed)
 		return 0;
 	}
 
-	return hwmgr->hwmgr_func->get_fan_speed_percent(hwmgr, speed);
+	mutex_lock(&pp_handle->pp_lock);
+	ret = hwmgr->hwmgr_func->get_fan_speed_percent(hwmgr, speed);
+	mutex_unlock(&pp_handle->pp_lock);
+	return ret;
 }
 
 static int pp_dpm_get_fan_speed_rpm(void *handle, uint32_t *rpm)
@@ -635,7 +663,10 @@ static int pp_dpm_get_fan_speed_rpm(void *handle, uint32_t *rpm)
 	if (hwmgr->hwmgr_func->get_fan_speed_rpm == NULL)
 		return -EINVAL;
 
-	return hwmgr->hwmgr_func->get_fan_speed_rpm(hwmgr, rpm);
+	mutex_lock(&pp_handle->pp_lock);
+	ret = hwmgr->hwmgr_func->get_fan_speed_rpm(hwmgr, rpm);
+	mutex_unlock(&pp_handle->pp_lock);
+	return ret;
 }
 
 static int pp_dpm_get_temperature(void *handle)
@@ -655,8 +686,10 @@ static int pp_dpm_get_temperature(void *handle)
 		pr_info("%s was not implemented.\n", __func__);
 		return 0;
 	}
-
-	return hwmgr->hwmgr_func->get_temperature(hwmgr);
+	mutex_lock(&pp_handle->pp_lock);
+	ret = hwmgr->hwmgr_func->get_temperature(hwmgr);
+	mutex_unlock(&pp_handle->pp_lock);
+	return ret;
 }
 
 static int pp_dpm_get_pp_num_states(void *handle,
@@ -677,6 +710,8 @@ static int pp_dpm_get_pp_num_states(void *handle,
 	if (hwmgr->ps == NULL)
 		return -EINVAL;
 
+	mutex_lock(&pp_handle->pp_lock);
+
 	data->nums = hwmgr->num_ps;
 
 	for (i = 0; i < hwmgr->num_ps; i++) {
@@ -699,7 +734,7 @@ static int pp_dpm_get_pp_num_states(void *handle,
 				data->states[i] = POWER_STATE_TYPE_DEFAULT;
 		}
 	}
-
+	mutex_unlock(&pp_handle->pp_lock);
 	return 0;
 }
 
@@ -708,6 +743,7 @@ static int pp_dpm_get_pp_table(void *handle, char **table)
 	struct pp_hwmgr *hwmgr;
 	struct pp_instance *pp_handle = (struct pp_instance *)handle;
 	int ret = 0;
+	int size = 0;
 
 	ret = pp_check(pp_handle);
 
@@ -719,9 +755,11 @@ static int pp_dpm_get_pp_table(void *handle, char **table)
 	if (!hwmgr->soft_pp_table)
 		return -EINVAL;
 
+	mutex_lock(&pp_handle->pp_lock);
 	*table = (char *)hwmgr->soft_pp_table;
-
-	return hwmgr->soft_pp_table_size;
+	size = hwmgr->soft_pp_table_size;
+	mutex_unlock(&pp_handle->pp_lock);
+	return size;
 }
 
 static int pp_dpm_set_pp_table(void *handle, const char *buf, size_t size)
@@ -736,19 +774,21 @@ static int pp_dpm_set_pp_table(void *handle, const char *buf, size_t size)
 		return ret;
 
 	hwmgr = pp_handle->hwmgr;
-
+	mutex_lock(&pp_handle->pp_lock);
 	if (!hwmgr->hardcode_pp_table) {
 		hwmgr->hardcode_pp_table = kmemdup(hwmgr->soft_pp_table,
 						   hwmgr->soft_pp_table_size,
 						   GFP_KERNEL);
-
-		if (!hwmgr->hardcode_pp_table)
+		if (!hwmgr->hardcode_pp_table) {
+			mutex_unlock(&pp_handle->pp_lock);
 			return -ENOMEM;
 		}
+	}
 
 	memcpy(hwmgr->hardcode_pp_table, buf, size);
 
 	hwmgr->soft_pp_table = hwmgr->hardcode_pp_table;
+	mutex_unlock(&pp_handle->pp_lock);
 
 	ret = amd_powerplay_reset(handle);
 	if (ret)
@@ -781,8 +821,10 @@ static int pp_dpm_force_clock_level(void *handle,
 		pr_info("%s was not implemented.\n", __func__);
 		return 0;
 	}
-
-	return hwmgr->hwmgr_func->force_clock_level(hwmgr, type, mask);
+	mutex_lock(&pp_handle->pp_lock);
+	hwmgr->hwmgr_func->force_clock_level(hwmgr, type, mask);
+	mutex_unlock(&pp_handle->pp_lock);
+	return ret;
 }
 
 static int pp_dpm_print_clock_levels(void *handle,
@@ -803,7 +845,10 @@ static int pp_dpm_print_clock_levels(void *handle,
 		pr_info("%s was not implemented.\n", __func__);
 		return 0;
 	}
-	return hwmgr->hwmgr_func->print_clock_levels(hwmgr, type, buf);
+	mutex_lock(&pp_handle->pp_lock);
+	ret = hwmgr->hwmgr_func->print_clock_levels(hwmgr, type, buf);
+	mutex_unlock(&pp_handle->pp_lock);
+	return ret;
 }
 
 static int pp_dpm_get_sclk_od(void *handle)
@@ -823,8 +868,10 @@ static int pp_dpm_get_sclk_od(void *handle)
 		pr_info("%s was not implemented.\n", __func__);
 		return 0;
 	}
-
-	return hwmgr->hwmgr_func->get_sclk_od(hwmgr);
+	mutex_lock(&pp_handle->pp_lock);
+	ret = hwmgr->hwmgr_func->get_sclk_od(hwmgr);
+	mutex_unlock(&pp_handle->pp_lock);
+	return ret;
 }
 
 static int pp_dpm_set_sclk_od(void *handle, uint32_t value)
@@ -845,7 +892,10 @@ static int pp_dpm_set_sclk_od(void *handle, uint32_t value)
 		return 0;
 	}
 
-	return hwmgr->hwmgr_func->set_sclk_od(hwmgr, value);
+	mutex_lock(&pp_handle->pp_lock);
+	ret = hwmgr->hwmgr_func->set_sclk_od(hwmgr, value);
+	mutex_lock(&pp_handle->pp_lock);
+	return ret;
 }
 
 static int pp_dpm_get_mclk_od(void *handle)
@@ -865,8 +915,10 @@ static int pp_dpm_get_mclk_od(void *handle)
 		pr_info("%s was not implemented.\n", __func__);
 		return 0;
 	}
-
-	return hwmgr->hwmgr_func->get_mclk_od(hwmgr);
+	mutex_lock(&pp_handle->pp_lock);
+	ret = hwmgr->hwmgr_func->get_mclk_od(hwmgr);
+	mutex_unlock(&pp_handle->pp_lock);
+	return ret;
 }
 
 static int pp_dpm_set_mclk_od(void *handle, uint32_t value)
@@ -886,8 +938,10 @@ static int pp_dpm_set_mclk_od(void *handle, uint32_t value)
 		pr_info("%s was not implemented.\n", __func__);
 		return 0;
 	}
-
-	return hwmgr->hwmgr_func->set_mclk_od(hwmgr, value);
+	mutex_lock(&pp_handle->pp_lock);
+	ret = hwmgr->hwmgr_func->set_mclk_od(hwmgr, value);
+	mutex_unlock(&pp_handle->pp_lock);
+	return ret;
 }
 
 static int pp_dpm_read_sensor(void *handle, int idx,
@@ -909,7 +963,11 @@ static int pp_dpm_read_sensor(void *handle, int idx,
 		return 0;
 	}
 
-	return hwmgr->hwmgr_func->read_sensor(hwmgr, idx, value, size);
+	mutex_lock(&pp_handle->pp_lock);
+	ret = hwmgr->hwmgr_func->read_sensor(hwmgr, idx, value, size);
+	mutex_unlock(&pp_handle->pp_lock);
+
+	return ret;
 }
 
 static struct amd_vce_state*
@@ -1114,8 +1172,8 @@ int amd_powerplay_create(struct amd_pp_init *pp_init,
 	instance->pm_en = pp_init->pm_en;
 	instance->feature_mask = pp_init->feature_mask;
 	instance->device = pp_init->device;
+	mutex_init(&instance->pp_lock);
 	*handle = instance;
-
 	return 0;
 }
 
@@ -1186,9 +1244,9 @@ int amd_powerplay_display_configuration_change(void *handle,
 		return ret;
 
 	hwmgr = pp_handle->hwmgr;
-
+	mutex_lock(&pp_handle->pp_lock);
 	phm_store_dal_configuration_data(hwmgr, display_config);
-
+	mutex_unlock(&pp_handle->pp_lock);
 	return 0;
 }
 
@@ -1209,7 +1267,10 @@ int amd_powerplay_get_display_power_level(void *handle,
 	if (output == NULL)
 		return -EINVAL;
 
-	return phm_get_dal_power_level(hwmgr, output);
+	mutex_lock(&pp_handle->pp_lock);
+	ret = phm_get_dal_power_level(hwmgr, output);
+	mutex_unlock(&pp_handle->pp_lock);
+	return ret;
 }
 
 int amd_powerplay_get_current_clocks(void *handle,
@@ -1228,14 +1289,22 @@ int amd_powerplay_get_current_clocks(void *handle,
 
 	hwmgr = pp_handle->hwmgr;
 
+	mutex_lock(&pp_handle->pp_lock);
+
 	phm_get_dal_power_level(hwmgr, &simple_clocks);
 
-	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_PowerContainment)) {
-		if (0 != phm_get_clock_info(hwmgr, &hwmgr->current_ps->hardware, &hw_clocks, PHM_PerformanceLevelDesignation_PowerContainment))
-			PP_ASSERT_WITH_CODE(0, "Error in PHM_GetPowerContainmentClockInfo", return -1);
-	} else {
-		if (0 != phm_get_clock_info(hwmgr, &hwmgr->current_ps->hardware, &hw_clocks, PHM_PerformanceLevelDesignation_Activity))
-			PP_ASSERT_WITH_CODE(0, "Error in PHM_GetClockInfo", return -1);
+	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
+					PHM_PlatformCaps_PowerContainment))
+		ret = phm_get_clock_info(hwmgr, &hwmgr->current_ps->hardware,
+					&hw_clocks, PHM_PerformanceLevelDesignation_PowerContainment);
+	else
+		ret = phm_get_clock_info(hwmgr, &hwmgr->current_ps->hardware,
+					&hw_clocks, PHM_PerformanceLevelDesignation_Activity);
+
+	if (ret != 0) {
+		pr_info("Error in phm_get_clock_info \n");
+		mutex_unlock(&pp_handle->pp_lock);
+		return -EINVAL;
 	}
 
 	clocks->min_engine_clock = hw_clocks.min_eng_clk;
@@ -1254,14 +1323,12 @@ int amd_powerplay_get_current_clocks(void *handle,
 		clocks->max_engine_clock_in_sr = hw_clocks.max_eng_clk;
 		clocks->min_engine_clock_in_sr = hw_clocks.min_eng_clk;
 	}
-
+	mutex_unlock(&pp_handle->pp_lock);
 	return 0;
-
 }
 
 int amd_powerplay_get_clock_by_type(void *handle, enum amd_pp_clock_type type, struct amd_pp_clocks *clocks)
 {
-	int result = -1;
 	struct pp_hwmgr  *hwmgr;
 	struct pp_instance *pp_handle = (struct pp_instance *)handle;
 	int ret = 0;
@@ -1276,9 +1343,10 @@ int amd_powerplay_get_clock_by_type(void *handle, enum amd_pp_clock_type type, s
 	if (clocks == NULL)
 		return -EINVAL;
 
-	result = phm_get_clock_by_type(hwmgr, type, clocks);
-
-	return result;
+	mutex_lock(&pp_handle->pp_lock);
+	ret = phm_get_clock_by_type(hwmgr, type, clocks);
+	mutex_unlock(&pp_handle->pp_lock);
+	return ret;
 }
 
 int amd_powerplay_get_display_mode_validation_clocks(void *handle,
@@ -1295,13 +1363,15 @@ int amd_powerplay_get_display_mode_validation_clocks(void *handle,
 
 	hwmgr = pp_handle->hwmgr;
 
-
 	if (clocks == NULL)
 		return -EINVAL;
 
+	mutex_lock(&pp_handle->pp_lock);
+
 	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_DynamicPatchPowerState))
 		ret = phm_get_max_high_clocks(hwmgr, clocks);
 
+	mutex_unlock(&pp_handle->pp_lock);
 	return ret;
 }
 

drivers/gpu/drm/amd/powerplay/inc/pp_instance.h

@@ -39,6 +39,7 @@ struct pp_instance {
 	struct pp_smumgr *smu_mgr;
 	struct pp_hwmgr *hwmgr;
 	struct pp_eventmgr *eventmgr;
+	struct mutex pp_lock;
 };
 
 #endif