Commit 2a6c9c65 authored by Chunyan Zhang's avatar Chunyan Zhang Committed by Wim Van Sebroeck

watchdog: sprd: change to use usleep_range() instead of busy loop

After changing to check busy bit for the previous loading operation instead
of the current one, for most of cases, the busy bit is not set for the
first time of read, so there's no need to check so frequently, so this
patch use usleep_range() to replace cpu_relax() to avoid busy loop.

Also this patch change the max times to 11 which would be enough, since
according to the specification, the busy bit would be set after a new
loading operation and last 2 or 3 RTC clock cycles (about 60us~92us).

Fixes: 47760346 ("watchdog: Add Spreadtrum watchdog driver")
Original-by: default avatarLingling Xu <ling_ling.xu@unisoc.com>
Signed-off-by: default avatarChunyan Zhang <chunyan.zhang@unisoc.com>
Reviewed-by: default avatarGuenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20201029023933.24548-4-zhang.lyra@gmail.comSigned-off-by: default avatarGuenter Roeck <linux@roeck-us.net>
Signed-off-by: default avatarWim Van Sebroeck <wim@linux-watchdog.org>
parent 3e07d240
...@@ -6,6 +6,7 @@ ...@@ -6,6 +6,7 @@
#include <linux/bitops.h> #include <linux/bitops.h>
#include <linux/clk.h> #include <linux/clk.h>
#include <linux/delay.h>
#include <linux/device.h> #include <linux/device.h>
#include <linux/err.h> #include <linux/err.h>
#include <linux/interrupt.h> #include <linux/interrupt.h>
...@@ -53,7 +54,7 @@ ...@@ -53,7 +54,7 @@
#define SPRD_WDT_CNT_HIGH_SHIFT 16 #define SPRD_WDT_CNT_HIGH_SHIFT 16
#define SPRD_WDT_LOW_VALUE_MASK GENMASK(15, 0) #define SPRD_WDT_LOW_VALUE_MASK GENMASK(15, 0)
#define SPRD_WDT_LOAD_TIMEOUT 1000 #define SPRD_WDT_LOAD_TIMEOUT 11
struct sprd_wdt { struct sprd_wdt {
void __iomem *base; void __iomem *base;
...@@ -109,15 +110,17 @@ static int sprd_wdt_load_value(struct sprd_wdt *wdt, u32 timeout, ...@@ -109,15 +110,17 @@ static int sprd_wdt_load_value(struct sprd_wdt *wdt, u32 timeout,
u32 prtmr_step = pretimeout * SPRD_WDT_CNT_STEP; u32 prtmr_step = pretimeout * SPRD_WDT_CNT_STEP;
/* /*
* Waiting the load value operation done, * Checking busy bit to make sure the previous loading operation is
* it needs two or three RTC clock cycles. * done. According to the specification, the busy bit would be set
* after a new loading operation and last 2 or 3 RTC clock
* cycles (about 60us~92us).
*/ */
do { do {
val = readl_relaxed(wdt->base + SPRD_WDT_INT_RAW); val = readl_relaxed(wdt->base + SPRD_WDT_INT_RAW);
if (!(val & SPRD_WDT_LD_BUSY_BIT)) if (!(val & SPRD_WDT_LD_BUSY_BIT))
break; break;
cpu_relax(); usleep_range(10, 100);
} while (delay_cnt++ < SPRD_WDT_LOAD_TIMEOUT); } while (delay_cnt++ < SPRD_WDT_LOAD_TIMEOUT);
if (delay_cnt >= SPRD_WDT_LOAD_TIMEOUT) if (delay_cnt >= SPRD_WDT_LOAD_TIMEOUT)
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment