Commit 2b4baab3 authored by wwang's avatar wwang Committed by Greg Kroah-Hartman

staging: rts_pstor: Fix a bug that a MMCPlus card can't be accessed

1. Don't switch bus if cmd14 timedout
2. Add a new group of return codes for mmc_test_switch_bus
Signed-off-by: default avatarwwang <wei_wang@realsil.com.cn>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent a0138163
...@@ -2661,7 +2661,7 @@ static int mmc_test_switch_bus(struct rtsx_chip *chip, u8 width) ...@@ -2661,7 +2661,7 @@ static int mmc_test_switch_bus(struct rtsx_chip *chip, u8 width)
retval = sd_send_cmd_get_rsp(chip, BUSTEST_W, 0, SD_RSP_TYPE_R1, NULL, 0); retval = sd_send_cmd_get_rsp(chip, BUSTEST_W, 0, SD_RSP_TYPE_R1, NULL, 0);
if (retval != STATUS_SUCCESS) { if (retval != STATUS_SUCCESS) {
TRACE_RET(chip, STATUS_FAIL); TRACE_RET(chip, SWITCH_FAIL);
} }
if (width == MMC_8BIT_BUS) { if (width == MMC_8BIT_BUS) {
...@@ -2678,7 +2678,9 @@ static int mmc_test_switch_bus(struct rtsx_chip *chip, u8 width) ...@@ -2678,7 +2678,9 @@ static int mmc_test_switch_bus(struct rtsx_chip *chip, u8 width)
} }
if (!CHECK_PID(chip, 0x5209)) { if (!CHECK_PID(chip, 0x5209)) {
RTSX_WRITE_REG(chip, REG_SD_CFG3, 0x02, 0x02); retval = rtsx_write_register(chip, REG_SD_CFG3, 0x02, 0x02);
if (retval != STATUS_SUCCESS)
TRACE_RET(chip, SWITCH_ERR);
} }
retval = sd_write_data(chip, SD_TM_AUTO_WRITE_3, retval = sd_write_data(chip, SD_TM_AUTO_WRITE_3,
...@@ -2690,17 +2692,19 @@ static int mmc_test_switch_bus(struct rtsx_chip *chip, u8 width) ...@@ -2690,17 +2692,19 @@ static int mmc_test_switch_bus(struct rtsx_chip *chip, u8 width)
rtsx_read_register(chip, REG_SD_STAT2, &val2); rtsx_read_register(chip, REG_SD_STAT2, &val2);
rtsx_clear_sd_error(chip); rtsx_clear_sd_error(chip);
if ((val1 & 0xE0) || val2) { if ((val1 & 0xE0) || val2) {
TRACE_RET(chip, STATUS_FAIL); TRACE_RET(chip, SWITCH_ERR);
} }
} else { } else {
rtsx_clear_sd_error(chip); rtsx_clear_sd_error(chip);
rtsx_write_register(chip, REG_SD_CFG3, 0x02, 0); rtsx_write_register(chip, REG_SD_CFG3, 0x02, 0);
TRACE_RET(chip, STATUS_FAIL); TRACE_RET(chip, SWITCH_ERR);
} }
} }
if (!CHECK_PID(chip, 0x5209)) { if (!CHECK_PID(chip, 0x5209)) {
RTSX_WRITE_REG(chip, REG_SD_CFG3, 0x02, 0); retval = rtsx_write_register(chip, REG_SD_CFG3, 0x02, 0);
if (retval != STATUS_SUCCESS)
TRACE_RET(chip, SWITCH_ERR);
} }
RTSX_DEBUGP("SD/MMC CMD %d\n", BUSTEST_R); RTSX_DEBUGP("SD/MMC CMD %d\n", BUSTEST_R);
...@@ -2733,7 +2737,7 @@ static int mmc_test_switch_bus(struct rtsx_chip *chip, u8 width) ...@@ -2733,7 +2737,7 @@ static int mmc_test_switch_bus(struct rtsx_chip *chip, u8 width)
retval = rtsx_send_cmd(chip, SD_CARD, 100); retval = rtsx_send_cmd(chip, SD_CARD, 100);
if (retval < 0) { if (retval < 0) {
rtsx_clear_sd_error(chip); rtsx_clear_sd_error(chip);
TRACE_RET(chip, STATUS_FAIL); TRACE_RET(chip, SWITCH_ERR);
} }
ptr = rtsx_get_cmd_data(chip) + 1; ptr = rtsx_get_cmd_data(chip) + 1;
...@@ -2751,7 +2755,7 @@ static int mmc_test_switch_bus(struct rtsx_chip *chip, u8 width) ...@@ -2751,7 +2755,7 @@ static int mmc_test_switch_bus(struct rtsx_chip *chip, u8 width)
} }
retval = sd_send_cmd_get_rsp(chip, SWITCH, arg, SD_RSP_TYPE_R1b, rsp, 5); retval = sd_send_cmd_get_rsp(chip, SWITCH, arg, SD_RSP_TYPE_R1b, rsp, 5);
if ((retval == STATUS_SUCCESS) && !(rsp[4] & MMC_SWITCH_ERR)) { if ((retval == STATUS_SUCCESS) && !(rsp[4] & MMC_SWITCH_ERR)) {
return STATUS_SUCCESS; return SWITCH_SUCCESS;
} }
} }
} else { } else {
...@@ -2767,12 +2771,12 @@ static int mmc_test_switch_bus(struct rtsx_chip *chip, u8 width) ...@@ -2767,12 +2771,12 @@ static int mmc_test_switch_bus(struct rtsx_chip *chip, u8 width)
} }
retval = sd_send_cmd_get_rsp(chip, SWITCH, arg, SD_RSP_TYPE_R1b, rsp, 5); retval = sd_send_cmd_get_rsp(chip, SWITCH, arg, SD_RSP_TYPE_R1b, rsp, 5);
if ((retval == STATUS_SUCCESS) && !(rsp[4] & MMC_SWITCH_ERR)) { if ((retval == STATUS_SUCCESS) && !(rsp[4] & MMC_SWITCH_ERR)) {
return STATUS_SUCCESS; return SWITCH_SUCCESS;
} }
} }
} }
TRACE_RET(chip, STATUS_FAIL); TRACE_RET(chip, SWITCH_FAIL);
} }
...@@ -2880,21 +2884,30 @@ static int mmc_switch_timing_bus(struct rtsx_chip *chip, int switch_ddr) ...@@ -2880,21 +2884,30 @@ static int mmc_switch_timing_bus(struct rtsx_chip *chip, int switch_ddr)
TRACE_RET(chip, STATUS_FAIL); TRACE_RET(chip, STATUS_FAIL);
} }
if (mmc_test_switch_bus(chip, MMC_8BIT_BUS) == STATUS_SUCCESS) { /* Test Bus Procedure */
retval = mmc_test_switch_bus(chip, MMC_8BIT_BUS);
if (retval == SWITCH_SUCCESS) {
SET_MMC_8BIT(sd_card); SET_MMC_8BIT(sd_card);
chip->card_bus_width[chip->card2lun[SD_CARD]] = 8; chip->card_bus_width[chip->card2lun[SD_CARD]] = 8;
#ifdef SUPPORT_SD_LOCK #ifdef SUPPORT_SD_LOCK
sd_card->sd_lock_status &= ~SD_LOCK_1BIT_MODE; sd_card->sd_lock_status &= ~SD_LOCK_1BIT_MODE;
#endif #endif
} else if (mmc_test_switch_bus(chip, MMC_4BIT_BUS) == STATUS_SUCCESS) { } else if (retval == SWITCH_FAIL) {
retval = mmc_test_switch_bus(chip, MMC_4BIT_BUS);
if (retval == SWITCH_SUCCESS) {
SET_MMC_4BIT(sd_card); SET_MMC_4BIT(sd_card);
chip->card_bus_width[chip->card2lun[SD_CARD]] = 4; chip->card_bus_width[chip->card2lun[SD_CARD]] = 4;
#ifdef SUPPORT_SD_LOCK #ifdef SUPPORT_SD_LOCK
sd_card->sd_lock_status &= ~SD_LOCK_1BIT_MODE; sd_card->sd_lock_status &= ~SD_LOCK_1BIT_MODE;
#endif #endif
} else { } else if (retval == SWITCH_FAIL) {
CLR_MMC_8BIT(sd_card); CLR_MMC_8BIT(sd_card);
CLR_MMC_4BIT(sd_card); CLR_MMC_4BIT(sd_card);
} else {
TRACE_RET(chip, STATUS_FAIL);
}
} else {
TRACE_RET(chip, STATUS_FAIL);
} }
return STATUS_SUCCESS; return STATUS_SUCCESS;
...@@ -2915,8 +2928,7 @@ static int reset_mmc(struct rtsx_chip *chip) ...@@ -2915,8 +2928,7 @@ static int reset_mmc(struct rtsx_chip *chip)
goto MMC_UNLOCK_ENTRY; goto MMC_UNLOCK_ENTRY;
#endif #endif
DDR_TUNING_FAIL: Switch_Fail:
retval = sd_prepare_reset(chip); retval = sd_prepare_reset(chip);
if (retval != STATUS_SUCCESS) { if (retval != STATUS_SUCCESS) {
TRACE_RET(chip, retval); TRACE_RET(chip, retval);
...@@ -3017,7 +3029,15 @@ static int reset_mmc(struct rtsx_chip *chip) ...@@ -3017,7 +3029,15 @@ static int reset_mmc(struct rtsx_chip *chip)
if (!sd_card->mmc_dont_switch_bus) { if (!sd_card->mmc_dont_switch_bus) {
if (spec_ver == 4) { if (spec_ver == 4) {
(void)mmc_switch_timing_bus(chip, switch_ddr); /* MMC 4.x Cards */
retval = mmc_switch_timing_bus(chip, switch_ddr);
if (retval != STATUS_SUCCESS) {
retval = sd_init_power(chip);
if (retval != STATUS_SUCCESS)
TRACE_RET(chip, STATUS_FAIL);
sd_card->mmc_dont_switch_bus = 1;
TRACE_GOTO(chip, Switch_Fail);
}
} }
if (CHK_MMC_SECTOR_MODE(sd_card) && (sd_card->capacity == 0)) { if (CHK_MMC_SECTOR_MODE(sd_card) && (sd_card->capacity == 0)) {
...@@ -3037,7 +3057,7 @@ static int reset_mmc(struct rtsx_chip *chip) ...@@ -3037,7 +3057,7 @@ static int reset_mmc(struct rtsx_chip *chip)
TRACE_RET(chip, STATUS_FAIL); TRACE_RET(chip, STATUS_FAIL);
} }
switch_ddr = 0; switch_ddr = 0;
goto DDR_TUNING_FAIL; TRACE_GOTO(chip, Switch_Fail);
} }
retval = sd_wait_state_data_ready(chip, 0x08, 1, 1000); retval = sd_wait_state_data_ready(chip, 0x08, 1, 1000);
...@@ -3049,7 +3069,7 @@ static int reset_mmc(struct rtsx_chip *chip) ...@@ -3049,7 +3069,7 @@ static int reset_mmc(struct rtsx_chip *chip)
TRACE_RET(chip, STATUS_FAIL); TRACE_RET(chip, STATUS_FAIL);
} }
switch_ddr = 0; switch_ddr = 0;
goto DDR_TUNING_FAIL; TRACE_GOTO(chip, Switch_Fail);
} }
} }
} }
......
...@@ -38,6 +38,11 @@ ...@@ -38,6 +38,11 @@
#define SD_RSP_TIMEOUT 0x04 #define SD_RSP_TIMEOUT 0x04
#define SD_IO_ERR 0x02 #define SD_IO_ERR 0x02
/* Return code for MMC switch bus */
#define SWITCH_SUCCESS 0
#define SWITCH_ERR 1
#define SWITCH_FAIL 2
/* MMC/SD Command Index */ /* MMC/SD Command Index */
/* Basic command (class 0) */ /* Basic command (class 0) */
#define GO_IDLE_STATE 0 #define GO_IDLE_STATE 0
......
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