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Commit 2bc43c92 authored by Andrew Morton's avatar Andrew Morton Committed by Linus Torvalds
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[PATCH] sn: klgraph.c clean up 

From: Pat Gefre <pfg@sgi.com>

klgraph.c clean up
parent 4e8caa8f
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Showing with 107 additions and 151 deletions
arch/ia64/sn/io/hwgfs/hcl.c
View file @ 2bc43c92
......@@ -750,7 +750,7 @@ hwgraph_inventory_remove( vertex_hdl_t de,
* "/" but rather it just stops right before /dev ..
*/
int
hwgraph_vertex_name_get(vertex_hdl_t vhdl, char *buf, uint buflen)
hwgraph_vertex_name_get(vertex_hdl_t vhdl, char *buf, unsigned int buflen)
{
char *locbuf;
int pos;
......@@ -785,7 +785,7 @@ hwgraph_vertex_name_get(vertex_hdl_t vhdl, char *buf, uint buflen)
#define DEVNAME_UNKNOWN "UnknownDevice"
char *
vertex_to_name(vertex_hdl_t vhdl, char *buf, uint buflen)
vertex_to_name(vertex_hdl_t vhdl, char *buf, unsigned int buflen)
{
if (hwgraph_vertex_name_get(vhdl, buf, buflen) == GRAPH_SUCCESS)
return(buf);
......
arch/ia64/sn/io/platform_init/irix_io_init.c
View file @ 2bc43c92
......@@ -26,12 +26,6 @@ extern vertex_hdl_t hwgraph_root;
extern void io_module_init(void);
extern int pci_bus_to_hcl_cvlink(void);
/* #define DEBUG_IO_INIT 1 */
#ifdef DEBUG_IO_INIT
#define DBG(x...) printk(x)
#else
#define DBG(x...)
#endif /* DEBUG_IO_INIT */
/*
* This routine is responsible for the setup of all the IRIX hwgraph style
......
arch/ia64/sn/io/sn2/klgraph.c
View file @ 2bc43c92
......@@ -25,17 +25,13 @@
/* #define KLGRAPH_DEBUG 1 */
#ifdef KLGRAPH_DEBUG
#define GRPRINTF(x) printk x
#define CE_GRPANIC CE_PANIC
#else
#define GRPRINTF(x)
#define CE_GRPANIC CE_PANIC
#endif
#include <asm/sn/sn_private.h>
extern char arg_maxnodes[];
extern u64 klgraph_addr[];
void mark_cpuvertex_as_cpu(vertex_hdl_t vhdl, cpuid_t cpuid);
int is_specified(char *);
/* ARGSUSED */
......@@ -47,12 +43,17 @@ klhwg_add_hub(vertex_hdl_t node_vertex, klhub_t *hub, cnodeid_t cnode)
int rc;
extern struct file_operations shub_mon_fops;
GRPRINTF(("klhwg_add_hub: adding %s\n", EDGE_LBL_HUB));
(void) hwgraph_path_add(node_vertex, EDGE_LBL_HUB, &myhubv);
hwgraph_path_add(node_vertex, EDGE_LBL_HUB, &myhubv);
HWGRAPH_DEBUG((__FILE__, __FUNCTION__,__LINE__, myhubv, NULL, "Created path for hub vertex for Shub node.\n"));
rc = device_master_set(myhubv, node_vertex);
if (rc) {
printk("klhwg_add_hub: Unable to create hub vertex.\n");
return;
}
hub_mon = hwgraph_register(myhubv, EDGE_LBL_PERFMON,
0, 0,
0, 0,
0, 0, 0, 0,
S_IFCHR | S_IRUSR | S_IWUSR | S_IRGRP, 0, 0,
&shub_mon_fops, (void *)(long)cnode);
}
......@@ -69,9 +70,11 @@ klhwg_add_disabled_cpu(vertex_hdl_t node_vertex, cnodeid_t cnode, klcpu_t *cpu,
nasid = COMPACT_TO_NASID_NODEID(cnode);
cpu_id = nasid_slice_to_cpuid(nasid, cpu->cpu_info.physid);
if(cpu_id != -1){
sprintf(name, "%s/%s/%c", EDGE_LBL_DISABLED, EDGE_LBL_CPU, 'a' + cpu->cpu_info.physid);
snprintf(name, 120, "%s/%s/%c", EDGE_LBL_DISABLED, EDGE_LBL_CPU, 'a' + cpu->cpu_info.physid);
(void) hwgraph_path_add(node_vertex, name, &my_cpu);
HWGRAPH_DEBUG((__FILE__, __FUNCTION__,__LINE__, my_cpu, NULL, "Created path for disabled cpu slice.\n"));
mark_cpuvertex_as_cpu(my_cpu, cpu_id);
device_master_set(my_cpu, node_vertex);
return;
......@@ -90,20 +93,23 @@ klhwg_add_cpu(vertex_hdl_t node_vertex, cnodeid_t cnode, klcpu_t *cpu)
nasid = COMPACT_TO_NASID_NODEID(cnode);
cpu_id = nasid_slice_to_cpuid(nasid, cpu->cpu_info.physid);
sprintf(name, "%s/%d/%c",
snprintf(name, 120, "%s/%d/%c",
EDGE_LBL_CPUBUS,
0,
'a' + cpu->cpu_info.physid);
GRPRINTF(("klhwg_add_cpu: adding %s to vertex 0x%p\n", name, node_vertex));
(void) hwgraph_path_add(node_vertex, name, &my_cpu);
HWGRAPH_DEBUG((__FILE__, __FUNCTION__,__LINE__, my_cpu, NULL, "Created path for active cpu slice.\n"));
mark_cpuvertex_as_cpu(my_cpu, cpu_id);
device_master_set(my_cpu, node_vertex);
/* Add an alias under the node's CPU directory */
if (hwgraph_edge_get(node_vertex, EDGE_LBL_CPU, &cpu_dir) == GRAPH_SUCCESS) {
sprintf(name, "%c", 'a' + cpu->cpu_info.physid);
snprintf(name, 120, "%c", 'a' + cpu->cpu_info.physid);
(void) hwgraph_edge_add(cpu_dir, my_cpu, name);
HWGRAPH_DEBUG((__FILE__, __FUNCTION__,__LINE__, cpu_dir, my_cpu, "Created % from vhdl1 to vhdl2.\n", name));
}
}
......@@ -127,9 +133,6 @@ klhwg_add_xbow(cnodeid_t cnode, nasid_t nasid)
if (KL_CONFIG_DUPLICATE_BOARD(brd))
return;
GRPRINTF(("klhwg_add_xbow: adding cnode %d nasid %d xbow edges\n",
cnode, nasid));
if ((xbow_p = (klxbow_t *)find_component(brd, NULL, KLSTRUCT_XBOW))
== NULL)
return;
......@@ -162,7 +165,11 @@ klhwg_add_xbow(cnodeid_t cnode, nasid_t nasid)
"edge: vertex 0x%p to vertex 0x%p,"
"error %d\n",
(void *)hubv, (void *)xbow_v, err);
return;
}
HWGRAPH_DEBUG((__FILE__, __FUNCTION__, __LINE__, xbow_v, NULL, "Created path for xtalk.\n"));
xswitch_vertex_init(xbow_v);
NODEPDA(hub_cnode)->xbow_vhdl = xbow_v;
......@@ -176,9 +183,6 @@ klhwg_add_xbow(cnodeid_t cnode, nasid_t nasid)
NODEPDA(NASID_TO_COMPACT_NODEID(nasid))->xbow_peer =
hub_nasid;
}
GRPRINTF(("klhwg_add_xbow: adding port nasid %d %s to vertex 0x%p\n",
hub_nasid, EDGE_LBL_XTALK, hubv));
}
}
......@@ -196,28 +200,21 @@ klhwg_add_node(vertex_hdl_t hwgraph_root, cnodeid_t cnode)
char *s;
int board_disabled = 0;
klcpu_t *cpu;
vertex_hdl_t cpu_dir;
nasid = COMPACT_TO_NASID_NODEID(cnode);
brd = find_lboard((lboard_t *)KL_CONFIG_INFO(nasid), KLTYPE_SNIA);
GRPRINTF(("klhwg_add_node: Adding cnode %d, nasid %d, brd 0x%p\n",
cnode, nasid, brd));
ASSERT(brd);
do {
vertex_hdl_t cpu_dir;
/* Generate a hardware graph path for this board. */
board_to_path(brd, path_buffer);
GRPRINTF(("klhwg_add_node: adding %s to vertex 0x%p\n",
path_buffer, hwgraph_root));
rv = hwgraph_path_add(hwgraph_root, path_buffer, &node_vertex);
if (rv != GRAPH_SUCCESS) {
printk("Node vertex creation failed. Path == %s", path_buffer);
return;
}
if (rv != GRAPH_SUCCESS)
panic("Node vertex creation failed. "
"Path == %s",
path_buffer);
HWGRAPH_DEBUG((__FILE__, __FUNCTION__, __LINE__, node_vertex, NULL, "Created path for SHUB node.\n"));
hub = (klhub_t *)find_first_component(brd, KLSTRUCT_HUB);
ASSERT(hub);
if(hub->hub_info.flags & KLINFO_ENABLE)
......@@ -226,42 +223,39 @@ klhwg_add_node(vertex_hdl_t hwgraph_root, cnodeid_t cnode)
board_disabled = 1;
if(!board_disabled) {
mark_nodevertex_as_node(node_vertex,
cnode + board_disabled * numnodes);
mark_nodevertex_as_node(node_vertex, cnode);
s = dev_to_name(node_vertex, path_buffer, sizeof(path_buffer));
NODEPDA(cnode)->hwg_node_name =
kmalloc(strlen(s) + 1,
GFP_KERNEL);
ASSERT_ALWAYS(NODEPDA(cnode)->hwg_node_name != NULL);
kmalloc(strlen(s) + 1, GFP_KERNEL);
if (NODEPDA(cnode)->hwg_node_name <= 0) {
printk("%s: no memory\n", __FUNCTION__);
return;
}
strcpy(NODEPDA(cnode)->hwg_node_name, s);
hubinfo_set(node_vertex, NODEPDA(cnode)->pdinfo);
/* Set up node board's slot */
NODEPDA(cnode)->slotdesc = brd->brd_slot;
/* Set up the module we're in */
NODEPDA(cnode)->geoid = brd->brd_geoid;
NODEPDA(cnode)->module = module_lookup(geo_module(brd->brd_geoid));
klhwg_add_hub(node_vertex, hub, cnode);
}
/* Get the first CPU structure */
cpu = (klcpu_t *)find_first_component(brd, KLSTRUCT_CPU);
/*
* If there's at least 1 CPU, add a "cpu" directory to represent
* the collection of all CPUs attached to this node.
*/
cpu = (klcpu_t *)find_first_component(brd, KLSTRUCT_CPU);
if (cpu) {
graph_error_t rv;
rv = hwgraph_path_add(node_vertex, EDGE_LBL_CPU, &cpu_dir);
if (rv != GRAPH_SUCCESS)
panic("klhwg_add_node: Cannot create CPU directory\n");
if (rv != GRAPH_SUCCESS) {
printk("klhwg_add_node: Cannot create CPU directory\n");
return;
}
HWGRAPH_DEBUG((__FILE__, __FUNCTION__, __LINE__, cpu_dir, NULL, "Created cpu directiry on SHUB node.\n"));
}
/* Add each CPU */
while (cpu) {
cpuid_t cpu_id;
cpu_id = nasid_slice_to_cpuid(nasid,cpu->cpu_info.physid);
......@@ -272,17 +266,7 @@ klhwg_add_node(vertex_hdl_t hwgraph_root, cnodeid_t cnode)
cpu = (klcpu_t *)
find_component(brd, (klinfo_t *)cpu, KLSTRUCT_CPU);
} /* while */
if(!board_disabled)
klhwg_add_hub(node_vertex, hub, cnode);
brd = KLCF_NEXT(brd);
if (brd)
brd = find_lboard(brd, KLTYPE_SNIA);
else
break;
} while(brd);
}
}
......@@ -299,10 +283,6 @@ klhwg_add_all_routers(vertex_hdl_t hwgraph_root)
for (cnode = 0; cnode < numnodes; cnode++) {
nasid = COMPACT_TO_NASID_NODEID(cnode);
GRPRINTF(("klhwg_add_all_routers: adding router on cnode %d\n",
cnode));
brd = find_lboard_class((lboard_t *)KL_CONFIG_INFO(nasid),
KLTYPE_ROUTER);
......@@ -312,35 +292,26 @@ klhwg_add_all_routers(vertex_hdl_t hwgraph_root)
do {
ASSERT(brd);
GRPRINTF(("Router board struct is %p\n", brd));
/* Don't add duplicate boards. */
if (brd->brd_flags & DUPLICATE_BOARD)
continue;
GRPRINTF(("Router 0x%p module number is %d\n", brd, brd->brd_geoid));
/* Generate a hardware graph path for this board. */
board_to_path(brd, path_buffer);
GRPRINTF(("Router path is %s\n", path_buffer));
/* Add the router */
GRPRINTF(("klhwg_add_all_routers: adding %s to vertex 0x%p\n",
path_buffer, hwgraph_root));
rv = hwgraph_path_add(hwgraph_root, path_buffer, &node_vertex);
if (rv != GRAPH_SUCCESS) {
printk("Router vertex creation "
"failed. Path == %s", path_buffer);
return;
}
HWGRAPH_DEBUG((__FILE__, __FUNCTION__, __LINE__, node_vertex, NULL, "Created router path.\n"));
if (rv != GRAPH_SUCCESS)
panic("Router vertex creation "
"failed. Path == %s",
path_buffer);
GRPRINTF(("klhwg_add_all_routers: get next board from 0x%p\n",
brd));
/* Find the rest of the routers stored on this node. */
} while ( (brd = find_lboard_class(KLCF_NEXT(brd),
KLTYPE_ROUTER)) );
GRPRINTF(("klhwg_add_all_routers: Done.\n"));
}
}
......@@ -359,13 +330,8 @@ klhwg_connect_one_router(vertex_hdl_t hwgraph_root, lboard_t *brd,
int port;
lboard_t *dest_brd;
GRPRINTF(("klhwg_connect_one_router: Connecting router on cnode %d\n",
cnode));
/* Don't add duplicate boards. */
if (brd->brd_flags & DUPLICATE_BOARD) {
GRPRINTF(("klhwg_connect_one_router: Duplicate router 0x%p on cnode %d\n",
brd, cnode));
return;
}
......@@ -416,10 +382,9 @@ klhwg_connect_one_router(vertex_hdl_t hwgraph_root, lboard_t *brd,
if (rc != GRAPH_SUCCESS) {
if (is_specified(arg_maxnodes) && KL_CONFIG_DUPLICATE_BOARD(dest_brd))
continue;
panic("Can't find router: %s", dest_path);
printk("Can't find router: %s", dest_path);
return;
}
GRPRINTF(("klhwg_connect_one_router: Link from %s/%d to %s\n",
path_buffer, port, dest_path));
sprintf(dest_path, "%d", port);
......@@ -432,9 +397,12 @@ klhwg_connect_one_router(vertex_hdl_t hwgraph_root, lboard_t *brd,
continue;
}
if (rc != GRAPH_SUCCESS && !is_specified(arg_maxnodes))
panic("Can't create edge: %s/%s to vertex 0x%p error 0x%x\n",
if (rc != GRAPH_SUCCESS) {
printk("Can't create edge: %s/%s to vertex 0x%p error 0x%x\n",
path_buffer, dest_path, (void *)dest_hndl, rc);
return;
}
HWGRAPH_DEBUG((__FILE__, __FUNCTION__, __LINE__, router_hndl, dest_hndl, "Created edge %s from vhdl1 to vhdl2.\n", dest_path));
}
}
......@@ -449,10 +417,6 @@ klhwg_connect_routers(vertex_hdl_t hwgraph_root)
for (cnode = 0; cnode < numnodes; cnode++) {
nasid = COMPACT_TO_NASID_NODEID(cnode);
GRPRINTF(("klhwg_connect_routers: Connecting routers on cnode %d\n",
cnode));
brd = find_lboard_class((lboard_t *)KL_CONFIG_INFO(nasid),
KLTYPE_ROUTER);
......@@ -491,9 +455,6 @@ klhwg_connect_hubs(vertex_hdl_t hwgraph_root)
for (cnode = 0; cnode < numnodes; cnode++) {
nasid = COMPACT_TO_NASID_NODEID(cnode);
GRPRINTF(("klhwg_connect_hubs: Connecting hubs on cnode %d\n",
cnode));
brd = find_lboard((lboard_t *)KL_CONFIG_INFO(nasid), KLTYPE_SNIA);
ASSERT(brd);
......@@ -501,10 +462,8 @@ klhwg_connect_hubs(vertex_hdl_t hwgraph_root)
ASSERT(hub);
for (port = 1; port <= MAX_NI_PORTS; port++) {
/* See if the port's active */
if (hub->hub_port[port].port_nasid == INVALID_NASID) {
GRPRINTF(("klhwg_connect_hubs: port inactive.\n"));
continue;
continue; /* Port not active */
}
if (is_specified(arg_maxnodes) && NASID_TO_COMPACT_NODEID(hub->hub_port[port].port_nasid) == INVALID_CNODEID)
......@@ -512,8 +471,6 @@ klhwg_connect_hubs(vertex_hdl_t hwgraph_root)
/* Generate a hardware graph path for this board. */
board_to_path(brd, path_buffer);
GRPRINTF(("klhwg_connect_hubs: Hub path is %s.\n", path_buffer));
rc = hwgraph_traverse(hwgraph_root, path_buffer, &hub_hndl);
if (rc != GRAPH_SUCCESS)
......@@ -531,24 +488,27 @@ klhwg_connect_hubs(vertex_hdl_t hwgraph_root)
if (rc != GRAPH_SUCCESS) {
if (is_specified(arg_maxnodes) && KL_CONFIG_DUPLICATE_BOARD(dest_brd))
continue;
panic("Can't find board: %s", dest_path);
printk("Can't find board: %s", dest_path);
return;
} else {
char buf[1024];
rc = hwgraph_path_add(hub_hndl, EDGE_LBL_INTERCONNECT, &hub_hndl);
GRPRINTF(("klhwg_connect_hubs: Link from %s to %s.\n",
path_buffer, dest_path));
HWGRAPH_DEBUG((__FILE__, __FUNCTION__, __LINE__, hub_hndl, NULL, "Created link path.\n"));
rc = hwgraph_path_add(hub_hndl, EDGE_LBL_INTERCONNECT, &hub_hndl);
sprintf(buf,"%s/%s",path_buffer,EDGE_LBL_INTERCONNECT);
rc = hwgraph_traverse(hwgraph_root, buf, &hub_hndl);
sprintf(buf,"%d",port);
rc = hwgraph_edge_add(hub_hndl, dest_hndl, buf);
if (rc != GRAPH_SUCCESS)
panic("Can't create edge: %s/%s to vertex 0x%p, error 0x%x\n",
path_buffer, dest_path, (void *)dest_hndl, rc);
HWGRAPH_DEBUG((__FILE__, __FUNCTION__, __LINE__, hub_hndl, dest_hndl, "Created edge %s from vhdl1 to vhdl2.\n", buf));
if (rc != GRAPH_SUCCESS) {
printk("Can't create edge: %s/%s to vertex 0x%p, error 0x%x\n",
path_buffer, dest_path, (void *)dest_hndl, rc);
return;
}
}
}
}
......@@ -639,6 +599,7 @@ klhwg_add_all_modules(vertex_hdl_t hwgraph_root)
rc = hwgraph_path_add(hwgraph_root, name, &module_vhdl);
ASSERT(rc == GRAPH_SUCCESS);
rc = rc;
HWGRAPH_DEBUG((__FILE__, __FUNCTION__, __LINE__, module_vhdl, NULL, "Created module path.\n"));
hwgraph_fastinfo_set(module_vhdl, (arbitrary_info_t) modules[cm]);
......@@ -650,6 +611,7 @@ klhwg_add_all_modules(vertex_hdl_t hwgraph_root)
rc = hwgraph_path_add(hwgraph_root, name, &vhdl);
ASSERT_ALWAYS(rc == GRAPH_SUCCESS);
rc = rc;
HWGRAPH_DEBUG((__FILE__, __FUNCTION__, __LINE__, vhdl, NULL, "Created L1 path.\n"));
hwgraph_info_add_LBL(vhdl, INFO_LBL_ELSC,
(arbitrary_info_t)1);
......
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