MIPS: Optimize TLB handlers for Octeon CPUs
Octeon can use scratch registers in the TLB handlers. Octeon II can use LDX instructions. Signed-off-by:David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1904/Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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