Commit 2ca6cf06 authored by françois romieu's avatar françois romieu Committed by David S. Miller

r8169: fix Config2 MSIEnable bit setting.

The MSIEnable bit is only available for the 8169.

Avoid Config2 writes for the post-8169 8168 and 810x.
Reported-by: default avatarSu Kang Yin <cantona@cantona.net>
Signed-off-by: default avatarFrancois Romieu <romieu@fr.zoreil.com>
Cc: Hayes Wang <hayeswang@realtek.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 9cef310f
...@@ -477,7 +477,6 @@ enum rtl_register_content { ...@@ -477,7 +477,6 @@ enum rtl_register_content {
/* Config1 register p.24 */ /* Config1 register p.24 */
LEDS1 = (1 << 7), LEDS1 = (1 << 7),
LEDS0 = (1 << 6), LEDS0 = (1 << 6),
MSIEnable = (1 << 5), /* Enable Message Signaled Interrupt */
Speed_down = (1 << 4), Speed_down = (1 << 4),
MEMMAP = (1 << 3), MEMMAP = (1 << 3),
IOMAP = (1 << 2), IOMAP = (1 << 2),
...@@ -485,6 +484,7 @@ enum rtl_register_content { ...@@ -485,6 +484,7 @@ enum rtl_register_content {
PMEnable = (1 << 0), /* Power Management Enable */ PMEnable = (1 << 0), /* Power Management Enable */
/* Config2 register p. 25 */ /* Config2 register p. 25 */
MSIEnable = (1 << 5), /* 8169 only. Reserved in the 8168. */
PCI_Clock_66MHz = 0x01, PCI_Clock_66MHz = 0x01,
PCI_Clock_33MHz = 0x00, PCI_Clock_33MHz = 0x00,
...@@ -3426,21 +3426,23 @@ static const struct rtl_cfg_info { ...@@ -3426,21 +3426,23 @@ static const struct rtl_cfg_info {
}; };
/* Cfg9346_Unlock assumed. */ /* Cfg9346_Unlock assumed. */
static unsigned rtl_try_msi(struct pci_dev *pdev, void __iomem *ioaddr, static unsigned rtl_try_msi(struct rtl8169_private *tp,
const struct rtl_cfg_info *cfg) const struct rtl_cfg_info *cfg)
{ {
void __iomem *ioaddr = tp->mmio_addr;
unsigned msi = 0; unsigned msi = 0;
u8 cfg2; u8 cfg2;
cfg2 = RTL_R8(Config2) & ~MSIEnable; cfg2 = RTL_R8(Config2) & ~MSIEnable;
if (cfg->features & RTL_FEATURE_MSI) { if (cfg->features & RTL_FEATURE_MSI) {
if (pci_enable_msi(pdev)) { if (pci_enable_msi(tp->pci_dev)) {
dev_info(&pdev->dev, "no MSI. Back to INTx.\n"); netif_info(tp, hw, tp->dev, "no MSI. Back to INTx.\n");
} else { } else {
cfg2 |= MSIEnable; cfg2 |= MSIEnable;
msi = RTL_FEATURE_MSI; msi = RTL_FEATURE_MSI;
} }
} }
if (tp->mac_version <= RTL_GIGA_MAC_VER_06)
RTL_W8(Config2, cfg2); RTL_W8(Config2, cfg2);
return msi; return msi;
} }
...@@ -4077,7 +4079,7 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) ...@@ -4077,7 +4079,7 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
tp->features |= RTL_FEATURE_WOL; tp->features |= RTL_FEATURE_WOL;
if ((RTL_R8(Config5) & (UWF | BWF | MWF)) != 0) if ((RTL_R8(Config5) & (UWF | BWF | MWF)) != 0)
tp->features |= RTL_FEATURE_WOL; tp->features |= RTL_FEATURE_WOL;
tp->features |= rtl_try_msi(pdev, ioaddr, cfg); tp->features |= rtl_try_msi(tp, cfg);
RTL_W8(Cfg9346, Cfg9346_Lock); RTL_W8(Cfg9346, Cfg9346_Lock);
if (rtl_tbi_enabled(tp)) { if (rtl_tbi_enabled(tp)) {
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment