Commit 2d13c8f0 authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev

* 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev:
  libata: retry link resume if necessary
  ata_piix: enable 32bit PIO on SATA piix
  sata_promise: don't classify overruns as HSM errors
parents 1f0e14bb 5040ab67
...@@ -329,7 +329,7 @@ static struct ata_port_operations ich_pata_ops = { ...@@ -329,7 +329,7 @@ static struct ata_port_operations ich_pata_ops = {
}; };
static struct ata_port_operations piix_sata_ops = { static struct ata_port_operations piix_sata_ops = {
.inherits = &ata_bmdma_port_ops, .inherits = &ata_bmdma32_port_ops,
}; };
static struct ata_port_operations piix_sidpr_sata_ops = { static struct ata_port_operations piix_sidpr_sata_ops = {
......
...@@ -3790,22 +3790,46 @@ int sata_link_debounce(struct ata_link *link, const unsigned long *params, ...@@ -3790,22 +3790,46 @@ int sata_link_debounce(struct ata_link *link, const unsigned long *params,
int sata_link_resume(struct ata_link *link, const unsigned long *params, int sata_link_resume(struct ata_link *link, const unsigned long *params,
unsigned long deadline) unsigned long deadline)
{ {
int tries = ATA_LINK_RESUME_TRIES;
u32 scontrol, serror; u32 scontrol, serror;
int rc; int rc;
if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
return rc; return rc;
/*
* Writes to SControl sometimes get ignored under certain
* controllers (ata_piix SIDPR). Make sure DET actually is
* cleared.
*/
do {
scontrol = (scontrol & 0x0f0) | 0x300; scontrol = (scontrol & 0x0f0) | 0x300;
if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol))) if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
return rc; return rc;
/*
/* Some PHYs react badly if SStatus is pounded immediately * Some PHYs react badly if SStatus is pounded
* after resuming. Delay 200ms before debouncing. * immediately after resuming. Delay 200ms before
* debouncing.
*/ */
msleep(200); msleep(200);
/* is SControl restored correctly? */
if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
return rc;
} while ((scontrol & 0xf0f) != 0x300 && --tries);
if ((scontrol & 0xf0f) != 0x300) {
ata_link_printk(link, KERN_ERR,
"failed to resume link (SControl %X)\n",
scontrol);
return 0;
}
if (tries < ATA_LINK_RESUME_TRIES)
ata_link_printk(link, KERN_WARNING,
"link resume succeeded after %d retries\n",
ATA_LINK_RESUME_TRIES - tries);
if ((rc = sata_link_debounce(link, params, deadline))) if ((rc = sata_link_debounce(link, params, deadline)))
return rc; return rc;
......
...@@ -862,7 +862,7 @@ static void pdc_error_intr(struct ata_port *ap, struct ata_queued_cmd *qc, ...@@ -862,7 +862,7 @@ static void pdc_error_intr(struct ata_port *ap, struct ata_queued_cmd *qc,
if (port_status & PDC_DRIVE_ERR) if (port_status & PDC_DRIVE_ERR)
ac_err_mask |= AC_ERR_DEV; ac_err_mask |= AC_ERR_DEV;
if (port_status & (PDC_OVERRUN_ERR | PDC_UNDERRUN_ERR)) if (port_status & (PDC_OVERRUN_ERR | PDC_UNDERRUN_ERR))
ac_err_mask |= AC_ERR_HSM; ac_err_mask |= AC_ERR_OTHER;
if (port_status & (PDC2_ATA_HBA_ERR | PDC2_ATA_DMA_CNT_ERR)) if (port_status & (PDC2_ATA_HBA_ERR | PDC2_ATA_DMA_CNT_ERR))
ac_err_mask |= AC_ERR_ATA_BUS; ac_err_mask |= AC_ERR_ATA_BUS;
if (port_status & (PDC_PH_ERR | PDC_SH_ERR | PDC_DH_ERR | PDC2_HTO_ERR if (port_status & (PDC_PH_ERR | PDC_SH_ERR | PDC_DH_ERR | PDC2_HTO_ERR
......
...@@ -354,6 +354,9 @@ enum { ...@@ -354,6 +354,9 @@ enum {
/* max tries if error condition is still set after ->error_handler */ /* max tries if error condition is still set after ->error_handler */
ATA_EH_MAX_TRIES = 5, ATA_EH_MAX_TRIES = 5,
/* sometimes resuming a link requires several retries */
ATA_LINK_RESUME_TRIES = 5,
/* how hard are we gonna try to probe/recover devices */ /* how hard are we gonna try to probe/recover devices */
ATA_PROBE_MAX_TRIES = 3, ATA_PROBE_MAX_TRIES = 3,
ATA_EH_DEV_TRIES = 3, ATA_EH_DEV_TRIES = 3,
......
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