Commit 2d42d21f authored by Stephen Hemminger's avatar Stephen Hemminger Committed by Jeff Garzik

[PATCH] sky2: pci config space checking

There were bugs in mmconfig access to PCI space, up to and
include 2.6.16-rc1. These prevented the sky2 driver from being
able to clear PCI express errors.

This patch makes the driver check (during probe), for errors
in PCI config access and fail.
Signed-off-by: default avatarStephen Hemminger <shemminger@osdl.org>
Signed-off-by: default avatarJeff Garzik <jgarzik@pobox.com>
parent 08c06d8a
...@@ -2142,7 +2142,7 @@ static int sky2_reset(struct sky2_hw *hw) ...@@ -2142,7 +2142,7 @@ static int sky2_reset(struct sky2_hw *hw)
{ {
u16 status; u16 status;
u8 t8, pmd_type; u8 t8, pmd_type;
int i; int i, err;
sky2_write8(hw, B0_CTST, CS_RST_CLR); sky2_write8(hw, B0_CTST, CS_RST_CLR);
...@@ -2164,19 +2164,24 @@ static int sky2_reset(struct sky2_hw *hw) ...@@ -2164,19 +2164,24 @@ static int sky2_reset(struct sky2_hw *hw)
sky2_write8(hw, B0_CTST, CS_RST_CLR); sky2_write8(hw, B0_CTST, CS_RST_CLR);
/* clear PCI errors, if any */ /* clear PCI errors, if any */
pci_read_config_word(hw->pdev, PCI_STATUS, &status); err = pci_read_config_word(hw->pdev, PCI_STATUS, &status);
if (err)
goto pci_err;
sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
pci_write_config_word(hw->pdev, PCI_STATUS, err = pci_write_config_word(hw->pdev, PCI_STATUS,
status | PCI_STATUS_ERROR_BITS); status | PCI_STATUS_ERROR_BITS);
if (err)
goto pci_err;
sky2_write8(hw, B0_CTST, CS_MRST_CLR); sky2_write8(hw, B0_CTST, CS_MRST_CLR);
/* clear any PEX errors */ /* clear any PEX errors */
if (is_pciex(hw)) { if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP)) {
u16 lstat; err = pci_write_config_dword(hw->pdev, PEX_UNC_ERR_STAT,
pci_write_config_dword(hw->pdev, PEX_UNC_ERR_STAT,
0xffffffffUL); 0xffffffffUL);
pci_read_config_word(hw->pdev, PEX_LNK_STAT, &lstat); if (err)
goto pci_err;
} }
pmd_type = sky2_read8(hw, B2_PMD_TYP); pmd_type = sky2_read8(hw, B2_PMD_TYP);
...@@ -2288,6 +2293,14 @@ static int sky2_reset(struct sky2_hw *hw) ...@@ -2288,6 +2293,14 @@ static int sky2_reset(struct sky2_hw *hw)
sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START); sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
return 0; return 0;
pci_err:
/* This is to catch a BIOS bug workaround where
* mmconfig table doesn't have other buses.
*/
printk(KERN_ERR PFX "%s: can't access PCI config space\n",
pci_name(hw->pdev));
return err;
} }
static u32 sky2_supported_modes(const struct sky2_hw *hw) static u32 sky2_supported_modes(const struct sky2_hw *hw)
......
...@@ -1867,14 +1867,6 @@ static inline u8 sky2_read8(const struct sky2_hw *hw, unsigned reg) ...@@ -1867,14 +1867,6 @@ static inline u8 sky2_read8(const struct sky2_hw *hw, unsigned reg)
return readb(hw->regs + reg); return readb(hw->regs + reg);
} }
/* This should probably go away, bus based tweeks suck */
static inline int is_pciex(const struct sky2_hw *hw)
{
u32 status;
pci_read_config_dword(hw->pdev, PCI_DEV_STATUS, &status);
return (status & PCI_OS_PCI_X) == 0;
}
static inline void sky2_write32(const struct sky2_hw *hw, unsigned reg, u32 val) static inline void sky2_write32(const struct sky2_hw *hw, unsigned reg, u32 val)
{ {
writel(val, hw->regs + reg); writel(val, hw->regs + reg);
......
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