Commit 30c7b56d authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'armsoc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "Things are calming down nicely here w.r.t. fixes.  This batch
  includes two week's worth since I missed to send before -rc4.

  Nothing particularly scary to point out, smaller fixes here and there.
  Shortlog describes it pretty well"

* tag 'armsoc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: dts: keystone: fix dt bindings to use post div register for mainpll
  ARM: nomadik: disable UART0 on Nomadik boards
  ARM: dts: i.MX35: Fix can support.
  ARM: OMAP2+: hwmod: Fix _wait_target_ready() for hwmods without sysc
  ARM: dts: add CPU OPP and regulator supply property for exynos4210
  ARM: dts: Update video-phy node with syscon phandle for exynos3250
  ARM: DRA7: hwmod: fix gpmc hwmod
parents 01183609 c1bfa985
...@@ -138,8 +138,8 @@ pmu_system_controller: system-controller@10020000 { ...@@ -138,8 +138,8 @@ pmu_system_controller: system-controller@10020000 {
mipi_phy: video-phy@10020710 { mipi_phy: video-phy@10020710 {
compatible = "samsung,s5pv210-mipi-video-phy"; compatible = "samsung,s5pv210-mipi-video-phy";
reg = <0x10020710 8>;
#phy-cells = <1>; #phy-cells = <1>;
syscon = <&pmu_system_controller>;
}; };
pd_cam: cam-power-domain@10023C00 { pd_cam: cam-power-domain@10023C00 {
......
...@@ -127,6 +127,10 @@ timing0: timing { ...@@ -127,6 +127,10 @@ timing0: timing {
}; };
}; };
&cpu0 {
cpu0-supply = <&buck1_reg>;
};
&fimd { &fimd {
pinctrl-0 = <&lcd_en &lcd_clk &lcd_data24 &pwm0_out>; pinctrl-0 = <&lcd_en &lcd_clk &lcd_data24 &pwm0_out>;
pinctrl-names = "default"; pinctrl-names = "default";
......
...@@ -188,6 +188,10 @@ fimc_3: fimc@11830000 { ...@@ -188,6 +188,10 @@ fimc_3: fimc@11830000 {
}; };
}; };
&cpu0 {
cpu0-supply = <&varm_breg>;
};
&dsi_0 { &dsi_0 {
vddcore-supply = <&vusb_reg>; vddcore-supply = <&vusb_reg>;
vddio-supply = <&vmipi_reg>; vddio-supply = <&vmipi_reg>;
......
...@@ -548,6 +548,10 @@ i2c@138E0000 { ...@@ -548,6 +548,10 @@ i2c@138E0000 {
}; };
}; };
&cpu0 {
cpu0-supply = <&vdd_arm_reg>;
};
&pinctrl_1 { &pinctrl_1 {
hdmi_hpd: hdmi-hpd { hdmi_hpd: hdmi-hpd {
samsung,pins = "gpx3-7"; samsung,pins = "gpx3-7";
......
...@@ -40,6 +40,18 @@ cpu0: cpu@900 { ...@@ -40,6 +40,18 @@ cpu0: cpu@900 {
device_type = "cpu"; device_type = "cpu";
compatible = "arm,cortex-a9"; compatible = "arm,cortex-a9";
reg = <0x900>; reg = <0x900>;
clocks = <&clock CLK_ARM_CLK>;
clock-names = "cpu";
clock-latency = <160000>;
operating-points = <
1200000 1250000
1000000 1150000
800000 1075000
500000 975000
400000 975000
200000 950000
>;
cooling-min-level = <4>; cooling-min-level = <4>;
cooling-max-level = <2>; cooling-max-level = <2>;
#cooling-cells = <2>; /* min followed by max */ #cooling-cells = <2>; /* min followed by max */
......
...@@ -286,8 +286,8 @@ wdog: wdog@53fdc000 { ...@@ -286,8 +286,8 @@ wdog: wdog@53fdc000 {
can1: can@53fe4000 { can1: can@53fe4000 {
compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan"; compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan";
reg = <0x53fe4000 0x1000>; reg = <0x53fe4000 0x1000>;
clocks = <&clks 33>; clocks = <&clks 33>, <&clks 33>;
clock-names = "ipg"; clock-names = "ipg", "per";
interrupts = <43>; interrupts = <43>;
status = "disabled"; status = "disabled";
}; };
...@@ -295,8 +295,8 @@ can1: can@53fe4000 { ...@@ -295,8 +295,8 @@ can1: can@53fe4000 {
can2: can@53fe8000 { can2: can@53fe8000 {
compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan"; compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan";
reg = <0x53fe8000 0x1000>; reg = <0x53fe8000 0x1000>;
clocks = <&clks 34>; clocks = <&clks 34>, <&clks 34>;
clock-names = "ipg"; clock-names = "ipg", "per";
interrupts = <44>; interrupts = <44>;
status = "disabled"; status = "disabled";
}; };
......
...@@ -13,9 +13,8 @@ mainpllclk: mainpllclk@2310110 { ...@@ -13,9 +13,8 @@ mainpllclk: mainpllclk@2310110 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,main-pll-clock"; compatible = "ti,keystone,main-pll-clock";
clocks = <&refclksys>; clocks = <&refclksys>;
reg = <0x02620350 4>, <0x02310110 4>; reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>;
reg-names = "control", "multiplier"; reg-names = "control", "multiplier", "post-divider";
fixed-postdiv = <2>;
}; };
papllclk: papllclk@2620358 { papllclk: papllclk@2620358 {
......
...@@ -22,9 +22,8 @@ mainpllclk: mainpllclk@2310110 { ...@@ -22,9 +22,8 @@ mainpllclk: mainpllclk@2310110 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,main-pll-clock"; compatible = "ti,keystone,main-pll-clock";
clocks = <&refclksys>; clocks = <&refclksys>;
reg = <0x02620350 4>, <0x02310110 4>; reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>;
reg-names = "control", "multiplier"; reg-names = "control", "multiplier", "post-divider";
fixed-postdiv = <2>;
}; };
papllclk: papllclk@2620358 { papllclk: papllclk@2620358 {
......
...@@ -22,9 +22,8 @@ mainpllclk: mainpllclk@2310110 { ...@@ -22,9 +22,8 @@ mainpllclk: mainpllclk@2310110 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,main-pll-clock"; compatible = "ti,keystone,main-pll-clock";
clocks = <&refclksys>; clocks = <&refclksys>;
reg = <0x02620350 4>, <0x02310110 4>; reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>;
reg-names = "control", "multiplier"; reg-names = "control", "multiplier", "post-divider";
fixed-postdiv = <2>;
}; };
papllclk: papllclk@2620358 { papllclk: papllclk@2620358 {
......
...@@ -17,6 +17,7 @@ chosen { ...@@ -17,6 +17,7 @@ chosen {
}; };
aliases { aliases {
serial1 = &uart1;
stmpe-i2c0 = &stmpe0; stmpe-i2c0 = &stmpe0;
stmpe-i2c1 = &stmpe1; stmpe-i2c1 = &stmpe1;
}; };
......
...@@ -15,6 +15,10 @@ chosen { ...@@ -15,6 +15,10 @@ chosen {
bootargs = "root=/dev/ram0 console=ttyAMA1,115200n8 earlyprintk"; bootargs = "root=/dev/ram0 console=ttyAMA1,115200n8 earlyprintk";
}; };
aliases {
serial1 = &uart1;
};
src@101e0000 { src@101e0000 {
/* These chrystal drivers are not used on this board */ /* These chrystal drivers are not used on this board */
disable-sxtalo; disable-sxtalo;
......
...@@ -757,6 +757,7 @@ uart0: uart@101fd000 { ...@@ -757,6 +757,7 @@ uart0: uart@101fd000 {
clock-names = "uartclk", "apb_pclk"; clock-names = "uartclk", "apb_pclk";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart0_default_mux>; pinctrl-0 = <&uart0_default_mux>;
status = "disabled";
}; };
uart1: uart@101fb000 { uart1: uart@101fb000 {
......
...@@ -2373,6 +2373,9 @@ static int of_dev_hwmod_lookup(struct device_node *np, ...@@ -2373,6 +2373,9 @@ static int of_dev_hwmod_lookup(struct device_node *np,
* registers. This address is needed early so the OCP registers that * registers. This address is needed early so the OCP registers that
* are part of the device's address space can be ioremapped properly. * are part of the device's address space can be ioremapped properly.
* *
* If SYSC access is not needed, the registers will not be remapped
* and non-availability of MPU access is not treated as an error.
*
* Returns 0 on success, -EINVAL if an invalid hwmod is passed, and * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and
* -ENXIO on absent or invalid register target address space. * -ENXIO on absent or invalid register target address space.
*/ */
...@@ -2387,6 +2390,11 @@ static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data, ...@@ -2387,6 +2390,11 @@ static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
_save_mpu_port_index(oh); _save_mpu_port_index(oh);
/* if we don't need sysc access we don't need to ioremap */
if (!oh->class->sysc)
return 0;
/* we can't continue without MPU PORT if we need sysc access */
if (oh->_int_flags & _HWMOD_NO_MPU_PORT) if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
return -ENXIO; return -ENXIO;
...@@ -2396,8 +2404,10 @@ static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data, ...@@ -2396,8 +2404,10 @@ static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
oh->name); oh->name);
/* Extract the IO space from device tree blob */ /* Extract the IO space from device tree blob */
if (!np) if (!np) {
pr_err("omap_hwmod: %s: no dt node\n", oh->name);
return -ENXIO; return -ENXIO;
}
va_start = of_iomap(np, index + oh->mpu_rt_idx); va_start = of_iomap(np, index + oh->mpu_rt_idx);
} else { } else {
...@@ -2456,14 +2466,12 @@ static int __init _init(struct omap_hwmod *oh, void *data) ...@@ -2456,14 +2466,12 @@ static int __init _init(struct omap_hwmod *oh, void *data)
oh->name, np->name); oh->name, np->name);
} }
if (oh->class->sysc) {
r = _init_mpu_rt_base(oh, NULL, index, np); r = _init_mpu_rt_base(oh, NULL, index, np);
if (r < 0) { if (r < 0) {
WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n", WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
oh->name); oh->name);
return 0; return 0;
} }
}
r = _init_clocks(oh, NULL); r = _init_clocks(oh, NULL);
if (r < 0) { if (r < 0) {
......
...@@ -827,8 +827,7 @@ static struct omap_hwmod_class_sysconfig dra7xx_gpmc_sysc = { ...@@ -827,8 +827,7 @@ static struct omap_hwmod_class_sysconfig dra7xx_gpmc_sysc = {
.syss_offs = 0x0014, .syss_offs = 0x0014,
.sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE | .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE |
SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS), SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
SIDLE_SMART_WKUP),
.sysc_fields = &omap_hwmod_sysc_type1, .sysc_fields = &omap_hwmod_sysc_type1,
}; };
...@@ -844,7 +843,7 @@ static struct omap_hwmod dra7xx_gpmc_hwmod = { ...@@ -844,7 +843,7 @@ static struct omap_hwmod dra7xx_gpmc_hwmod = {
.class = &dra7xx_gpmc_hwmod_class, .class = &dra7xx_gpmc_hwmod_class,
.clkdm_name = "l3main1_clkdm", .clkdm_name = "l3main1_clkdm",
/* Skip reset for CONFIG_OMAP_GPMC_DEBUG for bootloader timings */ /* Skip reset for CONFIG_OMAP_GPMC_DEBUG for bootloader timings */
.flags = HWMOD_SWSUP_SIDLE | DEBUG_OMAP_GPMC_HWMOD_FLAGS, .flags = DEBUG_OMAP_GPMC_HWMOD_FLAGS,
.main_clk = "l3_iclk_div", .main_clk = "l3_iclk_div",
.prcm = { .prcm = {
.omap4 = { .omap4 = {
......
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