Commit 30c867ee authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'blackfin-for-linus' of...

Merge tag 'blackfin-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/realmz6/blackfin-linux

Pull blackfin updates from Steven Miao:
 "Some minor changes and bug fixes"

* tag 'blackfin-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/realmz6/blackfin-linux:
  From: Eunbong Song <eunb.song@samsung.com>
  Add platfrom device resource for bfin-sport on bf533 stamp
  fix build error for bf527-ezkit_defconfig for old silicon
  blackfin: Support L1 SRAM parity checking feature on bf60x
  blackfin: bf609: update the anomaly list to Nov 2013
  blackfin: delete non-required instances of <linux/init.h>
  From: Paul Walmsley <pwalmsley@nvidia.com>
  06/18] smp, blackfin: kill SMP single function call interrupt
  arch: blackfin: uapi: be sure of "_UAPI" prefix for all guard macros
parents cac9283c 58095fda
...@@ -146,6 +146,7 @@ CONFIG_USB_DEVICEFS=y ...@@ -146,6 +146,7 @@ CONFIG_USB_DEVICEFS=y
CONFIG_USB_OTG_BLACKLIST_HUB=y CONFIG_USB_OTG_BLACKLIST_HUB=y
CONFIG_USB_MON=y CONFIG_USB_MON=y
CONFIG_USB_MUSB_HDRC=y CONFIG_USB_MUSB_HDRC=y
CONFIG_MUSB_PIO_ONLY=y
CONFIG_USB_MUSB_BLACKFIN=y CONFIG_USB_MUSB_BLACKFIN=y
CONFIG_MUSB_PIO_ONLY=y CONFIG_MUSB_PIO_ONLY=y
CONFIG_USB_STORAGE=y CONFIG_USB_STORAGE=y
......
...@@ -59,7 +59,6 @@ CONFIG_BFIN_SIR=m ...@@ -59,7 +59,6 @@ CONFIG_BFIN_SIR=m
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
# CONFIG_FW_LOADER is not set # CONFIG_FW_LOADER is not set
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=m CONFIG_MTD_CHAR=m
CONFIG_MTD_BLOCK=y CONFIG_MTD_BLOCK=y
......
...@@ -49,7 +49,6 @@ CONFIG_SYN_COOKIES=y ...@@ -49,7 +49,6 @@ CONFIG_SYN_COOKIES=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
# CONFIG_FW_LOADER is not set # CONFIG_FW_LOADER is not set
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=y CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y CONFIG_MTD_BLOCK=y
......
...@@ -44,7 +44,6 @@ CONFIG_IP_PNP=y ...@@ -44,7 +44,6 @@ CONFIG_IP_PNP=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
# CONFIG_FW_LOADER is not set # CONFIG_FW_LOADER is not set
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=m CONFIG_MTD_CHAR=m
CONFIG_MTD_BLOCK=y CONFIG_MTD_BLOCK=y
......
...@@ -36,7 +36,6 @@ CONFIG_UNIX=y ...@@ -36,7 +36,6 @@ CONFIG_UNIX=y
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=y CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y CONFIG_MTD_BLOCK=y
......
...@@ -53,7 +53,6 @@ CONFIG_INET_XFRM_MODE_BEET=m ...@@ -53,7 +53,6 @@ CONFIG_INET_XFRM_MODE_BEET=m
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
# CONFIG_FW_LOADER is not set # CONFIG_FW_LOADER is not set
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=y CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y CONFIG_MTD_BLOCK=y
......
...@@ -51,7 +51,6 @@ CONFIG_INET=y ...@@ -51,7 +51,6 @@ CONFIG_INET=y
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=y CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y CONFIG_MTD_BLOCK=y
......
...@@ -36,7 +36,6 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" ...@@ -36,7 +36,6 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_MTD_DEBUG=y CONFIG_MTD_DEBUG=y
CONFIG_MTD_DEBUG_VERBOSE=1 CONFIG_MTD_DEBUG_VERBOSE=1
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_CHAR=y CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y CONFIG_MTD_BLOCK=y
CONFIG_NFTL=y CONFIG_NFTL=y
......
...@@ -36,7 +36,6 @@ CONFIG_IRTTY_SIR=m ...@@ -36,7 +36,6 @@ CONFIG_IRTTY_SIR=m
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
# CONFIG_FW_LOADER is not set # CONFIG_FW_LOADER is not set
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_CHAR=y CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y CONFIG_MTD_BLOCK=y
CONFIG_MTD_RAM=y CONFIG_MTD_RAM=y
......
...@@ -43,7 +43,6 @@ CONFIG_IP_NF_TARGET_REJECT=y ...@@ -43,7 +43,6 @@ CONFIG_IP_NF_TARGET_REJECT=y
CONFIG_IP_NF_MANGLE=y CONFIG_IP_NF_MANGLE=y
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_CHAR=y CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y CONFIG_MTD_CFI=y
......
...@@ -46,7 +46,6 @@ CONFIG_IP_PNP=y ...@@ -46,7 +46,6 @@ CONFIG_IP_PNP=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
# CONFIG_FW_LOADER is not set # CONFIG_FW_LOADER is not set
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_CHAR=m CONFIG_MTD_CHAR=m
CONFIG_MTD_BLOCK=y CONFIG_MTD_BLOCK=y
CONFIG_MTD_RAM=y CONFIG_MTD_RAM=y
......
...@@ -38,7 +38,6 @@ CONFIG_IRTTY_SIR=m ...@@ -38,7 +38,6 @@ CONFIG_IRTTY_SIR=m
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
# CONFIG_FW_LOADER is not set # CONFIG_FW_LOADER is not set
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_CHAR=m CONFIG_MTD_CHAR=m
CONFIG_MTD_BLOCK=y CONFIG_MTD_BLOCK=y
CONFIG_MTD_JEDECPROBE=m CONFIG_MTD_JEDECPROBE=m
......
...@@ -54,7 +54,6 @@ CONFIG_IP_PNP=y ...@@ -54,7 +54,6 @@ CONFIG_IP_PNP=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
# CONFIG_FW_LOADER is not set # CONFIG_FW_LOADER is not set
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=y CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y CONFIG_MTD_BLOCK=y
......
...@@ -544,6 +544,7 @@ do { \ ...@@ -544,6 +544,7 @@ do { \
#define DCBS_P 0x04 /* L1 Data Cache Bank Select */ #define DCBS_P 0x04 /* L1 Data Cache Bank Select */
#define PORT_PREF0_P 0x12 /* DAG0 Port Preference */ #define PORT_PREF0_P 0x12 /* DAG0 Port Preference */
#define PORT_PREF1_P 0x13 /* DAG1 Port Preference */ #define PORT_PREF1_P 0x13 /* DAG1 Port Preference */
#define RDCHK 0x9 /* Enable L1 Parity Check */
/* Masks */ /* Masks */
#define ENDM 0x00000001 /* (doesn't really exist) Enable #define ENDM 0x00000001 /* (doesn't really exist) Enable
......
#ifndef _UAPI__BFIN_ASM_BYTEORDER_H
#define _UAPI__BFIN_ASM_BYTEORDER_H
#include <linux/byteorder/little_endian.h> #include <linux/byteorder/little_endian.h>
#endif /* _UAPI__BFIN_ASM_BYTEORDER_H */
...@@ -7,8 +7,8 @@ ...@@ -7,8 +7,8 @@
* Licensed under the GPL-2 or later. * Licensed under the GPL-2 or later.
*/ */
#ifndef _ASM_CACHECTL #ifndef _UAPI_ASM_CACHECTL
#define _ASM_CACHECTL #define _UAPI_ASM_CACHECTL
/* /*
* Options for cacheflush system call * Options for cacheflush system call
...@@ -17,4 +17,4 @@ ...@@ -17,4 +17,4 @@
#define DCACHE (1<<1) /* writeback and flush data cache */ #define DCACHE (1<<1) /* writeback and flush data cache */
#define BCACHE (ICACHE|DCACHE) /* flush both caches */ #define BCACHE (ICACHE|DCACHE) /* flush both caches */
#endif /* _ASM_CACHECTL */ #endif /* _UAPI_ASM_CACHECTL */
...@@ -4,8 +4,8 @@ ...@@ -4,8 +4,8 @@
* Licensed under the GPL-2 or later. * Licensed under the GPL-2 or later.
*/ */
#ifndef _BFIN_FCNTL_H #ifndef _UAPI_BFIN_FCNTL_H
#define _BFIN_FCNTL_H #define _UAPI_BFIN_FCNTL_H
#define O_DIRECTORY 040000 /* must be a directory */ #define O_DIRECTORY 040000 /* must be a directory */
#define O_NOFOLLOW 0100000 /* don't follow links */ #define O_NOFOLLOW 0100000 /* don't follow links */
...@@ -14,4 +14,4 @@ ...@@ -14,4 +14,4 @@
#include <asm-generic/fcntl.h> #include <asm-generic/fcntl.h>
#endif #endif /* _UAPI_BFIN_FCNTL_H */
#ifndef __ARCH_BFIN_IOCTLS_H__ #ifndef _UAPI__ARCH_BFIN_IOCTLS_H__
#define __ARCH_BFIN_IOCTLS_H__ #define _UAPI__ARCH_BFIN_IOCTLS_H__
#define FIOQSIZE 0x545E #define FIOQSIZE 0x545E
#include <asm-generic/ioctls.h> #include <asm-generic/ioctls.h>
#endif #endif /* _UAPI__ARCH_BFIN_IOCTLS_H__ */
...@@ -5,12 +5,12 @@ ...@@ -5,12 +5,12 @@
* *
*/ */
#ifndef __BFIN_POLL_H #ifndef _UAPI__BFIN_POLL_H
#define __BFIN_POLL_H #define _UAPI__BFIN_POLL_H
#define POLLWRNORM 4 /* POLLOUT */ #define POLLWRNORM 4 /* POLLOUT */
#define POLLWRBAND 256 #define POLLWRBAND 256
#include <asm-generic/poll.h> #include <asm-generic/poll.h>
#endif #endif /* _UAPI__BFIN_POLL_H */
...@@ -4,8 +4,8 @@ ...@@ -4,8 +4,8 @@
* Licensed under the GPL-2 or later. * Licensed under the GPL-2 or later.
*/ */
#ifndef __ARCH_BFIN_POSIX_TYPES_H #ifndef _UAPI__ARCH_BFIN_POSIX_TYPES_H
#define __ARCH_BFIN_POSIX_TYPES_H #define _UAPI__ARCH_BFIN_POSIX_TYPES_H
typedef unsigned short __kernel_mode_t; typedef unsigned short __kernel_mode_t;
#define __kernel_mode_t __kernel_mode_t #define __kernel_mode_t __kernel_mode_t
...@@ -27,4 +27,4 @@ typedef unsigned short __kernel_old_dev_t; ...@@ -27,4 +27,4 @@ typedef unsigned short __kernel_old_dev_t;
#include <asm-generic/posix_types.h> #include <asm-generic/posix_types.h>
#endif #endif /* _UAPI__ARCH_BFIN_POSIX_TYPES_H */
...@@ -4,8 +4,8 @@ ...@@ -4,8 +4,8 @@
* Licensed under the GPL-2 or later. * Licensed under the GPL-2 or later.
*/ */
#ifndef _ASM_BLACKFIN_SIGCONTEXT_H #ifndef _UAPI_ASM_BLACKFIN_SIGCONTEXT_H
#define _ASM_BLACKFIN_SIGCONTEXT_H #define _UAPI_ASM_BLACKFIN_SIGCONTEXT_H
/* Add new entries at the end of the structure only. */ /* Add new entries at the end of the structure only. */
struct sigcontext { struct sigcontext {
...@@ -58,4 +58,4 @@ struct sigcontext { ...@@ -58,4 +58,4 @@ struct sigcontext {
unsigned long sc_seqstat; unsigned long sc_seqstat;
}; };
#endif #endif /* _UAPI_ASM_BLACKFIN_SIGCONTEXT_H */
...@@ -4,8 +4,8 @@ ...@@ -4,8 +4,8 @@
* Licensed under the GPL-2 or later. * Licensed under the GPL-2 or later.
*/ */
#ifndef _BFIN_SIGINFO_H #ifndef _UAPI_BFIN_SIGINFO_H
#define _BFIN_SIGINFO_H #define _UAPI_BFIN_SIGINFO_H
#include <linux/types.h> #include <linux/types.h>
#include <asm-generic/siginfo.h> #include <asm-generic/siginfo.h>
...@@ -38,4 +38,4 @@ ...@@ -38,4 +38,4 @@
*/ */
#define SEGV_STACKFLOW (__SI_FAULT|3) /* stack overflow */ #define SEGV_STACKFLOW (__SI_FAULT|3) /* stack overflow */
#endif #endif /* _UAPI_BFIN_SIGINFO_H */
#ifndef _BLACKFIN_SIGNAL_H #ifndef _UAPI_BLACKFIN_SIGNAL_H
#define _BLACKFIN_SIGNAL_H #define _UAPI_BLACKFIN_SIGNAL_H
#define SA_RESTORER 0x04000000 #define SA_RESTORER 0x04000000
#include <asm-generic/signal.h> #include <asm-generic/signal.h>
#endif #endif /* _UAPI_BLACKFIN_SIGNAL_H */
...@@ -4,8 +4,8 @@ ...@@ -4,8 +4,8 @@
* Licensed under the GPL-2. * Licensed under the GPL-2.
*/ */
#ifndef _BFIN_STAT_H #ifndef _UAPI_BFIN_STAT_H
#define _BFIN_STAT_H #define _UAPI_BFIN_STAT_H
struct stat { struct stat {
unsigned short st_dev; unsigned short st_dev;
...@@ -66,4 +66,4 @@ struct stat64 { ...@@ -66,4 +66,4 @@ struct stat64 {
unsigned long long st_ino; unsigned long long st_ino;
}; };
#endif /* _BFIN_STAT_H */ #endif /* _UAPI_BFIN_STAT_H */
...@@ -4,8 +4,8 @@ ...@@ -4,8 +4,8 @@
* Licensed under the GPL-2 or later. * Licensed under the GPL-2 or later.
*/ */
#ifndef _BLACKFIN_SWAB_H #ifndef _UAPI_BLACKFIN_SWAB_H
#define _BLACKFIN_SWAB_H #define _UAPI_BLACKFIN_SWAB_H
#include <linux/types.h> #include <linux/types.h>
#include <asm-generic/swab.h> #include <asm-generic/swab.h>
...@@ -47,4 +47,4 @@ static __inline__ __attribute_const__ __u16 __arch_swab16(__u16 xx) ...@@ -47,4 +47,4 @@ static __inline__ __attribute_const__ __u16 __arch_swab16(__u16 xx)
#endif /* __GNUC__ */ #endif /* __GNUC__ */
#endif /* _BLACKFIN_SWAB_H */ #endif /* _UAPI_BLACKFIN_SWAB_H */
...@@ -370,7 +370,8 @@ static struct platform_device bfin_sir0_device = { ...@@ -370,7 +370,8 @@ static struct platform_device bfin_sir0_device = {
#endif #endif
#endif #endif
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) #if defined(CONFIG_SERIAL_BFIN_SPORT) || \
defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
static struct resource bfin_sport0_uart_resources[] = { static struct resource bfin_sport0_uart_resources[] = {
{ {
...@@ -441,6 +442,50 @@ static struct platform_device bfin_sport1_uart_device = { ...@@ -441,6 +442,50 @@ static struct platform_device bfin_sport1_uart_device = {
#endif #endif
#endif #endif
#if defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE)
static struct resource bfin_sport0_resources[] = {
{
.start = SPORT0_TCR1,
.end = SPORT0_MRCS3+4,
.flags = IORESOURCE_MEM,
},
{
.start = IRQ_SPORT0_TX,
.end = IRQ_SPORT0_TX+1,
.flags = IORESOURCE_IRQ,
},
{
.start = IRQ_SPORT0_RX,
.end = IRQ_SPORT0_RX+1,
.flags = IORESOURCE_IRQ,
},
{
.start = IRQ_SPORT0_ERROR,
.end = IRQ_SPORT0_ERROR,
.flags = IORESOURCE_IRQ,
},
{
.start = CH_SPORT0_TX,
.end = CH_SPORT0_TX,
.flags = IORESOURCE_DMA,
},
{
.start = CH_SPORT0_RX,
.end = CH_SPORT0_RX,
.flags = IORESOURCE_DMA,
},
};
static struct platform_device bfin_sport0_device = {
.name = "bfin_sport_raw",
.id = 0,
.num_resources = ARRAY_SIZE(bfin_sport0_resources),
.resource = bfin_sport0_resources,
.dev = {
.platform_data = &bfin_sport0_peripherals,
},
};
#endif
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
#include <linux/input.h> #include <linux/input.h>
#include <linux/gpio_keys.h> #include <linux/gpio_keys.h>
......
...@@ -17,6 +17,12 @@ config SEC_IRQ_PRIORITY_LEVELS ...@@ -17,6 +17,12 @@ config SEC_IRQ_PRIORITY_LEVELS
Divide the total number of interrupt priority levels into sub-levels. Divide the total number of interrupt priority levels into sub-levels.
There is 2 ^ (SEC_IRQ_PRIORITY_LEVELS + 1) different levels. There is 2 ^ (SEC_IRQ_PRIORITY_LEVELS + 1) different levels.
config L1_PARITY_CHECK
bool "Enable L1 parity check"
default n
help
Enable the L1 parity check in L1 sram. A fault event is raised
when L1 parity error is found.
comment "System Cross Bar Priority Assignment" comment "System Cross Bar Priority Assignment"
......
...@@ -120,6 +120,7 @@ void clk_disable(struct clk *clk) ...@@ -120,6 +120,7 @@ void clk_disable(struct clk *clk)
} }
EXPORT_SYMBOL(clk_disable); EXPORT_SYMBOL(clk_disable);
unsigned long clk_get_rate(struct clk *clk) unsigned long clk_get_rate(struct clk *clk)
{ {
unsigned long ret = 0; unsigned long ret = 0;
...@@ -131,7 +132,7 @@ EXPORT_SYMBOL(clk_get_rate); ...@@ -131,7 +132,7 @@ EXPORT_SYMBOL(clk_get_rate);
long clk_round_rate(struct clk *clk, unsigned long rate) long clk_round_rate(struct clk *clk, unsigned long rate)
{ {
long ret = -EIO; long ret = 0;
if (clk->ops && clk->ops->round_rate) if (clk->ops && clk->ops->round_rate)
ret = clk->ops->round_rate(clk, rate); ret = clk->ops->round_rate(clk, rate);
return ret; return ret;
......
...@@ -23,11 +23,11 @@ ...@@ -23,11 +23,11 @@
/* TRU_STAT.ADDRERR and TRU_ERRADDR.ADDR May Not Reflect the Correct Status */ /* TRU_STAT.ADDRERR and TRU_ERRADDR.ADDR May Not Reflect the Correct Status */
#define ANOMALY_16000003 (1) #define ANOMALY_16000003 (1)
/* The EPPI Data Enable (DEN) Signal is Not Functional */ /* The EPPI Data Enable (DEN) Signal is Not Functional */
#define ANOMALY_16000004 (1) #define ANOMALY_16000004 (__SILICON_REVISION__ < 1)
/* Using L1 Instruction Cache with Parity Enabled is Unreliable */ /* Using L1 Instruction Cache with Parity Enabled is Unreliable */
#define ANOMALY_16000005 (1) #define ANOMALY_16000005 (__SILICON_REVISION__ < 1)
/* SEQSTAT.SYSNMI Clears Upon Entering the NMI ISR */ /* SEQSTAT.SYSNMI Clears Upon Entering the NMI ISR */
#define ANOMALY_16000006 (1) #define ANOMALY_16000006 (__SILICON_REVISION__ < 1)
/* DDR2 Memory Reads May Fail Intermittently */ /* DDR2 Memory Reads May Fail Intermittently */
#define ANOMALY_16000007 (1) #define ANOMALY_16000007 (1)
/* Instruction Memory Stalls Can Cause IFLUSH to Fail */ /* Instruction Memory Stalls Can Cause IFLUSH to Fail */
...@@ -49,19 +49,53 @@ ...@@ -49,19 +49,53 @@
/* Speculative Fetches Can Cause Undesired External FIFO Operations */ /* Speculative Fetches Can Cause Undesired External FIFO Operations */
#define ANOMALY_16000017 (1) #define ANOMALY_16000017 (1)
/* RSI Boot Cleanup Routine Does Not Clear Registers */ /* RSI Boot Cleanup Routine Does Not Clear Registers */
#define ANOMALY_16000018 (1) #define ANOMALY_16000018 (__SILICON_REVISION__ < 1)
/* SPI Master Boot Device Auto-detection Frequency is Set Incorrectly */ /* SPI Master Boot Device Auto-detection Frequency is Set Incorrectly */
#define ANOMALY_16000019 (1) #define ANOMALY_16000019 (__SILICON_REVISION__ < 1)
/* rom_SysControl() Fails to Set DDR0_CTL.INIT for Wakeup From Hibernate */ /* rom_SysControl() Fails to Set DDR0_CTL.INIT for Wakeup From Hibernate */
#define ANOMALY_16000020 (1) #define ANOMALY_16000020 (__SILICON_REVISION__ < 1)
/* rom_SysControl() Fails to Save and Restore DDR0_PHYCTL3 for Hibernate/Wakeup Sequence */ /* rom_SysControl() Fails to Save and Restore DDR0_PHYCTL3 for Hibernate/Wakeup Sequence */
#define ANOMALY_16000021 (1) #define ANOMALY_16000021 (__SILICON_REVISION__ < 1)
/* Boot Code Fails to Enable Parity Fault Detection */ /* Boot Code Fails to Enable Parity Fault Detection */
#define ANOMALY_16000022 (1) #define ANOMALY_16000022 (__SILICON_REVISION__ < 1)
/* Rom_SysControl Does not Update CGU0_CLKOUTSEL */
#define ANOMALY_16000023 (__SILICON_REVISION__ < 1)
/* Spurious Fault Signaled After Clearing an Externally Generated Fault */
#define ANOMALY_16000024 (1)
/* SPORT May Drive Data Pins During Inactive Channels in Multichannel Mode */
#define ANOMALY_16000025 (1)
/* USB DMA interrupt status do not show the DMA channel interrupt in the DMA ISR */ /* USB DMA interrupt status do not show the DMA channel interrupt in the DMA ISR */
#define ANOMALY_16000027 (1) #define ANOMALY_16000027 (__SILICON_REVISION__ < 1)
/* Default SPI Master Boot Mode Setting is Incorrect */
#define ANOMALY_16000028 (__SILICON_REVISION__ < 1)
/* PPI tDFSPI Timing Does Not Meet Data Sheet Specification */
#define ANOMALY_16000027 (__SILICON_REVISION__ < 1)
/* Interrupted Core Reads of MMRs May Cause Data Loss */ /* Interrupted Core Reads of MMRs May Cause Data Loss */
#define ANOMALY_16000030 (1) #define ANOMALY_16000030 (__SILICON_REVISION__ < 1)
/* Incorrect Default USB_PLL_OSC.PLLM Value */
#define ANOMALY_16000031 (__SILICON_REVISION__ < 1)
/* Core Reads of System MMRs May Cause the Core to Hang */
#define ANOMALY_16000032 (__SILICON_REVISION__ < 1)
/* PPI Data Underflow on First Word Not Reported in Certain Modes */
#define ANOMALY_16000033 (1)
/* CNV1 Red Pixel Substitution feature not functional in the PVP */
#define ANOMALY_16000034 (__SILICON_REVISION__ < 1)
/* IPF0 Output Port Color Separation feature not functional */
#define ANOMALY_16000035 (__SILICON_REVISION__ < 1)
/* Spurious USB Wake From Hibernate May Occur When USB_VBUS is Low */
#define ANOMALY_16000036 (__SILICON_REVISION__ < 1)
/* Core RAISE 2 Instruction Not Latched When Executed at Priority Level 0, 1, or 2 */
#define ANOMALY_16000037 (__SILICON_REVISION__ < 1)
/* Spurious Unhandled NMI or L1 Memory Parity Error Interrupt May Occur Upon Entering the NMI ISR */
#define ANOMALY_16000038 (__SILICON_REVISION__ < 1)
/* CGU_STAT.PLOCKERR Bit May be Unreliable */
#define ANOMALY_16000039 (1)
/* JTAG Emulator Reads of SDU_IDCODE Alter Register Contents */
#define ANOMALY_16000040 (1)
/* IFLUSH Instruction Causes Parity Error When Parity Is Enabled */
#define ANOMALY_16000041 (1)
/* Instruction Cache Failure When Parity Is Enabled */
#define ANOMALY_16000042 (__SILICON_REVISION__ == 1)
/* Anomalies that don't exist on this proc */ /* Anomalies that don't exist on this proc */
#define ANOMALY_05000158 (0) #define ANOMALY_05000158 (0)
......
...@@ -6,7 +6,6 @@ ...@@ -6,7 +6,6 @@
* Licensed under the GPL-2 or later. * Licensed under the GPL-2 or later.
*/ */
#include <linux/init.h>
#include <asm/blackfin.h> #include <asm/blackfin.h>
#include <asm/cplbinit.h> #include <asm/cplbinit.h>
...@@ -42,6 +41,16 @@ bfin_cache_init(struct cplb_entry *cplb_tbl, unsigned long cplb_addr, ...@@ -42,6 +41,16 @@ bfin_cache_init(struct cplb_entry *cplb_tbl, unsigned long cplb_addr,
unsigned long mem_mask) unsigned long mem_mask)
{ {
int i; int i;
#ifdef CONFIG_L1_PARITY_CHECK
u32 ctrl;
if (cplb_addr == DCPLB_ADDR0) {
ctrl = bfin_read32(mem_control) | (1 << RDCHK);
CSYNC();
bfin_write32(mem_control, ctrl);
SSYNC();
}
#endif
for (i = 0; i < MAX_CPLBS; i++) { for (i = 0; i < MAX_CPLBS; i++) {
bfin_write32(cplb_addr + i * 4, cplb_tbl[i].addr); bfin_write32(cplb_addr + i * 4, cplb_tbl[i].addr);
......
...@@ -7,7 +7,6 @@ ...@@ -7,7 +7,6 @@
*/ */
#include <linux/linkage.h> #include <linux/linkage.h>
#include <linux/init.h>
#include <asm/blackfin.h> #include <asm/blackfin.h>
#include <asm/dma.h> #include <asm/dma.h>
......
...@@ -471,13 +471,8 @@ void handle_sec_ssi_fault(uint32_t gstat) ...@@ -471,13 +471,8 @@ void handle_sec_ssi_fault(uint32_t gstat)
} }
void handle_sec_fault(unsigned int irq, struct irq_desc *desc) void handle_sec_fault(uint32_t sec_gstat)
{ {
uint32_t sec_gstat;
raw_spin_lock(&desc->lock);
sec_gstat = bfin_read32(SEC_GSTAT);
if (sec_gstat & SEC_GSTAT_ERR) { if (sec_gstat & SEC_GSTAT_ERR) {
switch (sec_gstat & SEC_GSTAT_ERRC) { switch (sec_gstat & SEC_GSTAT_ERRC) {
...@@ -494,18 +489,16 @@ void handle_sec_fault(unsigned int irq, struct irq_desc *desc) ...@@ -494,18 +489,16 @@ void handle_sec_fault(unsigned int irq, struct irq_desc *desc)
} }
raw_spin_unlock(&desc->lock);
handle_fasteoi_irq(irq, desc);
} }
void handle_core_fault(unsigned int irq, struct irq_desc *desc) static struct irqaction bfin_fault_irq = {
.name = "Blackfin fault",
};
static irqreturn_t bfin_fault_routine(int irq, void *data)
{ {
struct pt_regs *fp = get_irq_regs(); struct pt_regs *fp = get_irq_regs();
raw_spin_lock(&desc->lock);
switch (irq) { switch (irq) {
case IRQ_C0_DBL_FAULT: case IRQ_C0_DBL_FAULT:
double_fault_c(fp); double_fault_c(fp);
...@@ -522,11 +515,15 @@ void handle_core_fault(unsigned int irq, struct irq_desc *desc) ...@@ -522,11 +515,15 @@ void handle_core_fault(unsigned int irq, struct irq_desc *desc)
case IRQ_C0_NMI_L1_PARITY_ERR: case IRQ_C0_NMI_L1_PARITY_ERR:
panic("Core 0 NMI L1 parity error"); panic("Core 0 NMI L1 parity error");
break; break;
case IRQ_SEC_ERR:
pr_err("SEC error\n");
handle_sec_fault(bfin_read32(SEC_GSTAT));
break;
default: default:
panic("Core 1 fault %d occurs unexpectedly", irq); panic("Unknown fault %d", irq);
} }
raw_spin_unlock(&desc->lock); return IRQ_HANDLED;
} }
#endif /* SEC_GCTL */ #endif /* SEC_GCTL */
...@@ -1195,11 +1192,6 @@ int __init init_arch_irq(void) ...@@ -1195,11 +1192,6 @@ int __init init_arch_irq(void)
handle_percpu_irq); handle_percpu_irq);
} else { } else {
irq_set_chip(irq, &bfin_sec_irqchip); irq_set_chip(irq, &bfin_sec_irqchip);
if (irq == IRQ_SEC_ERR)
irq_set_handler(irq, handle_sec_fault);
else if (irq >= IRQ_C0_DBL_FAULT && irq < CORE_IRQS)
irq_set_handler(irq, handle_core_fault);
else
irq_set_handler(irq, handle_fasteoi_irq); irq_set_handler(irq, handle_fasteoi_irq);
__irq_set_preflow_handler(irq, bfin_sec_preflow_handler); __irq_set_preflow_handler(irq, bfin_sec_preflow_handler);
} }
...@@ -1239,6 +1231,13 @@ int __init init_arch_irq(void) ...@@ -1239,6 +1231,13 @@ int __init init_arch_irq(void)
register_syscore_ops(&sec_pm_syscore_ops); register_syscore_ops(&sec_pm_syscore_ops);
#endif #endif
bfin_fault_irq.handler = bfin_fault_routine;
#ifdef CONFIG_L1_PARITY_CHECK
setup_irq(IRQ_C0_NMI_L1_PARITY_ERR, &bfin_fault_irq);
#endif
setup_irq(IRQ_C0_DBL_FAULT, &bfin_fault_irq);
setup_irq(IRQ_SEC_ERR, &bfin_fault_irq);
return 0; return 0;
} }
......
...@@ -6,7 +6,6 @@ ...@@ -6,7 +6,6 @@
* Licensed under the GPL-2 or later. * Licensed under the GPL-2 or later.
*/ */
#include <linux/init.h>
#include <linux/errno.h> #include <linux/errno.h>
#include <linux/kernel.h> #include <linux/kernel.h>
#include <asm/scb.h> #include <asm/scb.h>
......
...@@ -53,7 +53,6 @@ enum ipi_message_type { ...@@ -53,7 +53,6 @@ enum ipi_message_type {
BFIN_IPI_TIMER, BFIN_IPI_TIMER,
BFIN_IPI_RESCHEDULE, BFIN_IPI_RESCHEDULE,
BFIN_IPI_CALL_FUNC, BFIN_IPI_CALL_FUNC,
BFIN_IPI_CALL_FUNC_SINGLE,
BFIN_IPI_CPU_STOP, BFIN_IPI_CPU_STOP,
}; };
...@@ -162,9 +161,6 @@ static irqreturn_t ipi_handler_int1(int irq, void *dev_instance) ...@@ -162,9 +161,6 @@ static irqreturn_t ipi_handler_int1(int irq, void *dev_instance)
case BFIN_IPI_CALL_FUNC: case BFIN_IPI_CALL_FUNC:
generic_smp_call_function_interrupt(); generic_smp_call_function_interrupt();
break; break;
case BFIN_IPI_CALL_FUNC_SINGLE:
generic_smp_call_function_single_interrupt();
break;
case BFIN_IPI_CPU_STOP: case BFIN_IPI_CPU_STOP:
ipi_cpu_stop(cpu); ipi_cpu_stop(cpu);
break; break;
...@@ -210,7 +206,7 @@ void send_ipi(const struct cpumask *cpumask, enum ipi_message_type msg) ...@@ -210,7 +206,7 @@ void send_ipi(const struct cpumask *cpumask, enum ipi_message_type msg)
void arch_send_call_function_single_ipi(int cpu) void arch_send_call_function_single_ipi(int cpu)
{ {
send_ipi(cpumask_of(cpu), BFIN_IPI_CALL_FUNC_SINGLE); send_ipi(cpumask_of(cpu), BFIN_IPI_CALL_FUNC);
} }
void arch_send_call_function_ipi_mask(const struct cpumask *mask) void arch_send_call_function_ipi_mask(const struct cpumask *mask)
......
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